05e7d622f1
The at24 driver allows to register I2C EEPROM chips using different vendor and devices, but the I2C subsystem does not take the vendor into account when matching using the I2C table since it only has device entries. But when matching using an OF table, both the vendor and device has to be taken into account so the driver defines only a set of compatible strings using the "atmel" vendor as a generic fallback for compatible I2C devices. So add this generic fallback to the device node compatible string to make the device to match the driver using the OF device ID table. Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
470 lines
12 KiB
Plaintext
470 lines
12 KiB
Plaintext
/*
|
|
* Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
/dts-v1/;
|
|
|
|
#include "am33xx.dtsi"
|
|
|
|
/ {
|
|
model = "Newflow AM335x NanoBone";
|
|
compatible = "ti,am33xx";
|
|
|
|
cpus {
|
|
cpu@0 {
|
|
cpu0-supply = <&dcdc2_reg>;
|
|
};
|
|
};
|
|
|
|
memory@80000000 {
|
|
device_type = "memory";
|
|
reg = <0x80000000 0x10000000>; /* 256 MB */
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led0 {
|
|
label = "nanobone:green:usr1";
|
|
gpios = <&gpio1 5 0>;
|
|
default-state = "off";
|
|
};
|
|
};
|
|
};
|
|
|
|
&am33xx_pinmux {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&misc_pins>;
|
|
|
|
misc_pins: misc_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE7) /* spi0_cs0.gpio0_5 */
|
|
>;
|
|
};
|
|
|
|
gpmc_pins: gpmc_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
|
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
|
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
|
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
|
AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
|
AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
|
AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
|
AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
|
AM33XX_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */
|
|
AM33XX_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */
|
|
AM33XX_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */
|
|
AM33XX_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */
|
|
AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */
|
|
AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */
|
|
AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */
|
|
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */
|
|
|
|
AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
|
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
|
AM33XX_IOPAD(0x880, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn1.gpmc_csn1 */
|
|
AM33XX_IOPAD(0x884, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn2.gpmc_csn2 */
|
|
AM33XX_IOPAD(0x888, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn3.gpmc_csn3 */
|
|
|
|
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
|
AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
|
AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
|
AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0_cle.gpmc_ben0_cle */
|
|
|
|
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE1) /* lcd_data1.gpmc_a1 */
|
|
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE1) /* lcd_data2.gpmc_a2 */
|
|
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE1) /* lcd_data3.gpmc_a3 */
|
|
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE1) /* lcd_data4.gpmc_a4 */
|
|
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE1) /* lcd_data5.gpmc_a5 */
|
|
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE1) /* lcd_data6.gpmc_a6 */
|
|
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE1) /* lcd_data7.gpmc_a7 */
|
|
|
|
AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE1) /* lcd_vsync.gpmc_a8 */
|
|
AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE1) /* lcd_hsync.gpmc_a9 */
|
|
AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE1) /* lcd_pclk.gpmc_a10 */
|
|
>;
|
|
};
|
|
|
|
i2c0_pins: i2c0_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
|
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
|
>;
|
|
};
|
|
|
|
uart0_pins: uart0_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
|
AM33XX_IOPAD(0x974, PIN_OUTPUT | MUX_MODE0) /* uart0_txd.uart0_txd */
|
|
>;
|
|
};
|
|
|
|
uart1_pins: uart1_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_IOPAD(0x978, PIN_OUTPUT | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */
|
|
AM33XX_IOPAD(0x97c, PIN_OUTPUT | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */
|
|
AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
|
AM33XX_IOPAD(0x984, PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */
|
|
>;
|
|
};
|
|
|
|
uart2_pins: uart2_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_IOPAD(0x8c0, PIN_INPUT_PULLUP | MUX_MODE7) /* lcd_data8.gpio2[14] */
|
|
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE7) /* lcd_data9.gpio2[15] */
|
|
AM33XX_IOPAD(0x950, PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */
|
|
AM33XX_IOPAD(0x954, PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */
|
|
>;
|
|
};
|
|
|
|
uart3_pins: uart3_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_IOPAD(0x8c8, PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data10.uart3_ctsn */
|
|
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE6) /* lcd_data11.uart3_rtsn */
|
|
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE1) /* spi0_cs1.uart3_rxd */
|
|
AM33XX_IOPAD(0x964, PIN_OUTPUT | MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */
|
|
>;
|
|
};
|
|
|
|
uart4_pins: uart4_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_IOPAD(0x8d0, PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data12.uart4_ctsn */
|
|
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE6) /* lcd_data13.uart4_rtsn */
|
|
AM33XX_IOPAD(0x968, PIN_INPUT | MUX_MODE1) /* uart0_ctsn.uart4_rxd */
|
|
AM33XX_IOPAD(0x96c, PIN_OUTPUT | MUX_MODE1) /* uart0_rtsn.uart4_txd */
|
|
>;
|
|
};
|
|
|
|
uart5_pins: uart5_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_IOPAD(0x8d8, PIN_INPUT | MUX_MODE4) /* lcd_data14.uart5_rxd */
|
|
AM33XX_IOPAD(0x944, PIN_OUTPUT | MUX_MODE3) /* rmiii1_refclk.uart5_txd */
|
|
>;
|
|
};
|
|
|
|
mmc1_pins: mmc1_pins {
|
|
pinctrl-single,pins = <
|
|
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
|
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
|
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
|
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
|
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
|
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
|
AM33XX_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE7) /* emu1.gpio3[8] */
|
|
AM33XX_IOPAD(0x9a0, PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18] */
|
|
>;
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart1_pins>;
|
|
status = "okay";
|
|
rts-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
|
|
rs485-rts-active-high;
|
|
rs485-rx-during-tx;
|
|
rs485-rts-delay = <1 1>;
|
|
linux,rs485-enabled-at-boot-time;
|
|
};
|
|
|
|
&uart2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart2_pins>;
|
|
status = "okay";
|
|
rts-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>;
|
|
rs485-rts-active-high;
|
|
rs485-rts-delay = <1 1>;
|
|
linux,rs485-enabled-at-boot-time;
|
|
};
|
|
|
|
&uart3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart3_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart4_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart5 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart5_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
clock-frequency = <400000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
|
|
gpio@20 {
|
|
compatible = "microchip,mcp23017";
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
reg = <0x20>;
|
|
};
|
|
|
|
tps: tps@24 {
|
|
reg = <0x24>;
|
|
};
|
|
|
|
eeprom@53 {
|
|
compatible = "microchip,24c02", "atmel,24c02";
|
|
reg = <0x53>;
|
|
pagesize = <8>;
|
|
};
|
|
|
|
rtc@68 {
|
|
compatible = "dallas,ds1307";
|
|
reg = <0x68>;
|
|
};
|
|
};
|
|
|
|
&elm {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpmc {
|
|
compatible = "ti,am3352-gpmc";
|
|
ti,hwmods = "gpmc";
|
|
status = "okay";
|
|
gpmc,num-waitpins = <2>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&gpmc_pins>;
|
|
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
ranges = <0 0 0x08000000 0x08000000>, /* CS0: NOR 128M */
|
|
<1 0 0x1c000000 0x01000000>; /* CS1: FRAM 16M */
|
|
|
|
nor@0,0 {
|
|
reg = <0 0x00000000 0x08000000>;
|
|
compatible = "cfi-flash";
|
|
linux,mtd-name = "spansion,s29gl010p11t";
|
|
bank-width = <2>;
|
|
|
|
gpmc,mux-add-data = <2>;
|
|
|
|
gpmc,sync-clk-ps = <0>;
|
|
gpmc,cs-on-ns = <0>;
|
|
gpmc,cs-rd-off-ns = <160>;
|
|
gpmc,cs-wr-off-ns = <160>;
|
|
gpmc,adv-on-ns = <10>;
|
|
gpmc,adv-rd-off-ns = <30>;
|
|
gpmc,adv-wr-off-ns = <30>;
|
|
gpmc,oe-on-ns = <40>;
|
|
gpmc,oe-off-ns = <160>;
|
|
gpmc,we-on-ns = <40>;
|
|
gpmc,we-off-ns = <160>;
|
|
gpmc,rd-cycle-ns = <160>;
|
|
gpmc,wr-cycle-ns = <160>;
|
|
gpmc,access-ns = <150>;
|
|
gpmc,page-burst-access-ns = <10>;
|
|
gpmc,cycle2cycle-samecsen;
|
|
gpmc,cycle2cycle-delay-ns = <20>;
|
|
gpmc,wr-data-mux-bus-ns = <70>;
|
|
gpmc,wr-access-ns = <80>;
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
/*
|
|
MTD partition table
|
|
===================
|
|
+------------+-->0x00000000-> U-Boot start
|
|
| |
|
|
| |-->0x000BFFFF-> U-Boot end
|
|
| |-->0x000C0000-> ENV1 start
|
|
| |
|
|
| |-->0x000DFFFF-> ENV1 end
|
|
| |-->0x000E0000-> ENV2 start
|
|
| |
|
|
| |-->0x000FFFFF-> ENV2 end
|
|
| |-->0x00100000-> Kernel start
|
|
| |
|
|
| |-->0x004FFFFF-> Kernel end
|
|
| |-->0x00500000-> File system start
|
|
| |
|
|
| |-->0x01FFFFFF-> File system end
|
|
| |-->0x02000000-> User data start
|
|
| |
|
|
| |-->0x03FFFFFF-> User data end
|
|
| |-->0x04000000-> Data storage start
|
|
| |
|
|
+------------+-->0x08000000-> NOR end (Free end)
|
|
*/
|
|
partition@0 {
|
|
label = "boot";
|
|
reg = <0x00000000 0x000c0000>; /* 768KB */
|
|
};
|
|
|
|
partition@1 {
|
|
label = "env1";
|
|
reg = <0x000c0000 0x00020000>; /* 128KB */
|
|
};
|
|
|
|
partition@2 {
|
|
label = "env2";
|
|
reg = <0x000e0000 0x00020000>; /* 128KB */
|
|
};
|
|
|
|
partition@3 {
|
|
label = "kernel";
|
|
reg = <0x00100000 0x00400000>; /* 4MB */
|
|
};
|
|
|
|
partition@4 {
|
|
label = "rootfs";
|
|
reg = <0x00500000 0x01b00000>; /* 27MB */
|
|
};
|
|
|
|
partition@5 {
|
|
label = "user";
|
|
reg = <0x02000000 0x02000000>; /* 32MB */
|
|
};
|
|
|
|
partition@6 {
|
|
label = "data";
|
|
reg = <0x04000000 0x04000000>; /* 64MB */
|
|
};
|
|
};
|
|
|
|
fram@1,0 {
|
|
reg = <1 0x00000000 0x01000000>;
|
|
bank-width = <2>;
|
|
|
|
gpmc,mux-add-data = <2>;
|
|
|
|
gpmc,sync-clk-ps = <0>;
|
|
gpmc,cs-on-ns = <0>;
|
|
gpmc,cs-rd-off-ns = <160>;
|
|
gpmc,cs-wr-off-ns = <160>;
|
|
gpmc,adv-on-ns = <10>;
|
|
gpmc,adv-rd-off-ns = <20>;
|
|
gpmc,adv-wr-off-ns = <20>;
|
|
gpmc,oe-on-ns = <30>;
|
|
gpmc,oe-off-ns = <150>;
|
|
gpmc,we-on-ns = <30>;
|
|
gpmc,we-off-ns = <150>;
|
|
gpmc,rd-cycle-ns = <160>;
|
|
gpmc,wr-cycle-ns = <160>;
|
|
gpmc,access-ns = <130>;
|
|
gpmc,page-burst-access-ns = <10>;
|
|
gpmc,cycle2cycle-samecsen;
|
|
gpmc,cycle2cycle-diffcsen;
|
|
gpmc,cycle2cycle-delay-ns = <10>;
|
|
gpmc,wr-data-mux-bus-ns = <30>;
|
|
gpmc,wr-access-ns = <0>;
|
|
};
|
|
};
|
|
|
|
&mac {
|
|
dual_emac;
|
|
status = "okay";
|
|
};
|
|
|
|
&davinci_mdio {
|
|
status = "okay";
|
|
};
|
|
|
|
&cpsw_emac0 {
|
|
phy_id = <&davinci_mdio>, <0>;
|
|
phy-mode = "mii";
|
|
dual_emac_res_vlan = <1>;
|
|
};
|
|
|
|
&cpsw_emac1 {
|
|
phy_id = <&davinci_mdio>, <1>;
|
|
phy-mode = "mii";
|
|
dual_emac_res_vlan = <2>;
|
|
};
|
|
|
|
&mmc1 {
|
|
status = "okay";
|
|
vmmc-supply = <&ldo4_reg>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc1_pins>;
|
|
bus-width = <4>;
|
|
cd-gpios = <&gpio3 8 0>;
|
|
wp-gpios = <&gpio3 18 0>;
|
|
};
|
|
|
|
#include "tps65217.dtsi"
|
|
|
|
&tps {
|
|
regulators {
|
|
dcdc1_reg: regulator@0 {
|
|
/* +1.5V voltage with ±4% tolerance */
|
|
regulator-min-microvolt = <1450000>;
|
|
regulator-max-microvolt = <1550000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
dcdc2_reg: regulator@1 {
|
|
/* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
|
|
regulator-name = "vdd_mpu";
|
|
regulator-min-microvolt = <915000>;
|
|
regulator-max-microvolt = <1140000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
dcdc3_reg: regulator@2 {
|
|
/* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
|
|
regulator-name = "vdd_core";
|
|
regulator-min-microvolt = <915000>;
|
|
regulator-max-microvolt = <1140000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo1_reg: regulator@3 {
|
|
/* +1.8V voltage with ±4% tolerance */
|
|
regulator-min-microvolt = <1750000>;
|
|
regulator-max-microvolt = <1870000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo2_reg: regulator@4 {
|
|
/* +3.3V voltage with ±4% tolerance */
|
|
regulator-min-microvolt = <3175000>;
|
|
regulator-max-microvolt = <3430000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo3_reg: regulator@5 {
|
|
/* +1.8V voltage with ±4% tolerance */
|
|
regulator-min-microvolt = <1750000>;
|
|
regulator-max-microvolt = <1870000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo4_reg: regulator@6 {
|
|
/* +3.3V voltage with ±4% tolerance */
|
|
regulator-min-microvolt = <3175000>;
|
|
regulator-max-microvolt = <3430000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|