387720c938
Since everybody copied my own mistake from the DT binding example, let's address all the offenders in one swift go. Most of them got the CPU interface size wrong (4kB, while it should be 8kB), except for both keystone platforms which got the control interface wrong (4kB instead of 8kB). In a few cases where I knew for sure what implementation was used, I've added the "arm,gic-400" compatible string. I'm 99% sure that this is what everyone is using, but short of having the TRM for all the other SoCs, I've left them alone. Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
205 lines
5 KiB
Plaintext
205 lines
5 KiB
Plaintext
/*
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* arch/arm/boot/dts/axm55xx.dtsi
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*
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* Copyright (C) 2013 LSI
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/lsi,axm5516-clks.h>
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#include "skeleton64.dtsi"
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/ {
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interrupt-parent = <&gic>;
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aliases {
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serial0 = &serial0;
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serial1 = &serial1;
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serial2 = &serial2;
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serial3 = &serial3;
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timer = &timer0;
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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clk_ref0: clk_ref0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <125000000>;
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};
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clk_ref1: clk_ref1 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <125000000>;
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};
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clk_ref2: clk_ref2 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <125000000>;
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};
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clks: clock-controller@2010020000 {
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compatible = "lsi,axm5516-clks";
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#clock-cells = <1>;
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reg = <0x20 0x10020000 0 0x20000>;
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};
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};
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gic: interrupt-controller@2001001000 {
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compatible = "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x20 0x01001000 0 0x1000>,
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<0x20 0x01002000 0 0x2000>,
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<0x20 0x01004000 0 0x2000>,
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<0x20 0x01006000 0 0x2000>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_HIGH)>;
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupts =
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<GIC_PPI 13
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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pmu {
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compatible = "arm,cortex-a15-pmu";
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interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
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};
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soc {
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compatible = "simple-bus";
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device_type = "soc";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&gic>;
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ranges;
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syscon: syscon@2010030000 {
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compatible = "lsi,axxia-syscon", "syscon";
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reg = <0x20 0x10030000 0 0x2000>;
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};
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reset: reset@2010031000 {
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compatible = "lsi,axm55xx-reset";
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syscon = <&syscon>;
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};
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amba {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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serial0: uart@2010080000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x20 0x10080000 0 0x1000>;
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interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks AXXIA_CLK_PER>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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serial1: uart@2010081000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x20 0x10081000 0 0x1000>;
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interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks AXXIA_CLK_PER>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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serial2: uart@2010082000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x20 0x10082000 0 0x1000>;
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interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks AXXIA_CLK_PER>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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serial3: uart@2010083000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x20 0x10083000 0 0x1000>;
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interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks AXXIA_CLK_PER>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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timer0: timer@2010091000 {
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compatible = "arm,sp804", "arm,primecell";
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reg = <0x20 0x10091000 0 0x1000>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks AXXIA_CLK_PER>;
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clock-names = "apb_pclk";
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status = "okay";
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};
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gpio0: gpio@2010092000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0x20 0x10092000 0x00 0x1000>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks AXXIA_CLK_PER>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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gpio1: gpio@2010093000 {
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#gpio-cells = <2>;
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compatible = "arm,pl061", "arm,primecell";
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gpio-controller;
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reg = <0x20 0x10093000 0x00 0x1000>;
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interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks AXXIA_CLK_PER>;
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clock-names = "apb_pclk";
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status = "disabled";
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};
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};
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};
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};
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/*
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Local Variables:
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mode: C
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End:
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*/
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