5d7e23a794
These use the standard clock bindings and now we can make some of the fixed clocks into real clocks. Note that the clock output names may become optional as we probably want to eventually use descriptive names, or use just dynamically generated names as suggested by Tero. Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
50 lines
1 KiB
Plaintext
50 lines
1 KiB
Plaintext
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "dm814x-clocks.dtsi"
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/* Compared to dm814x, dra62x does not have hdic, l3 or dss PLLs */
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&adpll_hdvic_ck {
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status = "disabled";
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};
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&adpll_l3_ck {
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status = "disabled";
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};
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&adpll_dss_ck {
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status = "disabled";
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};
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/* Compared to dm814x, dra62x has interconnect clocks on isp PLL */
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&sysclk4_ck {
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clocks = <&adpll_isp_ck 1>;
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};
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&sysclk5_ck {
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clocks = <&adpll_isp_ck 1>;
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};
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&sysclk6_ck {
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clocks = <&adpll_isp_ck 1>;
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};
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/*
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* Compared to dm814x, dra62x has different shifts and more mux options.
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* Please add the extra options for ysclk_14 and 16 if really needed.
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*/
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&timer1_fck {
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clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
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&aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
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ti,bit-shift = <4>;
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};
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&timer2_fck {
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clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
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&aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
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ti,bit-shift = <8>;
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};
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