a971c5545c
Commit7f107887d1("ARM: dts: imx: Remove skeleton.dtsi") causes boot issues when the bootloader does not create a 'chosen' node if such node is not present in the dtb. The reason for the boot failure is well explained by Javier Martinez Canillas: "the decompressor relies on a pre-existing chosen node to be available to insert the command line and merge other ATAGS info." , so pass an empty 'chosen' node to fix the boot problem. This issue has been seen in the kernelci reports with Barebox as bootloader. Also pass the 'memory' node in order to fix boot issues on the SolidRun iMX6 platforms. Fixes:7f107887d1("ARM: dts: imx: Remove skeleton.dtsi") Reported-by: kernelci.org bot <bot@kernelci.org> Reported-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
603 lines
14 KiB
Plaintext
603 lines
14 KiB
Plaintext
/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include "imx51-pinfunc.h"
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#include <dt-bindings/clock/imx5-clock.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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/*
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* The decompressor and also some bootloaders rely on a
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* pre-existing /chosen node to be available to insert the
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* command line and merge other ATAGS info.
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* Also for U-Boot there must be a pre-existing /memory node.
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*/
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chosen {};
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memory { device_type = "memory"; reg = <0 0>; };
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aliases {
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ethernet0 = &fec;
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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gpio2 = &gpio3;
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gpio3 = &gpio4;
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i2c0 = &i2c1;
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i2c1 = &i2c2;
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mmc0 = &esdhc1;
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mmc1 = &esdhc2;
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mmc2 = &esdhc3;
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mmc3 = &esdhc4;
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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spi0 = &ecspi1;
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spi1 = &ecspi2;
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spi2 = &cspi;
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};
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tzic: tz-interrupt-controller@e0000000 {
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compatible = "fsl,imx51-tzic", "fsl,tzic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0xe0000000 0x4000>;
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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ckil {
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compatible = "fsl,imx-ckil", "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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ckih1 {
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compatible = "fsl,imx-ckih1", "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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ckih2 {
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compatible = "fsl,imx-ckih2", "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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osc {
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compatible = "fsl,imx-osc", "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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};
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a8";
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reg = <0>;
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clock-latency = <62500>;
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clocks = <&clks IMX5_CLK_CPU_PODF>;
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clock-names = "cpu";
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operating-points = <
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166000 1000000
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600000 1050000
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800000 1100000
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>;
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voltage-tolerance = <5>;
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};
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};
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usbphy {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "simple-bus";
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usbphy0: usbphy@0 {
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compatible = "usb-nop-xceiv";
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reg = <0>;
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clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
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clock-names = "main_clk";
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};
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};
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display-subsystem {
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compatible = "fsl,imx-display-subsystem";
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ports = <&ipu_di0>, <&ipu_di1>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&tzic>;
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ranges;
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iram: iram@1ffe0000 {
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compatible = "mmio-sram";
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reg = <0x1ffe0000 0x20000>;
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};
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ipu: ipu@40000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx51-ipu";
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reg = <0x40000000 0x20000000>;
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interrupts = <11 10>;
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clocks = <&clks IMX5_CLK_IPU_GATE>,
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<&clks IMX5_CLK_IPU_DI0_GATE>,
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<&clks IMX5_CLK_IPU_DI1_GATE>;
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clock-names = "bus", "di0", "di1";
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resets = <&src 2>;
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ipu_di0: port@2 {
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reg = <2>;
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ipu_di0_disp0: endpoint {
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};
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};
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ipu_di1: port@3 {
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reg = <3>;
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ipu_di1_disp1: endpoint {
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};
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};
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};
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aips@70000000 { /* AIPS1 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x70000000 0x10000000>;
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ranges;
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spba@70000000 {
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compatible = "fsl,spba-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x70000000 0x40000>;
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ranges;
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esdhc1: esdhc@70004000 {
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compatible = "fsl,imx51-esdhc";
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reg = <0x70004000 0x4000>;
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interrupts = <1>;
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clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
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<&clks IMX5_CLK_DUMMY>,
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<&clks IMX5_CLK_ESDHC1_PER_GATE>;
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clock-names = "ipg", "ahb", "per";
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status = "disabled";
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};
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esdhc2: esdhc@70008000 {
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compatible = "fsl,imx51-esdhc";
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reg = <0x70008000 0x4000>;
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interrupts = <2>;
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clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>,
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<&clks IMX5_CLK_DUMMY>,
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<&clks IMX5_CLK_ESDHC2_PER_GATE>;
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clock-names = "ipg", "ahb", "per";
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bus-width = <4>;
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status = "disabled";
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};
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uart3: serial@7000c000 {
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compatible = "fsl,imx51-uart", "fsl,imx21-uart";
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reg = <0x7000c000 0x4000>;
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interrupts = <33>;
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clocks = <&clks IMX5_CLK_UART3_IPG_GATE>,
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<&clks IMX5_CLK_UART3_PER_GATE>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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ecspi1: ecspi@70010000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx51-ecspi";
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reg = <0x70010000 0x4000>;
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interrupts = <36>;
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clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>,
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<&clks IMX5_CLK_ECSPI1_PER_GATE>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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ssi2: ssi@70014000 {
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#sound-dai-cells = <0>;
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compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
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reg = <0x70014000 0x4000>;
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interrupts = <30>;
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clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>,
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<&clks IMX5_CLK_SSI2_ROOT_GATE>;
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clock-names = "ipg", "baud";
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dmas = <&sdma 24 1 0>,
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<&sdma 25 1 0>;
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dma-names = "rx", "tx";
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fsl,fifo-depth = <15>;
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status = "disabled";
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};
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esdhc3: esdhc@70020000 {
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compatible = "fsl,imx51-esdhc";
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reg = <0x70020000 0x4000>;
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interrupts = <3>;
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clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>,
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<&clks IMX5_CLK_DUMMY>,
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<&clks IMX5_CLK_ESDHC3_PER_GATE>;
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clock-names = "ipg", "ahb", "per";
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bus-width = <4>;
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status = "disabled";
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};
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esdhc4: esdhc@70024000 {
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compatible = "fsl,imx51-esdhc";
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reg = <0x70024000 0x4000>;
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interrupts = <4>;
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clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>,
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<&clks IMX5_CLK_DUMMY>,
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<&clks IMX5_CLK_ESDHC4_PER_GATE>;
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clock-names = "ipg", "ahb", "per";
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bus-width = <4>;
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status = "disabled";
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};
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};
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usbotg: usb@73f80000 {
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compatible = "fsl,imx51-usb", "fsl,imx27-usb";
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reg = <0x73f80000 0x0200>;
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interrupts = <18>;
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clocks = <&clks IMX5_CLK_USBOH3_GATE>;
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fsl,usbmisc = <&usbmisc 0>;
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fsl,usbphy = <&usbphy0>;
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status = "disabled";
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};
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usbh1: usb@73f80200 {
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compatible = "fsl,imx51-usb", "fsl,imx27-usb";
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reg = <0x73f80200 0x0200>;
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interrupts = <14>;
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clocks = <&clks IMX5_CLK_USBOH3_GATE>;
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fsl,usbmisc = <&usbmisc 1>;
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dr_mode = "host";
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status = "disabled";
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};
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usbh2: usb@73f80400 {
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compatible = "fsl,imx51-usb", "fsl,imx27-usb";
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reg = <0x73f80400 0x0200>;
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interrupts = <16>;
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clocks = <&clks IMX5_CLK_USBOH3_GATE>;
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fsl,usbmisc = <&usbmisc 2>;
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dr_mode = "host";
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status = "disabled";
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};
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usbh3: usb@73f80600 {
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compatible = "fsl,imx51-usb", "fsl,imx27-usb";
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reg = <0x73f80600 0x0200>;
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interrupts = <17>;
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clocks = <&clks IMX5_CLK_USBOH3_GATE>;
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fsl,usbmisc = <&usbmisc 3>;
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dr_mode = "host";
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status = "disabled";
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};
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usbmisc: usbmisc@73f80800 {
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#index-cells = <1>;
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compatible = "fsl,imx51-usbmisc";
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reg = <0x73f80800 0x200>;
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clocks = <&clks IMX5_CLK_USBOH3_GATE>;
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};
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gpio1: gpio@73f84000 {
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compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
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reg = <0x73f84000 0x4000>;
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interrupts = <50 51>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@73f88000 {
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compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
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reg = <0x73f88000 0x4000>;
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interrupts = <52 53>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio3: gpio@73f8c000 {
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compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
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reg = <0x73f8c000 0x4000>;
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interrupts = <54 55>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio4: gpio@73f90000 {
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compatible = "fsl,imx51-gpio", "fsl,imx35-gpio";
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reg = <0x73f90000 0x4000>;
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interrupts = <56 57>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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kpp: kpp@73f94000 {
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compatible = "fsl,imx51-kpp", "fsl,imx21-kpp";
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reg = <0x73f94000 0x4000>;
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interrupts = <60>;
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clocks = <&clks IMX5_CLK_DUMMY>;
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status = "disabled";
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};
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wdog1: wdog@73f98000 {
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compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
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reg = <0x73f98000 0x4000>;
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interrupts = <58>;
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clocks = <&clks IMX5_CLK_DUMMY>;
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};
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wdog2: wdog@73f9c000 {
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compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
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reg = <0x73f9c000 0x4000>;
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interrupts = <59>;
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clocks = <&clks IMX5_CLK_DUMMY>;
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status = "disabled";
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};
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gpt: timer@73fa0000 {
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compatible = "fsl,imx51-gpt", "fsl,imx31-gpt";
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reg = <0x73fa0000 0x4000>;
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interrupts = <39>;
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clocks = <&clks IMX5_CLK_GPT_IPG_GATE>,
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<&clks IMX5_CLK_GPT_HF_GATE>;
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clock-names = "ipg", "per";
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};
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iomuxc: iomuxc@73fa8000 {
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compatible = "fsl,imx51-iomuxc";
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reg = <0x73fa8000 0x4000>;
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};
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pwm1: pwm@73fb4000 {
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#pwm-cells = <2>;
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compatible = "fsl,imx51-pwm", "fsl,imx27-pwm";
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reg = <0x73fb4000 0x4000>;
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clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
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<&clks IMX5_CLK_PWM1_HF_GATE>;
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clock-names = "ipg", "per";
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interrupts = <61>;
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};
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pwm2: pwm@73fb8000 {
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#pwm-cells = <2>;
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compatible = "fsl,imx51-pwm", "fsl,imx27-pwm";
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reg = <0x73fb8000 0x4000>;
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clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,
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<&clks IMX5_CLK_PWM2_HF_GATE>;
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clock-names = "ipg", "per";
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interrupts = <94>;
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};
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uart1: serial@73fbc000 {
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compatible = "fsl,imx51-uart", "fsl,imx21-uart";
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reg = <0x73fbc000 0x4000>;
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interrupts = <31>;
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clocks = <&clks IMX5_CLK_UART1_IPG_GATE>,
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<&clks IMX5_CLK_UART1_PER_GATE>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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uart2: serial@73fc0000 {
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compatible = "fsl,imx51-uart", "fsl,imx21-uart";
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reg = <0x73fc0000 0x4000>;
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interrupts = <32>;
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clocks = <&clks IMX5_CLK_UART2_IPG_GATE>,
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<&clks IMX5_CLK_UART2_PER_GATE>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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src: src@73fd0000 {
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compatible = "fsl,imx51-src";
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reg = <0x73fd0000 0x4000>;
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#reset-cells = <1>;
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};
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clks: ccm@73fd4000{
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compatible = "fsl,imx51-ccm";
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reg = <0x73fd4000 0x4000>;
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interrupts = <0 71 0x04 0 72 0x04>;
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#clock-cells = <1>;
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};
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};
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aips@80000000 { /* AIPS2 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x80000000 0x10000000>;
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ranges;
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iim: iim@83f98000 {
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compatible = "fsl,imx51-iim", "fsl,imx27-iim";
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reg = <0x83f98000 0x4000>;
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interrupts = <69>;
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clocks = <&clks IMX5_CLK_IIM_GATE>;
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};
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owire: owire@83fa4000 {
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compatible = "fsl,imx51-owire", "fsl,imx21-owire";
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reg = <0x83fa4000 0x4000>;
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interrupts = <88>;
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clocks = <&clks IMX5_CLK_OWIRE_GATE>;
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status = "disabled";
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};
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ecspi2: ecspi@83fac000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx51-ecspi";
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reg = <0x83fac000 0x4000>;
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interrupts = <37>;
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clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>,
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<&clks IMX5_CLK_ECSPI2_PER_GATE>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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sdma: sdma@83fb0000 {
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compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
|
|
reg = <0x83fb0000 0x4000>;
|
|
interrupts = <6>;
|
|
clocks = <&clks IMX5_CLK_SDMA_GATE>,
|
|
<&clks IMX5_CLK_SDMA_GATE>;
|
|
clock-names = "ipg", "ahb";
|
|
#dma-cells = <3>;
|
|
fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
|
|
};
|
|
|
|
cspi: cspi@83fc0000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
|
|
reg = <0x83fc0000 0x4000>;
|
|
interrupts = <38>;
|
|
clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>,
|
|
<&clks IMX5_CLK_CSPI_IPG_GATE>;
|
|
clock-names = "ipg", "per";
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c2: i2c@83fc4000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
|
|
reg = <0x83fc4000 0x4000>;
|
|
interrupts = <63>;
|
|
clocks = <&clks IMX5_CLK_I2C2_GATE>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c1: i2c@83fc8000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
|
|
reg = <0x83fc8000 0x4000>;
|
|
interrupts = <62>;
|
|
clocks = <&clks IMX5_CLK_I2C1_GATE>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ssi1: ssi@83fcc000 {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
|
|
reg = <0x83fcc000 0x4000>;
|
|
interrupts = <29>;
|
|
clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>,
|
|
<&clks IMX5_CLK_SSI1_ROOT_GATE>;
|
|
clock-names = "ipg", "baud";
|
|
dmas = <&sdma 28 0 0>,
|
|
<&sdma 29 0 0>;
|
|
dma-names = "rx", "tx";
|
|
fsl,fifo-depth = <15>;
|
|
status = "disabled";
|
|
};
|
|
|
|
audmux: audmux@83fd0000 {
|
|
compatible = "fsl,imx51-audmux", "fsl,imx31-audmux";
|
|
reg = <0x83fd0000 0x4000>;
|
|
clocks = <&clks IMX5_CLK_DUMMY>;
|
|
clock-names = "audmux";
|
|
status = "disabled";
|
|
};
|
|
|
|
weim: weim@83fda000 {
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
compatible = "fsl,imx51-weim";
|
|
reg = <0x83fda000 0x1000>;
|
|
clocks = <&clks IMX5_CLK_EMI_SLOW_GATE>;
|
|
ranges = <
|
|
0 0 0xb0000000 0x08000000
|
|
1 0 0xb8000000 0x08000000
|
|
2 0 0xc0000000 0x08000000
|
|
3 0 0xc8000000 0x04000000
|
|
4 0 0xcc000000 0x02000000
|
|
5 0 0xce000000 0x02000000
|
|
>;
|
|
status = "disabled";
|
|
};
|
|
|
|
nfc: nand@83fdb000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "fsl,imx51-nand";
|
|
reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>;
|
|
interrupts = <8>;
|
|
clocks = <&clks IMX5_CLK_NFC_GATE>;
|
|
status = "disabled";
|
|
};
|
|
|
|
pata: pata@83fe0000 {
|
|
compatible = "fsl,imx51-pata", "fsl,imx27-pata";
|
|
reg = <0x83fe0000 0x4000>;
|
|
interrupts = <70>;
|
|
clocks = <&clks IMX5_CLK_PATA_GATE>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ssi3: ssi@83fe8000 {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";
|
|
reg = <0x83fe8000 0x4000>;
|
|
interrupts = <96>;
|
|
clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>,
|
|
<&clks IMX5_CLK_SSI3_ROOT_GATE>;
|
|
clock-names = "ipg", "baud";
|
|
dmas = <&sdma 46 0 0>,
|
|
<&sdma 47 0 0>;
|
|
dma-names = "rx", "tx";
|
|
fsl,fifo-depth = <15>;
|
|
status = "disabled";
|
|
};
|
|
|
|
fec: ethernet@83fec000 {
|
|
compatible = "fsl,imx51-fec", "fsl,imx27-fec";
|
|
reg = <0x83fec000 0x4000>;
|
|
interrupts = <87>;
|
|
clocks = <&clks IMX5_CLK_FEC_GATE>,
|
|
<&clks IMX5_CLK_FEC_GATE>,
|
|
<&clks IMX5_CLK_FEC_GATE>;
|
|
clock-names = "ipg", "ahb", "ptp";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
};
|