387720c938
Since everybody copied my own mistake from the DT binding example, let's address all the offenders in one swift go. Most of them got the CPU interface size wrong (4kB, while it should be 8kB), except for both keystone platforms which got the control interface wrong (4kB instead of 8kB). In a few cases where I knew for sure what implementation was used, I've added the "arm,gic-400" compatible string. I'm 99% sure that this is what everyone is using, but short of having the TRM for all the other SoCs, I've left them alone. Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
148 lines
3.3 KiB
Plaintext
148 lines
3.3 KiB
Plaintext
/*
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* Copyright (c) 2014 MundoReader S.L.
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* Author: Matthias Brugger <matthias.bgg@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "mediatek,mt6589";
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interrupt-parent = <&sysirq>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x1>;
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};
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cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x2>;
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};
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cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x3>;
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};
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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system_clk: dummy13m {
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compatible = "fixed-clock";
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clock-frequency = <13000000>;
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#clock-cells = <0>;
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};
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rtc_clk: dummy32k {
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compatible = "fixed-clock";
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clock-frequency = <32000>;
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#clock-cells = <0>;
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};
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uart_clk: dummy26m {
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compatible = "fixed-clock";
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clock-frequency = <26000000>;
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#clock-cells = <0>;
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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timer: timer@10008000 {
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compatible = "mediatek,mt6577-timer";
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reg = <0x10008000 0x80>;
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interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&system_clk>, <&rtc_clk>;
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clock-names = "system-clk", "rtc-clk";
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};
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sysirq: interrupt-controller@10200100 {
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compatible = "mediatek,mt6589-sysirq",
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"mediatek,mt6577-sysirq";
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interrupt-controller;
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#interrupt-cells = <3>;
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interrupt-parent = <&gic>;
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reg = <0x10200100 0x1c>;
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};
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gic: interrupt-controller@10211000 {
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compatible = "arm,cortex-a7-gic";
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interrupt-controller;
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#interrupt-cells = <3>;
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interrupt-parent = <&gic>;
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reg = <0x10211000 0x1000>,
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<0x10212000 0x2000>,
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<0x10214000 0x2000>,
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<0x10216000 0x2000>;
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};
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uart0: serial@11006000 {
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compatible = "mediatek,mt6577-uart";
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reg = <0x11006000 0x400>;
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interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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uart1: serial@11007000 {
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compatible = "mediatek,mt6577-uart";
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reg = <0x11007000 0x400>;
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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uart2: serial@11008000 {
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compatible = "mediatek,mt6577-uart";
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reg = <0x11008000 0x400>;
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interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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uart3: serial@11009000 {
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compatible = "mediatek,mt6577-uart";
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reg = <0x11009000 0x400>;
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interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>;
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status = "disabled";
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};
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wdt: watchdog@010000000 {
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compatible = "mediatek,mt6589-wdt";
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reg = <0x10000000 0x44>;
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};
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};
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};
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