![Icenowy Zheng](/assets/img/avatar_default.png)
Allwinner V3s SoC has an Ethernet MAC and an internal PHY like the ones in H3 SoC, however the MAC has no external *MII interfaces available at GPIOs, thus only MII connection to internal PHY is supported. Add this variant of EMAC to dwmac-sun8i driver. The default value of the syscon EMAC-related register seems to have changed from H3, but it seems to be a harmless change. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: David S. Miller <davem@davemloft.net>
696 lines
21 KiB
C
696 lines
21 KiB
C
/*******************************************************************************
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This contains the functions to handle the platform driver.
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Copyright (C) 2007-2011 STMicroelectronics Ltd
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_net.h>
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#include <linux/of_device.h>
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#include <linux/of_mdio.h>
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#include "stmmac.h"
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#include "stmmac_platform.h"
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#ifdef CONFIG_OF
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/**
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* dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
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* @mcast_bins: Multicast filtering bins
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* Description:
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* this function validates the number of Multicast filtering bins specified
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* by the configuration through the device tree. The Synopsys GMAC supports
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* 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
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* number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
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* to 7 bits, and 256 refers to 8 bits of the CRC. Any other setting is
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* invalid and will cause the filtering algorithm to use Multicast
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* promiscuous mode.
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*/
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static int dwmac1000_validate_mcast_bins(int mcast_bins)
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{
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int x = mcast_bins;
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switch (x) {
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case HASH_TABLE_SIZE:
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case 128:
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case 256:
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break;
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default:
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x = 0;
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pr_info("Hash table entries set to unexpected value %d",
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mcast_bins);
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break;
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}
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return x;
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}
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/**
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* dwmac1000_validate_ucast_entries - validate the Unicast address entries
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* @ucast_entries: number of Unicast address entries
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* Description:
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* This function validates the number of Unicast address entries supported
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* by a particular Synopsys 10/100/1000 controller. The Synopsys controller
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* supports 1, 32, 64, or 128 Unicast filter entries for it's Unicast filter
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* logic. This function validates a valid, supported configuration is
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* selected, and defaults to 1 Unicast address if an unsupported
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* configuration is selected.
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*/
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static int dwmac1000_validate_ucast_entries(int ucast_entries)
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{
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int x = ucast_entries;
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switch (x) {
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case 1:
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case 32:
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case 64:
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case 128:
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break;
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default:
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x = 1;
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pr_info("Unicast table entries set to unexpected value %d\n",
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ucast_entries);
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break;
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}
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return x;
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}
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/**
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* stmmac_axi_setup - parse DT parameters for programming the AXI register
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* @pdev: platform device
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* @priv: driver private struct.
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* Description:
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* if required, from device-tree the AXI internal register can be tuned
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* by using platform parameters.
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*/
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static struct stmmac_axi *stmmac_axi_setup(struct platform_device *pdev)
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{
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struct device_node *np;
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struct stmmac_axi *axi;
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np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0);
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if (!np)
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return NULL;
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axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL);
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if (!axi) {
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of_node_put(np);
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return ERR_PTR(-ENOMEM);
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}
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axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
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axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
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axi->axi_kbbe = of_property_read_bool(np, "snps,axi_kbbe");
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axi->axi_fb = of_property_read_bool(np, "snps,axi_fb");
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axi->axi_mb = of_property_read_bool(np, "snps,axi_mb");
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axi->axi_rb = of_property_read_bool(np, "snps,axi_rb");
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if (of_property_read_u32(np, "snps,wr_osr_lmt", &axi->axi_wr_osr_lmt))
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axi->axi_wr_osr_lmt = 1;
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if (of_property_read_u32(np, "snps,rd_osr_lmt", &axi->axi_rd_osr_lmt))
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axi->axi_rd_osr_lmt = 1;
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of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
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of_node_put(np);
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return axi;
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}
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/**
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* stmmac_mtl_setup - parse DT parameters for multiple queues configuration
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* @pdev: platform device
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*/
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static void stmmac_mtl_setup(struct platform_device *pdev,
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struct plat_stmmacenet_data *plat)
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{
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struct device_node *q_node;
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struct device_node *rx_node;
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struct device_node *tx_node;
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u8 queue = 0;
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/* For backwards-compatibility with device trees that don't have any
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* snps,mtl-rx-config or snps,mtl-tx-config properties, we fall back
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* to one RX and TX queues each.
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*/
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plat->rx_queues_to_use = 1;
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plat->tx_queues_to_use = 1;
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rx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-rx-config", 0);
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if (!rx_node)
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return;
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tx_node = of_parse_phandle(pdev->dev.of_node, "snps,mtl-tx-config", 0);
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if (!tx_node) {
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of_node_put(rx_node);
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return;
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}
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/* Processing RX queues common config */
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if (of_property_read_u8(rx_node, "snps,rx-queues-to-use",
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&plat->rx_queues_to_use))
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plat->rx_queues_to_use = 1;
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if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
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plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
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else if (of_property_read_bool(rx_node, "snps,rx-sched-wsp"))
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plat->rx_sched_algorithm = MTL_RX_ALGORITHM_WSP;
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else
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plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
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/* Processing individual RX queue config */
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for_each_child_of_node(rx_node, q_node) {
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if (queue >= plat->rx_queues_to_use)
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break;
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if (of_property_read_bool(q_node, "snps,dcb-algorithm"))
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plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
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else if (of_property_read_bool(q_node, "snps,avb-algorithm"))
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plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
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else
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plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
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if (of_property_read_u8(q_node, "snps,map-to-dma-channel",
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&plat->rx_queues_cfg[queue].chan))
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plat->rx_queues_cfg[queue].chan = queue;
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/* TODO: Dynamic mapping to be included in the future */
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if (of_property_read_u32(q_node, "snps,priority",
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&plat->rx_queues_cfg[queue].prio)) {
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plat->rx_queues_cfg[queue].prio = 0;
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plat->rx_queues_cfg[queue].use_prio = false;
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} else {
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plat->rx_queues_cfg[queue].use_prio = true;
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}
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/* RX queue specific packet type routing */
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if (of_property_read_bool(q_node, "snps,route-avcp"))
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plat->rx_queues_cfg[queue].pkt_route = PACKET_AVCPQ;
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else if (of_property_read_bool(q_node, "snps,route-ptp"))
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plat->rx_queues_cfg[queue].pkt_route = PACKET_PTPQ;
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else if (of_property_read_bool(q_node, "snps,route-dcbcp"))
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plat->rx_queues_cfg[queue].pkt_route = PACKET_DCBCPQ;
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else if (of_property_read_bool(q_node, "snps,route-up"))
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plat->rx_queues_cfg[queue].pkt_route = PACKET_UPQ;
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else if (of_property_read_bool(q_node, "snps,route-multi-broad"))
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plat->rx_queues_cfg[queue].pkt_route = PACKET_MCBCQ;
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else
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plat->rx_queues_cfg[queue].pkt_route = 0x0;
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queue++;
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}
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/* Processing TX queues common config */
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if (of_property_read_u8(tx_node, "snps,tx-queues-to-use",
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&plat->tx_queues_to_use))
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plat->tx_queues_to_use = 1;
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if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
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plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
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else if (of_property_read_bool(tx_node, "snps,tx-sched-wfq"))
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plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WFQ;
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else if (of_property_read_bool(tx_node, "snps,tx-sched-dwrr"))
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plat->tx_sched_algorithm = MTL_TX_ALGORITHM_DWRR;
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else if (of_property_read_bool(tx_node, "snps,tx-sched-sp"))
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plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
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else
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plat->tx_sched_algorithm = MTL_TX_ALGORITHM_SP;
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queue = 0;
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/* Processing individual TX queue config */
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for_each_child_of_node(tx_node, q_node) {
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if (queue >= plat->tx_queues_to_use)
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break;
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if (of_property_read_u8(q_node, "snps,weight",
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&plat->tx_queues_cfg[queue].weight))
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plat->tx_queues_cfg[queue].weight = 0x10 + queue;
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if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
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plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
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} else if (of_property_read_bool(q_node,
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"snps,avb-algorithm")) {
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plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_AVB;
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/* Credit Base Shaper parameters used by AVB */
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if (of_property_read_u32(q_node, "snps,send_slope",
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&plat->tx_queues_cfg[queue].send_slope))
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plat->tx_queues_cfg[queue].send_slope = 0x0;
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if (of_property_read_u32(q_node, "snps,idle_slope",
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&plat->tx_queues_cfg[queue].idle_slope))
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plat->tx_queues_cfg[queue].idle_slope = 0x0;
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if (of_property_read_u32(q_node, "snps,high_credit",
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&plat->tx_queues_cfg[queue].high_credit))
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plat->tx_queues_cfg[queue].high_credit = 0x0;
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if (of_property_read_u32(q_node, "snps,low_credit",
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&plat->tx_queues_cfg[queue].low_credit))
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plat->tx_queues_cfg[queue].low_credit = 0x0;
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} else {
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plat->tx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
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}
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if (of_property_read_u32(q_node, "snps,priority",
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&plat->tx_queues_cfg[queue].prio)) {
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plat->tx_queues_cfg[queue].prio = 0;
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plat->tx_queues_cfg[queue].use_prio = false;
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} else {
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plat->tx_queues_cfg[queue].use_prio = true;
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}
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queue++;
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}
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of_node_put(rx_node);
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of_node_put(tx_node);
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of_node_put(q_node);
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}
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/**
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* stmmac_dt_phy - parse device-tree driver parameters to allocate PHY resources
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* @plat: driver data platform structure
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* @np: device tree node
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* @dev: device pointer
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* Description:
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* The mdio bus will be allocated in case of a phy transceiver is on board;
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* it will be NULL if the fixed-link is configured.
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* If there is the "snps,dwmac-mdio" sub-node the mdio will be allocated
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* in any case (for DSA, mdio must be registered even if fixed-link).
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* The table below sums the supported configurations:
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* -------------------------------
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* snps,phy-addr | Y
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* -------------------------------
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* phy-handle | Y
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* -------------------------------
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* fixed-link | N
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* -------------------------------
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* snps,dwmac-mdio |
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* even if | Y
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* fixed-link |
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* -------------------------------
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*
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* It returns 0 in case of success otherwise -ENODEV.
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*/
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static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
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struct device_node *np, struct device *dev)
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{
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bool mdio = true;
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static const struct of_device_id need_mdio_ids[] = {
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{ .compatible = "snps,dwc-qos-ethernet-4.10" },
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{ .compatible = "allwinner,sun8i-a83t-emac" },
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{ .compatible = "allwinner,sun8i-h3-emac" },
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{ .compatible = "allwinner,sun8i-v3s-emac" },
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{ .compatible = "allwinner,sun50i-a64-emac" },
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};
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/* If phy-handle property is passed from DT, use it as the PHY */
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plat->phy_node = of_parse_phandle(np, "phy-handle", 0);
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if (plat->phy_node)
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dev_dbg(dev, "Found phy-handle subnode\n");
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/* If phy-handle is not specified, check if we have a fixed-phy */
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if (!plat->phy_node && of_phy_is_fixed_link(np)) {
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if ((of_phy_register_fixed_link(np) < 0))
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return -ENODEV;
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dev_dbg(dev, "Found fixed-link subnode\n");
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plat->phy_node = of_node_get(np);
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mdio = false;
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}
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if (of_match_node(need_mdio_ids, np)) {
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plat->mdio_node = of_get_child_by_name(np, "mdio");
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} else {
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/**
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* If snps,dwmac-mdio is passed from DT, always register
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* the MDIO
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*/
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for_each_child_of_node(np, plat->mdio_node) {
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if (of_device_is_compatible(plat->mdio_node,
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"snps,dwmac-mdio"))
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break;
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}
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}
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if (plat->mdio_node) {
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dev_dbg(dev, "Found MDIO subnode\n");
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mdio = true;
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}
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if (mdio)
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plat->mdio_bus_data =
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devm_kzalloc(dev, sizeof(struct stmmac_mdio_bus_data),
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GFP_KERNEL);
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return 0;
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}
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/**
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* stmmac_probe_config_dt - parse device-tree driver parameters
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* @pdev: platform_device structure
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* @mac: MAC address to use
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* Description:
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* this function is to read the driver parameters from device-tree and
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* set some private fields that will be used by the main at runtime.
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*/
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struct plat_stmmacenet_data *
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stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
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{
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struct device_node *np = pdev->dev.of_node;
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struct plat_stmmacenet_data *plat;
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struct stmmac_dma_cfg *dma_cfg;
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plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
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if (!plat)
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return ERR_PTR(-ENOMEM);
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*mac = of_get_mac_address(np);
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plat->interface = of_get_phy_mode(np);
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/* Get max speed of operation from device tree */
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if (of_property_read_u32(np, "max-speed", &plat->max_speed))
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plat->max_speed = -1;
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plat->bus_id = of_alias_get_id(np, "ethernet");
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if (plat->bus_id < 0)
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plat->bus_id = 0;
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/* Default to phy auto-detection */
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plat->phy_addr = -1;
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/* "snps,phy-addr" is not a standard property. Mark it as deprecated
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* and warn of its use. Remove this when phy node support is added.
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*/
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if (of_property_read_u32(np, "snps,phy-addr", &plat->phy_addr) == 0)
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dev_warn(&pdev->dev, "snps,phy-addr property is deprecated\n");
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/* To Configure PHY by using all device-tree supported properties */
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if (stmmac_dt_phy(plat, np, &pdev->dev))
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return ERR_PTR(-ENODEV);
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of_property_read_u32(np, "tx-fifo-depth", &plat->tx_fifo_size);
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of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
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plat->force_sf_dma_mode =
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of_property_read_bool(np, "snps,force_sf_dma_mode");
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plat->en_tx_lpi_clockgating =
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of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
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/* Set the maxmtu to a default of JUMBO_LEN in case the
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* parameter is not present in the device tree.
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*/
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plat->maxmtu = JUMBO_LEN;
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/* Set default value for multicast hash bins */
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plat->multicast_filter_bins = HASH_TABLE_SIZE;
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/* Set default value for unicast filter entries */
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plat->unicast_filter_entries = 1;
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/*
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* Currently only the properties needed on SPEAr600
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* are provided. All other properties should be added
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* once needed on other platforms.
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*/
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if (of_device_is_compatible(np, "st,spear600-gmac") ||
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of_device_is_compatible(np, "snps,dwmac-3.50a") ||
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of_device_is_compatible(np, "snps,dwmac-3.70a") ||
|
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of_device_is_compatible(np, "snps,dwmac")) {
|
|
/* Note that the max-frame-size parameter as defined in the
|
|
* ePAPR v1.1 spec is defined as max-frame-size, it's
|
|
* actually used as the IEEE definition of MAC Client
|
|
* data, or MTU. The ePAPR specification is confusing as
|
|
* the definition is max-frame-size, but usage examples
|
|
* are clearly MTUs
|
|
*/
|
|
of_property_read_u32(np, "max-frame-size", &plat->maxmtu);
|
|
of_property_read_u32(np, "snps,multicast-filter-bins",
|
|
&plat->multicast_filter_bins);
|
|
of_property_read_u32(np, "snps,perfect-filter-entries",
|
|
&plat->unicast_filter_entries);
|
|
plat->unicast_filter_entries = dwmac1000_validate_ucast_entries(
|
|
plat->unicast_filter_entries);
|
|
plat->multicast_filter_bins = dwmac1000_validate_mcast_bins(
|
|
plat->multicast_filter_bins);
|
|
plat->has_gmac = 1;
|
|
plat->pmt = 1;
|
|
}
|
|
|
|
if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
|
|
of_device_is_compatible(np, "snps,dwmac-4.10a")) {
|
|
plat->has_gmac4 = 1;
|
|
plat->has_gmac = 0;
|
|
plat->pmt = 1;
|
|
plat->tso_en = of_property_read_bool(np, "snps,tso");
|
|
}
|
|
|
|
if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
|
|
of_device_is_compatible(np, "snps,dwmac-3.710")) {
|
|
plat->enh_desc = 1;
|
|
plat->bugged_jumbo = 1;
|
|
plat->force_sf_dma_mode = 1;
|
|
}
|
|
|
|
dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*dma_cfg),
|
|
GFP_KERNEL);
|
|
if (!dma_cfg) {
|
|
stmmac_remove_config_dt(pdev, plat);
|
|
return ERR_PTR(-ENOMEM);
|
|
}
|
|
plat->dma_cfg = dma_cfg;
|
|
|
|
of_property_read_u32(np, "snps,pbl", &dma_cfg->pbl);
|
|
if (!dma_cfg->pbl)
|
|
dma_cfg->pbl = DEFAULT_DMA_PBL;
|
|
of_property_read_u32(np, "snps,txpbl", &dma_cfg->txpbl);
|
|
of_property_read_u32(np, "snps,rxpbl", &dma_cfg->rxpbl);
|
|
dma_cfg->pblx8 = !of_property_read_bool(np, "snps,no-pbl-x8");
|
|
|
|
dma_cfg->aal = of_property_read_bool(np, "snps,aal");
|
|
dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
|
|
dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
|
|
|
|
plat->force_thresh_dma_mode = of_property_read_bool(np, "snps,force_thresh_dma_mode");
|
|
if (plat->force_thresh_dma_mode) {
|
|
plat->force_sf_dma_mode = 0;
|
|
pr_warn("force_sf_dma_mode is ignored if force_thresh_dma_mode is set.");
|
|
}
|
|
|
|
of_property_read_u32(np, "snps,ps-speed", &plat->mac_port_sel_speed);
|
|
|
|
plat->axi = stmmac_axi_setup(pdev);
|
|
|
|
stmmac_mtl_setup(pdev, plat);
|
|
|
|
/* clock setup */
|
|
plat->stmmac_clk = devm_clk_get(&pdev->dev,
|
|
STMMAC_RESOURCE_NAME);
|
|
if (IS_ERR(plat->stmmac_clk)) {
|
|
dev_warn(&pdev->dev, "Cannot get CSR clock\n");
|
|
plat->stmmac_clk = NULL;
|
|
}
|
|
clk_prepare_enable(plat->stmmac_clk);
|
|
|
|
plat->pclk = devm_clk_get(&pdev->dev, "pclk");
|
|
if (IS_ERR(plat->pclk)) {
|
|
if (PTR_ERR(plat->pclk) == -EPROBE_DEFER)
|
|
goto error_pclk_get;
|
|
|
|
plat->pclk = NULL;
|
|
}
|
|
clk_prepare_enable(plat->pclk);
|
|
|
|
/* Fall-back to main clock in case of no PTP ref is passed */
|
|
plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "ptp_ref");
|
|
if (IS_ERR(plat->clk_ptp_ref)) {
|
|
plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
|
|
plat->clk_ptp_ref = NULL;
|
|
dev_warn(&pdev->dev, "PTP uses main clock\n");
|
|
} else {
|
|
plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
|
|
dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate);
|
|
}
|
|
|
|
plat->stmmac_rst = devm_reset_control_get(&pdev->dev,
|
|
STMMAC_RESOURCE_NAME);
|
|
if (IS_ERR(plat->stmmac_rst)) {
|
|
if (PTR_ERR(plat->stmmac_rst) == -EPROBE_DEFER)
|
|
goto error_hw_init;
|
|
|
|
dev_info(&pdev->dev, "no reset control found\n");
|
|
plat->stmmac_rst = NULL;
|
|
}
|
|
|
|
return plat;
|
|
|
|
error_hw_init:
|
|
clk_disable_unprepare(plat->pclk);
|
|
error_pclk_get:
|
|
clk_disable_unprepare(plat->stmmac_clk);
|
|
|
|
return ERR_PTR(-EPROBE_DEFER);
|
|
}
|
|
|
|
/**
|
|
* stmmac_remove_config_dt - undo the effects of stmmac_probe_config_dt()
|
|
* @pdev: platform_device structure
|
|
* @plat: driver data platform structure
|
|
*
|
|
* Release resources claimed by stmmac_probe_config_dt().
|
|
*/
|
|
void stmmac_remove_config_dt(struct platform_device *pdev,
|
|
struct plat_stmmacenet_data *plat)
|
|
{
|
|
struct device_node *np = pdev->dev.of_node;
|
|
|
|
if (of_phy_is_fixed_link(np))
|
|
of_phy_deregister_fixed_link(np);
|
|
of_node_put(plat->phy_node);
|
|
of_node_put(plat->mdio_node);
|
|
}
|
|
#else
|
|
struct plat_stmmacenet_data *
|
|
stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
|
|
{
|
|
return ERR_PTR(-EINVAL);
|
|
}
|
|
|
|
void stmmac_remove_config_dt(struct platform_device *pdev,
|
|
struct plat_stmmacenet_data *plat)
|
|
{
|
|
}
|
|
#endif /* CONFIG_OF */
|
|
EXPORT_SYMBOL_GPL(stmmac_probe_config_dt);
|
|
EXPORT_SYMBOL_GPL(stmmac_remove_config_dt);
|
|
|
|
int stmmac_get_platform_resources(struct platform_device *pdev,
|
|
struct stmmac_resources *stmmac_res)
|
|
{
|
|
struct resource *res;
|
|
|
|
memset(stmmac_res, 0, sizeof(*stmmac_res));
|
|
|
|
/* Get IRQ information early to have an ability to ask for deferred
|
|
* probe if needed before we went too far with resource allocation.
|
|
*/
|
|
stmmac_res->irq = platform_get_irq_byname(pdev, "macirq");
|
|
if (stmmac_res->irq < 0) {
|
|
if (stmmac_res->irq != -EPROBE_DEFER) {
|
|
dev_err(&pdev->dev,
|
|
"MAC IRQ configuration information not found\n");
|
|
}
|
|
return stmmac_res->irq;
|
|
}
|
|
|
|
/* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
|
|
* The external wake up irq can be passed through the platform code
|
|
* named as "eth_wake_irq"
|
|
*
|
|
* In case the wake up interrupt is not passed from the platform
|
|
* so the driver will continue to use the mac irq (ndev->irq)
|
|
*/
|
|
stmmac_res->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
|
|
if (stmmac_res->wol_irq < 0) {
|
|
if (stmmac_res->wol_irq == -EPROBE_DEFER)
|
|
return -EPROBE_DEFER;
|
|
stmmac_res->wol_irq = stmmac_res->irq;
|
|
}
|
|
|
|
stmmac_res->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
|
|
if (stmmac_res->lpi_irq == -EPROBE_DEFER)
|
|
return -EPROBE_DEFER;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
stmmac_res->addr = devm_ioremap_resource(&pdev->dev, res);
|
|
|
|
return PTR_ERR_OR_ZERO(stmmac_res->addr);
|
|
}
|
|
EXPORT_SYMBOL_GPL(stmmac_get_platform_resources);
|
|
|
|
/**
|
|
* stmmac_pltfr_remove
|
|
* @pdev: platform device pointer
|
|
* Description: this function calls the main to free the net resources
|
|
* and calls the platforms hook and release the resources (e.g. mem).
|
|
*/
|
|
int stmmac_pltfr_remove(struct platform_device *pdev)
|
|
{
|
|
struct net_device *ndev = platform_get_drvdata(pdev);
|
|
struct stmmac_priv *priv = netdev_priv(ndev);
|
|
struct plat_stmmacenet_data *plat = priv->plat;
|
|
int ret = stmmac_dvr_remove(&pdev->dev);
|
|
|
|
if (plat->exit)
|
|
plat->exit(pdev, plat->bsp_priv);
|
|
|
|
stmmac_remove_config_dt(pdev, plat);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(stmmac_pltfr_remove);
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
/**
|
|
* stmmac_pltfr_suspend
|
|
* @dev: device pointer
|
|
* Description: this function is invoked when suspend the driver and it direcly
|
|
* call the main suspend function and then, if required, on some platform, it
|
|
* can call an exit helper.
|
|
*/
|
|
static int stmmac_pltfr_suspend(struct device *dev)
|
|
{
|
|
int ret;
|
|
struct net_device *ndev = dev_get_drvdata(dev);
|
|
struct stmmac_priv *priv = netdev_priv(ndev);
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
|
|
ret = stmmac_suspend(dev);
|
|
if (priv->plat->exit)
|
|
priv->plat->exit(pdev, priv->plat->bsp_priv);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* stmmac_pltfr_resume
|
|
* @dev: device pointer
|
|
* Description: this function is invoked when resume the driver before calling
|
|
* the main resume function, on some platforms, it can call own init helper
|
|
* if required.
|
|
*/
|
|
static int stmmac_pltfr_resume(struct device *dev)
|
|
{
|
|
struct net_device *ndev = dev_get_drvdata(dev);
|
|
struct stmmac_priv *priv = netdev_priv(ndev);
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
|
|
if (priv->plat->init)
|
|
priv->plat->init(pdev, priv->plat->bsp_priv);
|
|
|
|
return stmmac_resume(dev);
|
|
}
|
|
#endif /* CONFIG_PM_SLEEP */
|
|
|
|
SIMPLE_DEV_PM_OPS(stmmac_pltfr_pm_ops, stmmac_pltfr_suspend,
|
|
stmmac_pltfr_resume);
|
|
EXPORT_SYMBOL_GPL(stmmac_pltfr_pm_ops);
|
|
|
|
MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet platform support");
|
|
MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
|
|
MODULE_LICENSE("GPL");
|