bdd1853212
When DRM support for Samsung SoC and Samsung S3C framebuffer support are selected, the kernel crashes as it does not get the required platform data. Change the compile macro to CONFIG_DRM_EXYNOS_FIMD to fix this. Fixes the following boot time crash: Unable to handle kernel NULL pointer dereference at virtual address 00000000 PC is at 0x0 LR is at s3c_fb_probe+0x198/0x788 [<c0152270>] (s3c_fb_probe+0x198/0x788) from [<c019e52c>] (platform_drv_probe+0x18/0x1c) [<c019e52c>] (platform_drv_probe+0x18/0x1c) from [<c019d2e4>] (driver_probe_device+0x70/0x1f0) [<c019d2e4>] (driver_probe_device+0x70/0x1f0) from [<c019d4f0>] (__driver_attach+0x8c/0x90) [<c019d4f0>] (__driver_attach+0x8c/0x90) from [<c019bc3c>] (bus_for_each_dev+0x50/0x7c) [<c019bc3c>] (bus_for_each_dev+0x50/0x7c) from [<c019cb4c>] (bus_add_driver+0x170/0x23c) [<c019cb4c>] (bus_add_driver+0x170/0x23c) from [<c019d9a4>] (driver_register+0x78/0x144) [<c019d9a4>] (driver_register+0x78/0x144) from [<c000862c>] (do_one_initcall+0x34/0x174) [<c000862c>] (do_one_initcall+0x34/0x174) from [<c020ed7c>] (kernel_init+0x100/0x2a0) [<c020ed7c>] (kernel_init+0x100/0x2a0) from [<c000e118>] (ret_from_fork+0x14/0x3c) Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
400 lines
10 KiB
C
400 lines
10 KiB
C
/*
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* linux/arch/arm/mach-exynos4/mach-smdk4x12.c
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/input.h>
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#include <linux/io.h>
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#include <linux/lcd.h>
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#include <linux/mfd/max8997.h>
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#include <linux/mmc/host.h>
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#include <linux/platform_device.h>
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#include <linux/pwm.h>
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#include <linux/pwm_backlight.h>
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#include <linux/regulator/machine.h>
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#include <linux/serial_core.h>
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#include <linux/platform_data/i2c-s3c2410.h>
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#include <linux/platform_data/s3c-hsotg.h>
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#include <asm/mach/arch.h>
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#include <asm/hardware/gic.h>
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#include <asm/mach-types.h>
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#include <video/samsung_fimd.h>
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#include <plat/backlight.h>
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#include <plat/clock.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/fb.h>
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#include <plat/gpio-cfg.h>
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#include <plat/keypad.h>
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#include <plat/mfc.h>
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#include <plat/regs-serial.h>
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#include <plat/sdhci.h>
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#include <mach/map.h>
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#include <drm/exynos_drm.h>
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#include "common.h"
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/* Following are default values for UCON, ULCON and UFCON UART registers */
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#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
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S3C2410_UCON_RXILEVEL | \
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S3C2410_UCON_TXIRQMODE | \
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S3C2410_UCON_RXIRQMODE | \
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S3C2410_UCON_RXFIFO_TOI | \
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S3C2443_UCON_RXERR_IRQEN)
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#define SMDK4X12_ULCON_DEFAULT S3C2410_LCON_CS8
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#define SMDK4X12_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
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S5PV210_UFCON_TXTRIG4 | \
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S5PV210_UFCON_RXTRIG4)
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static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = SMDK4X12_UCON_DEFAULT,
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.ulcon = SMDK4X12_ULCON_DEFAULT,
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.ufcon = SMDK4X12_UFCON_DEFAULT,
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = SMDK4X12_UCON_DEFAULT,
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.ulcon = SMDK4X12_ULCON_DEFAULT,
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.ufcon = SMDK4X12_UFCON_DEFAULT,
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},
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[2] = {
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.hwport = 2,
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.flags = 0,
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.ucon = SMDK4X12_UCON_DEFAULT,
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.ulcon = SMDK4X12_ULCON_DEFAULT,
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.ufcon = SMDK4X12_UFCON_DEFAULT,
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},
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[3] = {
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.hwport = 3,
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.flags = 0,
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.ucon = SMDK4X12_UCON_DEFAULT,
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.ulcon = SMDK4X12_ULCON_DEFAULT,
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.ufcon = SMDK4X12_UFCON_DEFAULT,
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},
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};
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static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {
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.cd_type = S3C_SDHCI_CD_INTERNAL,
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#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
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.max_width = 8,
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.host_caps = MMC_CAP_8_BIT_DATA,
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#endif
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};
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static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = {
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.cd_type = S3C_SDHCI_CD_INTERNAL,
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};
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static struct regulator_consumer_supply max8997_buck1 =
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REGULATOR_SUPPLY("vdd_arm", NULL);
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static struct regulator_consumer_supply max8997_buck2 =
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REGULATOR_SUPPLY("vdd_int", NULL);
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static struct regulator_consumer_supply max8997_buck3 =
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REGULATOR_SUPPLY("vdd_g3d", NULL);
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static struct regulator_init_data max8997_buck1_data = {
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.constraints = {
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.name = "VDD_ARM_SMDK4X12",
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.min_uV = 925000,
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.max_uV = 1350000,
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.always_on = 1,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
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.state_mem = {
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.disabled = 1,
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},
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},
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.num_consumer_supplies = 1,
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.consumer_supplies = &max8997_buck1,
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};
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static struct regulator_init_data max8997_buck2_data = {
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.constraints = {
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.name = "VDD_INT_SMDK4X12",
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.min_uV = 950000,
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.max_uV = 1150000,
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.always_on = 1,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
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.state_mem = {
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.disabled = 1,
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},
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},
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.num_consumer_supplies = 1,
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.consumer_supplies = &max8997_buck2,
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};
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static struct regulator_init_data max8997_buck3_data = {
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.constraints = {
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.name = "VDD_G3D_SMDK4X12",
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.min_uV = 950000,
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.max_uV = 1150000,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
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REGULATOR_CHANGE_STATUS,
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.state_mem = {
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.disabled = 1,
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},
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},
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.num_consumer_supplies = 1,
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.consumer_supplies = &max8997_buck3,
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};
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static struct max8997_regulator_data smdk4x12_max8997_regulators[] = {
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{ MAX8997_BUCK1, &max8997_buck1_data },
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{ MAX8997_BUCK2, &max8997_buck2_data },
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{ MAX8997_BUCK3, &max8997_buck3_data },
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};
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static struct max8997_platform_data smdk4x12_max8997_pdata = {
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.num_regulators = ARRAY_SIZE(smdk4x12_max8997_regulators),
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.regulators = smdk4x12_max8997_regulators,
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.buck1_voltage[0] = 1100000, /* 1.1V */
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.buck1_voltage[1] = 1100000, /* 1.1V */
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.buck1_voltage[2] = 1100000, /* 1.1V */
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.buck1_voltage[3] = 1100000, /* 1.1V */
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.buck1_voltage[4] = 1100000, /* 1.1V */
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.buck1_voltage[5] = 1100000, /* 1.1V */
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.buck1_voltage[6] = 1000000, /* 1.0V */
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.buck1_voltage[7] = 950000, /* 0.95V */
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.buck2_voltage[0] = 1100000, /* 1.1V */
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.buck2_voltage[1] = 1000000, /* 1.0V */
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.buck2_voltage[2] = 950000, /* 0.95V */
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.buck2_voltage[3] = 900000, /* 0.9V */
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.buck2_voltage[4] = 1100000, /* 1.1V */
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.buck2_voltage[5] = 1000000, /* 1.0V */
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.buck2_voltage[6] = 950000, /* 0.95V */
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.buck2_voltage[7] = 900000, /* 0.9V */
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.buck5_voltage[0] = 1100000, /* 1.1V */
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.buck5_voltage[1] = 1100000, /* 1.1V */
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.buck5_voltage[2] = 1100000, /* 1.1V */
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.buck5_voltage[3] = 1100000, /* 1.1V */
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.buck5_voltage[4] = 1100000, /* 1.1V */
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.buck5_voltage[5] = 1100000, /* 1.1V */
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.buck5_voltage[6] = 1100000, /* 1.1V */
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.buck5_voltage[7] = 1100000, /* 1.1V */
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};
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static struct i2c_board_info smdk4x12_i2c_devs0[] __initdata = {
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{
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I2C_BOARD_INFO("max8997", 0x66),
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.platform_data = &smdk4x12_max8997_pdata,
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}
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};
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static struct i2c_board_info smdk4x12_i2c_devs1[] __initdata = {
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{ I2C_BOARD_INFO("wm8994", 0x1a), }
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};
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static struct i2c_board_info smdk4x12_i2c_devs3[] __initdata = {
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/* nothing here yet */
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};
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static struct i2c_board_info smdk4x12_i2c_devs7[] __initdata = {
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/* nothing here yet */
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};
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static struct samsung_bl_gpio_info smdk4x12_bl_gpio_info = {
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.no = EXYNOS4_GPD0(1),
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.func = S3C_GPIO_SFN(2),
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};
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static struct platform_pwm_backlight_data smdk4x12_bl_data = {
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.pwm_id = 1,
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.pwm_period_ns = 1000,
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};
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static struct pwm_lookup smdk4x12_pwm_lookup[] = {
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PWM_LOOKUP("s3c24xx-pwm.1", 0, "pwm-backlight.0", NULL),
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};
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static uint32_t smdk4x12_keymap[] __initdata = {
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/* KEY(row, col, keycode) */
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KEY(1, 3, KEY_1), KEY(1, 4, KEY_2), KEY(1, 5, KEY_3),
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KEY(1, 6, KEY_4), KEY(1, 7, KEY_5),
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KEY(2, 5, KEY_D), KEY(2, 6, KEY_A), KEY(2, 7, KEY_B),
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KEY(0, 7, KEY_E), KEY(0, 5, KEY_C)
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};
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static struct matrix_keymap_data smdk4x12_keymap_data __initdata = {
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.keymap = smdk4x12_keymap,
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.keymap_size = ARRAY_SIZE(smdk4x12_keymap),
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};
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static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = {
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.keymap_data = &smdk4x12_keymap_data,
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.rows = 3,
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.cols = 8,
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};
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#ifdef CONFIG_DRM_EXYNOS_FIMD
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static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
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.panel = {
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.timing = {
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.left_margin = 8,
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.right_margin = 8,
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.upper_margin = 6,
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.lower_margin = 6,
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.hsync_len = 6,
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.vsync_len = 4,
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.xres = 480,
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.yres = 800,
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},
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},
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.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
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.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
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.default_win = 0,
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.bpp = 32,
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};
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#else
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static struct s3c_fb_pd_win smdk4x12_fb_win0 = {
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.xres = 480,
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.yres = 800,
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.virtual_x = 480,
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.virtual_y = 800 * 2,
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.max_bpp = 32,
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.default_bpp = 24,
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};
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static struct fb_videomode smdk4x12_lcd_timing = {
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.left_margin = 8,
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.right_margin = 8,
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.upper_margin = 6,
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.lower_margin = 6,
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.hsync_len = 6,
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.vsync_len = 4,
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.xres = 480,
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.yres = 800,
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};
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static struct s3c_fb_platdata smdk4x12_lcd_pdata __initdata = {
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.win[0] = &smdk4x12_fb_win0,
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.vtiming = &smdk4x12_lcd_timing,
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.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
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.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
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.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
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};
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#endif
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/* USB OTG */
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static struct s3c_hsotg_plat smdk4x12_hsotg_pdata;
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static struct platform_device *smdk4x12_devices[] __initdata = {
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&s3c_device_hsmmc2,
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&s3c_device_hsmmc3,
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&s3c_device_i2c0,
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&s3c_device_i2c1,
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&s3c_device_i2c3,
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&s3c_device_i2c7,
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&s3c_device_rtc,
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&s3c_device_usb_hsotg,
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&s3c_device_wdt,
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&s5p_device_fimc0,
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&s5p_device_fimc1,
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&s5p_device_fimc2,
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&s5p_device_fimc3,
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&s5p_device_fimc_md,
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&s5p_device_fimd0,
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&s5p_device_mfc,
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&s5p_device_mfc_l,
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&s5p_device_mfc_r,
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&samsung_device_keypad,
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};
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static void __init smdk4x12_map_io(void)
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{
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exynos_init_io(NULL, 0);
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s3c24xx_init_clocks(clk_xusbxti.rate);
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s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
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}
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static void __init smdk4x12_reserve(void)
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{
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s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
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}
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static void __init smdk4x12_machine_init(void)
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{
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s3c_i2c0_set_platdata(NULL);
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i2c_register_board_info(0, smdk4x12_i2c_devs0,
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ARRAY_SIZE(smdk4x12_i2c_devs0));
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s3c_i2c1_set_platdata(NULL);
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i2c_register_board_info(1, smdk4x12_i2c_devs1,
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ARRAY_SIZE(smdk4x12_i2c_devs1));
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s3c_i2c3_set_platdata(NULL);
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i2c_register_board_info(3, smdk4x12_i2c_devs3,
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ARRAY_SIZE(smdk4x12_i2c_devs3));
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s3c_i2c7_set_platdata(NULL);
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i2c_register_board_info(7, smdk4x12_i2c_devs7,
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ARRAY_SIZE(smdk4x12_i2c_devs7));
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samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data);
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pwm_add_table(smdk4x12_pwm_lookup, ARRAY_SIZE(smdk4x12_pwm_lookup));
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samsung_keypad_set_platdata(&smdk4x12_keypad_data);
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s3c_sdhci2_set_platdata(&smdk4x12_hsmmc2_pdata);
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s3c_sdhci3_set_platdata(&smdk4x12_hsmmc3_pdata);
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s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata);
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#ifdef CONFIG_DRM_EXYNOS_FIMD
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s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
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exynos4_fimd0_gpio_setup_24bpp();
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#else
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s5p_fimd0_set_platdata(&smdk4x12_lcd_pdata);
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#endif
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platform_add_devices(smdk4x12_devices, ARRAY_SIZE(smdk4x12_devices));
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}
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MACHINE_START(SMDK4212, "SMDK4212")
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/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
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.atag_offset = 0x100,
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.smp = smp_ops(exynos_smp_ops),
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.init_irq = exynos4_init_irq,
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.map_io = smdk4x12_map_io,
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.handle_irq = gic_handle_irq,
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.init_machine = smdk4x12_machine_init,
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.timer = &exynos4_timer,
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.restart = exynos4_restart,
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.reserve = &smdk4x12_reserve,
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MACHINE_END
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MACHINE_START(SMDK4412, "SMDK4412")
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/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
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/* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
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.atag_offset = 0x100,
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.smp = smp_ops(exynos_smp_ops),
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.init_irq = exynos4_init_irq,
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.map_io = smdk4x12_map_io,
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.handle_irq = gic_handle_irq,
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.init_machine = smdk4x12_machine_init,
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.init_late = exynos_init_late,
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.timer = &exynos4_timer,
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.restart = exynos4_restart,
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.reserve = &smdk4x12_reserve,
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MACHINE_END
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