83ae20981a
The hardware reset value of bit CCM_CLPCR_LPM enables WAIT mode (WAIT_UNCLOCKED) by default. However this is undesirable because WAIT mode should only be enabled when there is a driver managing ARM clock gating. Correct the initial power mode to WAIT_CLOCKED (disable WAIT mode). While at it, the power mode after resuming is also set back to WAIT_CLOCKED from STOP_POWER_OFF. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
75 lines
1.8 KiB
C
75 lines
1.8 KiB
C
/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/suspend.h>
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#include <asm/cacheflush.h>
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#include <asm/proc-fns.h>
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#include <asm/suspend.h>
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#include <asm/hardware/cache-l2x0.h>
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#include "common.h"
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#include "hardware.h"
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extern unsigned long phys_l2x0_saved_regs;
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static int imx6q_suspend_finish(unsigned long val)
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{
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cpu_do_idle();
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return 0;
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}
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static int imx6q_pm_enter(suspend_state_t state)
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{
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switch (state) {
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case PM_SUSPEND_MEM:
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imx6q_set_lpm(STOP_POWER_OFF);
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imx_gpc_pre_suspend();
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imx_set_cpu_jump(0, v7_cpu_resume);
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/* Zzz ... */
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cpu_suspend(0, imx6q_suspend_finish);
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imx_smp_prepare();
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imx_gpc_post_resume();
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imx6q_set_lpm(WAIT_CLOCKED);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static const struct platform_suspend_ops imx6q_pm_ops = {
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.enter = imx6q_pm_enter,
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.valid = suspend_valid_only_mem,
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};
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void __init imx6q_pm_init(void)
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{
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/*
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* The l2x0 core code provides an infrastucture to save and restore
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* l2x0 registers across suspend/resume cycle. But because imx6q
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* retains L2 content during suspend and needs to resume L2 before
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* MMU is enabled, it can only utilize register saving support and
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* have to take care of restoring on its own. So we save physical
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* address of the data structure used by l2x0 core to save registers,
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* and later restore the necessary ones in imx6q resume entry.
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*/
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#ifdef CONFIG_CACHE_L2X0
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phys_l2x0_saved_regs = __pa(&l2x0_saved_regs);
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#endif
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suspend_set_ops(&imx6q_pm_ops);
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}
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