1585defb4c
In ARM multi-cluster systems the MPIDR affinity level 0 cannot be used as a single cpu identifier, affinity levels 1 and 2 must be taken into account as well. This patch extends the MPIDR usage to affinity levels 1 and 2 in versatile secondary cores start up code in order to compare the passed pen_release value with the full-blown affinity mask. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Pawel Moll <pawel.moll@arm.com>
42 lines
966 B
ArmAsm
42 lines
966 B
ArmAsm
/*
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* linux/arch/arm/plat-versatile/headsmp.S
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*
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* Copyright (c) 2003 ARM Limited
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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__INIT
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/*
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* Realview/Versatile Express specific entry point for secondary CPUs.
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* This provides a "holding pen" into which all secondary cores are held
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* until we're ready for them to initialise.
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*/
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ENTRY(versatile_secondary_startup)
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mrc p15, 0, r0, c0, c0, 5
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bic r0, #0xff000000
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adr r4, 1f
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ldmia r4, {r5, r6}
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sub r4, r4, r5
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add r6, r6, r4
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pen: ldr r7, [r6]
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cmp r7, r0
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bne pen
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/*
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* we've been released from the holding pen: secondary_stack
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* should now contain the SVC stack for this core
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*/
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b secondary_startup
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.align
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1: .long .
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.long pen_release
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ENDPROC(versatile_secondary_startup)
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