be94f6b710
Protection keys define a new 4-bit protection key field (PKEY) in bits 62:59 of leaf entries of the page tables, the PKEY is an index to PKRU register(16 domains), every domain has 2 bits(write disable bit, access disable bit). Static logic has been produced in update_pkru_bitmask, dynamic logic need read pkey from page table entries, get pkru value, and deduce the correct result. [ Huaitong: Xiao helps to modify many sections. ] Signed-off-by: Huaitong Han <huaitong.han@intel.com> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
113 lines
2.8 KiB
C
113 lines
2.8 KiB
C
#ifndef ASM_KVM_CACHE_REGS_H
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#define ASM_KVM_CACHE_REGS_H
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#define KVM_POSSIBLE_CR0_GUEST_BITS X86_CR0_TS
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#define KVM_POSSIBLE_CR4_GUEST_BITS \
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(X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR \
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| X86_CR4_OSXMMEXCPT | X86_CR4_PGE)
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static inline unsigned long kvm_register_read(struct kvm_vcpu *vcpu,
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enum kvm_reg reg)
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{
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if (!test_bit(reg, (unsigned long *)&vcpu->arch.regs_avail))
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kvm_x86_ops->cache_reg(vcpu, reg);
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return vcpu->arch.regs[reg];
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}
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static inline void kvm_register_write(struct kvm_vcpu *vcpu,
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enum kvm_reg reg,
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unsigned long val)
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{
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vcpu->arch.regs[reg] = val;
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__set_bit(reg, (unsigned long *)&vcpu->arch.regs_dirty);
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__set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail);
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}
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static inline unsigned long kvm_rip_read(struct kvm_vcpu *vcpu)
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{
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return kvm_register_read(vcpu, VCPU_REGS_RIP);
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}
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static inline void kvm_rip_write(struct kvm_vcpu *vcpu, unsigned long val)
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{
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kvm_register_write(vcpu, VCPU_REGS_RIP, val);
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}
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static inline u64 kvm_pdptr_read(struct kvm_vcpu *vcpu, int index)
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{
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might_sleep(); /* on svm */
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if (!test_bit(VCPU_EXREG_PDPTR,
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(unsigned long *)&vcpu->arch.regs_avail))
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kvm_x86_ops->cache_reg(vcpu, VCPU_EXREG_PDPTR);
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return vcpu->arch.walk_mmu->pdptrs[index];
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}
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static inline ulong kvm_read_cr0_bits(struct kvm_vcpu *vcpu, ulong mask)
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{
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ulong tmask = mask & KVM_POSSIBLE_CR0_GUEST_BITS;
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if (tmask & vcpu->arch.cr0_guest_owned_bits)
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kvm_x86_ops->decache_cr0_guest_bits(vcpu);
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return vcpu->arch.cr0 & mask;
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}
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static inline ulong kvm_read_cr0(struct kvm_vcpu *vcpu)
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{
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return kvm_read_cr0_bits(vcpu, ~0UL);
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}
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static inline ulong kvm_read_cr4_bits(struct kvm_vcpu *vcpu, ulong mask)
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{
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ulong tmask = mask & KVM_POSSIBLE_CR4_GUEST_BITS;
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if (tmask & vcpu->arch.cr4_guest_owned_bits)
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kvm_x86_ops->decache_cr4_guest_bits(vcpu);
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return vcpu->arch.cr4 & mask;
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}
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static inline ulong kvm_read_cr3(struct kvm_vcpu *vcpu)
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{
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if (!test_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail))
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kvm_x86_ops->decache_cr3(vcpu);
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return vcpu->arch.cr3;
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}
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static inline ulong kvm_read_cr4(struct kvm_vcpu *vcpu)
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{
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return kvm_read_cr4_bits(vcpu, ~0UL);
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}
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static inline u64 kvm_read_edx_eax(struct kvm_vcpu *vcpu)
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{
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return (kvm_register_read(vcpu, VCPU_REGS_RAX) & -1u)
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| ((u64)(kvm_register_read(vcpu, VCPU_REGS_RDX) & -1u) << 32);
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}
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static inline u32 kvm_read_pkru(struct kvm_vcpu *vcpu)
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{
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return kvm_x86_ops->get_pkru(vcpu);
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}
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static inline void enter_guest_mode(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.hflags |= HF_GUEST_MASK;
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}
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static inline void leave_guest_mode(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.hflags &= ~HF_GUEST_MASK;
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}
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static inline bool is_guest_mode(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.hflags & HF_GUEST_MASK;
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}
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static inline bool is_smm(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.hflags & HF_SMM_MASK;
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}
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#endif
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