![Ralf Baechle](/assets/img/avatar_default.png)
From Dave Johnson <djohnson+linuxmips@sw.starentnetworks.com>: sb1250_gettimeoffset() simply reads the current cpu 0 timer remaining value, however once this counter reaches 0 and the interrupt is raised, it immediately resets and begins to count down again. If sb1250_gettimeoffset() is called on cpu 1 via do_gettimeofday() after the timer has reset but prior to cpu 0 processing the interrupt and taking write_seqlock() in timer_interrupt() it will return a full value (or close to it) causing time to jump backwards 1ms. Once cpu 0 handles the interrupt and timer_interrupt() gets far enough along it will jump forward 1ms. Fix this problem by implementing mips_hpt_*() on sb1250 using a spare timer unrelated to the existing periodic interrupt timers. It runs at 1Mhz with a full 23bit counter. This eliminated the custom do_gettimeoffset() for sb1250 and allowed use of the generic fixed_rate_gettimeoffset() using mips_hpt_*() and timerhi/timerlo. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
75 lines
2.1 KiB
C
75 lines
2.1 KiB
C
/*
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* Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef _ASM_SIBYTE_SB1250_H
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#define _ASM_SIBYTE_SB1250_H
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/*
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* yymmddpp: year, month, day, patch.
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* should sync with Makefile EXTRAVERSION
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*/
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#define SIBYTE_RELEASE 0x02111403
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#define SB1250_NR_IRQS 64
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#define BCM1480_NR_IRQS 128
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#define BCM1480_NR_IRQS_HALF 64
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#define SB1250_DUART_MINOR_BASE 64
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#ifndef __ASSEMBLY__
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#include <asm/addrspace.h>
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/* For revision/pass information */
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#include <asm/sibyte/sb1250_scd.h>
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#include <asm/sibyte/bcm1480_scd.h>
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extern unsigned int sb1_pass;
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extern unsigned int soc_pass;
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extern unsigned int soc_type;
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extern unsigned int periph_rev;
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extern unsigned int zbbus_mhz;
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extern void sb1250_hpt_setup(void);
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extern void sb1250_time_init(void);
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extern void sb1250_mask_irq(int cpu, int irq);
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extern void sb1250_unmask_irq(int cpu, int irq);
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extern void sb1250_smp_finish(void);
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extern void bcm1480_time_init(void);
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extern unsigned long bcm1480_gettimeoffset(void);
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extern void bcm1480_mask_irq(int cpu, int irq);
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extern void bcm1480_unmask_irq(int cpu, int irq);
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extern void bcm1480_smp_finish(void);
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extern void prom_printf(char *fmt, ...);
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#define AT_spin \
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__asm__ __volatile__ ( \
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".set noat\n" \
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"li $at, 0\n" \
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"1: beqz $at, 1b\n" \
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".set at\n" \
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)
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#endif
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#define IOADDR(a) ((volatile void __iomem *)(IO_BASE + (a)))
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#endif
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