irqchip/gic-v3-its: Honor hypervisor enforced LPI range
A recent extension to the GIC architecture allows a hypervisor to arbitrarily reduce the number of LPIs available to a guest, no matter what the GIC says about the valid range of IntIDs. Let's factor in this information when computing the number of available LPIs Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -1541,8 +1541,17 @@ out:
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static int __init its_lpi_init(u32 id_bits)
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{
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u32 lpis = (1UL << id_bits) - 8192;
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u32 numlpis;
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int err;
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numlpis = 1UL << GICD_TYPER_NUM_LPIS(gic_rdists->gicd_typer);
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if (numlpis > 2 && !WARN_ON(numlpis > lpis)) {
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lpis = numlpis;
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pr_info("ITS: Using hypervisor restricted LPI range [%u]\n",
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lpis);
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}
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/*
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* Initializing the allocator is just the same as freeing the
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* full range of LPIs.
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@ -73,6 +73,7 @@
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#define GICD_TYPER_MBIS (1U << 16)
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#define GICD_TYPER_ID_BITS(typer) ((((typer) >> 19) & 0x1f) + 1)
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#define GICD_TYPER_NUM_LPIS(typer) ((((typer) >> 11) & 0x1f) + 1)
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#define GICD_TYPER_IRQS(typer) ((((typer) & 0x1f) + 1) * 32)
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#define GICD_IROUTER_SPI_MODE_ONE (0U << 31)
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