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Merge branches 'pci/aer', 'pci/enumeration', 'pci/kconfig', 'pci/misc', 'pci/virtualization' and 'pci/vpd' into next

Browse source 
* pci/aer:
  PCI/AER: Log aer_inject error injections
  PCI/AER: Log actual error causes in aer_inject
  PCI/AER: Use dev_warn() in aer_inject
  PCI/AER: Fix aer_inject error codes

* pci/enumeration:
  PCI: Fix broken URL for Dell biosdevname

* pci/kconfig:
  PCI: Cleanup pci/pcie/Kconfig whitespace
  PCI: Include pci/hotplug Kconfig directly from pci/Kconfig
  PCI: Include pci/pcie/Kconfig directly from pci/Kconfig

* pci/misc:
  PCI: Add PCI_CLASS_SERIAL_USB_DEVICE definition
  PCI: Add QEMU top-level IDs for (sub)vendor & device
  unicore32: Remove unused HAVE_ARCH_PCI_SET_DMA_MASK definition
  PCI: Consolidate PCI DMA constants and interfaces in linux/pci-dma-compat.h
  PCI: Move pci_dma_* helpers to common code
  frv/PCI: Remove stray pci_{alloc,free}_consistent() declaration

* pci/virtualization:
  PCI: Wait for up to 1000ms after FLR reset
  PCI: Support SR-IOV on any function type

* pci/vpd:
  PCI: Prevent VPD access for buggy devices
  PCI: Sleep rather than busy-wait for VPD access completion
  PCI: Fold struct pci_vpd_pci22 into struct pci_vpd
  PCI: Rename VPD symbols to remove unnecessary "pci22"
  PCI: Remove struct pci_vpd_ops.release function pointer
  PCI: Move pci_vpd_release() from header file to pci/access.c
  PCI: Move pci_read_vpd() and pci_write_vpd() close to other VPD code
  PCI: Determine actual VPD size on first access
  PCI: Use bitfield instead of bool for struct pci_vpd_pci22.busy
  PCI: Allow access to VPD attributes with size 0
  PCI: Update VPD definitions
This commit is contained in:
Bjorn Helgaas 2016-03-15 08:55:02 -05:00
parent a314966fad 8e47e15e91 6ca7227b3e cc73176cc9 7b78f48a04 5adecf817d 7c20078a81
commit 18e5e6913b
57 changed files with 343 additions and 268 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
arch/alpha/include/asm/pci.h
View file

@ -65,13 +65,6 @@ extern void pcibios_set_master(struct pci_dev *dev);
decisions. */
#define PCI_DMA_BUS_IS_PHYS 0
#ifdef CONFIG_PCI
/* implement the pci_ DMA API in terms of the generic device dma_ one */
#include <asm-generic/pci-dma-compat.h>
#endif
/* TODO: integrate with include/asm-generic/pci.h ? */
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
{

1
arch/arm/Kconfig
View file

@ -1212,7 +1212,6 @@ config PCI_HOST_ITE8152
select DMABOUNCE
source "drivers/pci/Kconfig"
source "drivers/pci/pcie/Kconfig"
source "drivers/pcmcia/Kconfig"

1
arch/arm/include/asm/pci.h
View file

@ -2,7 +2,6 @@
#define ASMARM_PCI_H
#ifdef __KERNEL__
#include <asm-generic/pci-dma-compat.h>
#include <asm/mach/pci.h> /* for pci_sys_data */
extern unsigned long pcibios_min_io;

2
arch/arm64/Kconfig
View file

@ -235,8 +235,6 @@ config PCI_SYSCALL
def_bool PCI
source "drivers/pci/Kconfig"
source "drivers/pci/pcie/Kconfig"
source "drivers/pci/hotplug/Kconfig"
endmenu

1
arch/arm64/include/asm/pci.h
View file

@ -7,7 +7,6 @@
#include <linux/dma-mapping.h>
#include <asm/io.h>
#include <asm-generic/pci-dma-compat.h>
#define PCIBIOS_MIN_IO 0x1000
#define PCIBIOS_MIN_MEM 0

2
arch/avr32/include/asm/pci.h
View file

@ -5,6 +5,4 @@
#define PCI_DMA_BUS_IS_PHYS (1)
#include <asm-generic/pci-dma-compat.h>
#endif /* __ASM_AVR32_PCI_H__ */

2
arch/blackfin/Kconfig
View file

@ -1233,8 +1233,6 @@ source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
source "drivers/pci/hotplug/Kconfig"
endmenu
menu "Executable file formats"

1
arch/blackfin/include/asm/pci.h
View file

@ -4,7 +4,6 @@
#define _ASM_BFIN_PCI_H
#include <linux/scatterlist.h>
#include <asm-generic/pci-dma-compat.h>
#include <asm-generic/pci.h>
#define PCIBIOS_MIN_IO 0x00001000

3
arch/cris/include/asm/pci.h
View file

@ -48,9 +48,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
#endif /* __KERNEL__ */
/* implement the pci_ DMA API in terms of the generic device dma_ one */
#include <asm-generic/pci-dma-compat.h>
/* generic pci stuff */
#include <asm-generic/pci.h>

7
arch/frv/include/asm/pci.h
View file

@ -15,7 +15,6 @@
#include <linux/mm.h>
#include <linux/scatterlist.h>
#include <asm-generic/pci-dma-compat.h>
#include <asm-generic/pci.h>
struct pci_dev;
@ -32,12 +31,6 @@ extern void consistent_sync_page(struct page *page, unsigned long offset,
size_t size, int direction);
#endif
extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
dma_addr_t *dma_handle);
extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,
void *vaddr, dma_addr_t dma_handle);
/* Return the index of the PCI controller for device PDEV. */
#define pci_controller_num(PDEV) (0)

4
arch/ia64/Kconfig
View file

@ -574,12 +574,8 @@ config PCI_DOMAINS
config PCI_SYSCALL
def_bool PCI
source "drivers/pci/pcie/Kconfig"
source "drivers/pci/Kconfig"
source "drivers/pci/hotplug/Kconfig"
source "drivers/pcmcia/Kconfig"
endmenu

2
arch/ia64/include/asm/pci.h
View file

@ -50,8 +50,6 @@ struct pci_dev;
extern unsigned long ia64_max_iommu_merge_mask;
#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)
#include <asm-generic/pci-dma-compat.h>
#define HAVE_PCI_MMAP
extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
enum pci_mmap_state mmap_state, int write_combine);

2
arch/m32r/Kconfig
View file

@ -386,8 +386,6 @@ config ISA
source "drivers/pcmcia/Kconfig"
source "drivers/pci/hotplug/Kconfig"
endmenu

1
arch/m68k/include/asm/pci.h
View file

@ -1,7 +1,6 @@
#ifndef _ASM_M68K_PCI_H
#define _ASM_M68K_PCI_H
#include <asm-generic/pci-dma-compat.h>
#include <asm-generic/pci.h>
/* The PCI address space does equal the physical memory

2
arch/microblaze/include/asm/pci.h
View file

@ -22,8 +22,6 @@
#include <asm/prom.h>
#include <asm/pci-bridge.h>
#include <asm-generic/pci-dma-compat.h>
#define PCIBIOS_MIN_IO 0x1000
#define PCIBIOS_MIN_MEM 0x10000000

4
arch/mips/Kconfig
View file

@ -2876,8 +2876,6 @@ config PCI_DOMAINS
source "drivers/pci/Kconfig"
source "drivers/pci/pcie/Kconfig"
#
# ISA support is now enabled via select. Too many systems still have the one
# or other ISA chip on the board that users don't know about so don't expect
@ -2937,8 +2935,6 @@ config ZONE_DMA32
source "drivers/pcmcia/Kconfig"
source "drivers/pci/hotplug/Kconfig"
config RAPIDIO
tristate "RapidIO support"
depends on PCI

3
arch/mips/include/asm/pci.h
View file

@ -124,9 +124,6 @@ static inline int pci_proc_domain(struct pci_bus *bus)
#endif /* __KERNEL__ */
/* implement the pci_ DMA API in terms of the generic device dma_ one */
#include <asm-generic/pci-dma-compat.h>
/* Do platform specific device initialization at pci_enable_device() time */
extern int pcibios_plat_dev_init(struct pci_dev *dev);

3
arch/mn10300/include/asm/pci.h
View file

@ -80,9 +80,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
#endif /* __KERNEL__ */
/* implement the pci_ DMA API in terms of the generic device dma_ one */
#include <asm-generic/pci-dma-compat.h>
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
{
return channel ? 15 : 14;

3
arch/parisc/include/asm/pci.h
View file

@ -194,9 +194,6 @@ extern void pcibios_init_bridge(struct pci_dev *);
#define PCIBIOS_MIN_IO 0x10
#define PCIBIOS_MIN_MEM 0x1000 /* NBPG - but pci/setup-res.c dies */
/* export the pci_ DMA API in terms of the dma_ one */
#include <asm-generic/pci-dma-compat.h>
static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
{
return channel ? 15 : 14;

4
arch/powerpc/Kconfig
View file

@ -828,14 +828,10 @@ config PCI_8260
select PPC_INDIRECT_PCI
default y
source "drivers/pci/pcie/Kconfig"
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
source "drivers/pci/hotplug/Kconfig"
config HAS_RAPIDIO
bool
default n

2
arch/powerpc/include/asm/pci.h
View file

@ -20,8 +20,6 @@
#include <asm/prom.h>
#include <asm/pci-bridge.h>
#include <asm-generic/pci-dma-compat.h>
/* Return values for pci_controller_ops.probe_mode function */
#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */
#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */

2
arch/s390/Kconfig
View file

@ -605,8 +605,6 @@ config PCI_NR_MSI
PCI devices.
source "drivers/pci/Kconfig"
source "drivers/pci/pcie/Kconfig"
source "drivers/pci/hotplug/Kconfig"
endif # PCI

1
arch/s390/include/asm/pci.h
View file

@ -9,7 +9,6 @@
#include <linux/pci.h>
#include <linux/mutex.h>
#include <asm-generic/pci.h>
#include <asm-generic/pci-dma-compat.h>
#include <asm/pci_clp.h>
#include <asm/pci_debug.h>

4
arch/sh/Kconfig
View file

@ -847,14 +847,10 @@ config PCI
config PCI_DOMAINS
bool
source "drivers/pci/pcie/Kconfig"
source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
source "drivers/pci/hotplug/Kconfig"
endmenu
menu "Executable file formats"

3
arch/sh/include/asm/pci.h
View file

@ -105,9 +105,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
return channel ? 15 : 14;
}
/* generic DMA-mapping stuff */
#include <asm-generic/pci-dma-compat.h>
#endif /* __KERNEL__ */
#endif /* __ASM_SH_PCI_H */

3
arch/sparc/include/asm/pci.h
View file

@ -5,7 +5,4 @@
#else
#include <asm/pci_32.h>
#endif
#include <asm-generic/pci-dma-compat.h>
#endif

4
arch/tile/Kconfig
View file

@ -455,8 +455,6 @@ config TILE_PCI_IO
source "drivers/pci/Kconfig"
source "drivers/pci/pcie/Kconfig"
config TILE_USB
tristate "Tilera USB host adapter support"
default y
@ -467,8 +465,6 @@ config TILE_USB
Provides USB host adapter support for the built-in EHCI and OHCI
interfaces on TILE-Gx chips.
source "drivers/pci/hotplug/Kconfig"
endmenu
menu "Executable file formats"

3
arch/tile/include/asm/pci.h
View file

@ -226,7 +226,4 @@ static inline int pcibios_assign_all_busses(void)
/* Use any cpu for PCI. */
#define cpumask_of_pcibus(bus) cpu_online_mask
/* implement the pci_ DMA API in terms of the generic device dma_ one */
#include <asm-generic/pci-dma-compat.h>
#endif /* _ASM_TILE_PCI_H */

1
arch/unicore32/include/asm/pci.h
View file

@ -13,7 +13,6 @@
#define __UNICORE_PCI_H__
#ifdef __KERNEL__
#include <asm-generic/pci-dma-compat.h>
#include <asm-generic/pci.h>
#include <mach/hardware.h> /* for PCIBIOS_MIN_* */

5
arch/unicore32/include/mach/hardware.h
View file

@ -28,11 +28,6 @@
#define PCIBIOS_MIN_IO 0x4000 /* should lower than 64KB */
#define PCIBIOS_MIN_MEM io_v2p(PKUNITY_PCIMEM_BASE)
/*
* We override the standard dma-mask routines for bouncing.
*/
#define HAVE_ARCH_PCI_SET_DMA_MASK
#define pcibios_assign_all_busses() 1
#endif /* __MACH_PUV3_HARDWARE_H__ */

4
arch/x86/Kconfig
View file

@ -2431,8 +2431,6 @@ config PCI_CNB20LE_QUIRK
You should say N unless you know you need this.
source "drivers/pci/pcie/Kconfig"
source "drivers/pci/Kconfig"
# x86_64 have no ISA slots, but can have ISA-style DMA.
@ -2588,8 +2586,6 @@ config AMD_NB
source "drivers/pcmcia/Kconfig"
source "drivers/pci/hotplug/Kconfig"
config RAPIDIO
tristate "RapidIO support"
depends on PCI

3
arch/x86/include/asm/pci.h
View file

@ -105,9 +105,6 @@ void native_restore_msi_irqs(struct pci_dev *dev);
#include <asm/pci_64.h>
#endif
/* implement the pci_ DMA API in terms of the generic device dma_ one */
#include <asm-generic/pci-dma-compat.h>
/* generic pci stuff */
#include <asm-generic/pci.h>

2
arch/xtensa/Kconfig
View file

@ -413,8 +413,6 @@ config FORCE_MAX_ZONEORDER
source "drivers/pcmcia/Kconfig"
source "drivers/pci/hotplug/Kconfig"
config PLATFORM_WANT_DEFAULT_MEM
def_bool n

3
arch/xtensa/include/asm/pci.h
View file

@ -55,9 +55,6 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
#endif /* __KERNEL__ */
/* Implement the pci_ DMA API in terms of the generic device dma_ one */
#include <asm-generic/pci-dma-compat.h>
/* Generic PCI */
#include <asm-generic/pci.h>

4
drivers/gpu/drm/bochs/bochs_drv.c
View file

@ -182,8 +182,8 @@ static const struct pci_device_id bochs_pci_tbl[] = {
{
.vendor = 0x1234,
.device = 0x1111,
.subvendor = 0x1af4,
.subdevice = 0x1100,
.subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
.subdevice = PCI_SUBDEVICE_ID_QEMU,
.driver_data = BOCHS_QEMU_STDVGA,
},
{

5
drivers/gpu/drm/cirrus/cirrus_drv.c
View file

@ -33,8 +33,9 @@ static struct drm_driver driver;
/* only bind to the cirrus chip in qemu */
static const struct pci_device_id pciidlist[] = {
{ PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5446, 0x1af4, 0x1100, 0,
0, 0 },
{ PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5446,
PCI_SUBVENDOR_ID_REDHAT_QUMRANET, PCI_SUBDEVICE_ID_QEMU,
0, 0, 0 },
{ PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_5446, PCI_VENDOR_ID_XEN,
0x0001, 0, 0, 0 },
{0,}

2
drivers/parisc/Kconfig
View file

@ -110,8 +110,6 @@ config IOMMU_HELPER
source "drivers/pcmcia/Kconfig"
source "drivers/pci/hotplug/Kconfig"
endmenu
menu "PA-RISC specific drivers"

4
drivers/pci/Kconfig
View file

@ -1,6 +1,9 @@
#
# PCI configuration
#
source "drivers/pci/pcie/Kconfig"
config PCI_BUS_ADDR_T_64BIT
def_bool y if (ARCH_DMA_ADDR_T_64BIT || 64BIT)
depends on PCI
@ -118,4 +121,5 @@ config PCI_LABEL
def_bool y if (DMI || ACPI)
select NLS
source "drivers/pci/hotplug/Kconfig"
source "drivers/pci/host/Kconfig"

239
drivers/pci/access.c
View file

@ -174,38 +174,6 @@ struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops)
}
EXPORT_SYMBOL(pci_bus_set_ops);
/**
* pci_read_vpd - Read one entry from Vital Product Data
* @dev: pci device struct
* @pos: offset in vpd space
* @count: number of bytes to read
* @buf: pointer to where to store result
*
*/
ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
{
if (!dev->vpd || !dev->vpd->ops)
return -ENODEV;
return dev->vpd->ops->read(dev, pos, count, buf);
}
EXPORT_SYMBOL(pci_read_vpd);
/**
* pci_write_vpd - Write entry to Vital Product Data
* @dev: pci device struct
* @pos: offset in vpd space
* @count: number of bytes to write
* @buf: buffer containing write data
*
*/
ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
{
if (!dev->vpd || !dev->vpd->ops)
return -ENODEV;
return dev->vpd->ops->write(dev, pos, count, buf);
}
EXPORT_SYMBOL(pci_write_vpd);
/*
* The following routines are to prevent the user from accessing PCI config
* space when it's unsafe to do so. Some devices require this during BIST and
@ -277,15 +245,91 @@ PCI_USER_WRITE_CONFIG(dword, u32)
/* VPD access through PCI 2.2+ VPD capability */
#define PCI_VPD_PCI22_SIZE (PCI_VPD_ADDR_MASK + 1)
/**
* pci_read_vpd - Read one entry from Vital Product Data
* @dev: pci device struct
* @pos: offset in vpd space
* @count: number of bytes to read
* @buf: pointer to where to store result
*/
ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
{
if (!dev->vpd || !dev->vpd->ops)
return -ENODEV;
return dev->vpd->ops->read(dev, pos, count, buf);
}
EXPORT_SYMBOL(pci_read_vpd);
struct pci_vpd_pci22 {
struct pci_vpd base;
struct mutex lock;
u16 flag;
bool busy;
u8 cap;
};
/**
* pci_write_vpd - Write entry to Vital Product Data
* @dev: pci device struct
* @pos: offset in vpd space
* @count: number of bytes to write
* @buf: buffer containing write data
*/
ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
{
if (!dev->vpd || !dev->vpd->ops)
return -ENODEV;
return dev->vpd->ops->write(dev, pos, count, buf);
}
EXPORT_SYMBOL(pci_write_vpd);
#define PCI_VPD_MAX_SIZE (PCI_VPD_ADDR_MASK + 1)
/**
* pci_vpd_size - determine actual size of Vital Product Data
* @dev: pci device struct
* @old_size: current assumed size, also maximum allowed size
*/
static size_t pci_vpd_size(struct pci_dev *dev, size_t old_size)
{
size_t off = 0;
unsigned char header[1+2]; /* 1 byte tag, 2 bytes length */
while (off < old_size &&
pci_read_vpd(dev, off, 1, header) == 1) {
unsigned char tag;
if (header[0] & PCI_VPD_LRDT) {
/* Large Resource Data Type Tag */
tag = pci_vpd_lrdt_tag(header);
/* Only read length from known tag items */
if ((tag == PCI_VPD_LTIN_ID_STRING) ||
(tag == PCI_VPD_LTIN_RO_DATA) ||
(tag == PCI_VPD_LTIN_RW_DATA)) {
if (pci_read_vpd(dev, off+1, 2,
&header[1]) != 2) {
dev_warn(&dev->dev,
"invalid large VPD tag %02x size at offset %zu",
tag, off + 1);
return 0;
}
off += PCI_VPD_LRDT_TAG_SIZE +
pci_vpd_lrdt_size(header);
}
} else {
/* Short Resource Data Type Tag */
off += PCI_VPD_SRDT_TAG_SIZE +
pci_vpd_srdt_size(header);
tag = pci_vpd_srdt_tag(header);
}
if (tag == PCI_VPD_STIN_END) /* End tag descriptor */
return off;
if ((tag != PCI_VPD_LTIN_ID_STRING) &&
(tag != PCI_VPD_LTIN_RO_DATA) &&
(tag != PCI_VPD_LTIN_RW_DATA)) {
dev_warn(&dev->dev,
"invalid %s VPD tag %02x at offset %zu",
(header[0] & PCI_VPD_LRDT) ? "large" : "short",
tag, off);
return 0;
}
}
return 0;
}
/*
* Wait for last operation to complete.
@ -295,55 +339,71 @@ struct pci_vpd_pci22 {
*
* Returns 0 on success, negative values indicate error.
*/
static int pci_vpd_pci22_wait(struct pci_dev *dev)
static int pci_vpd_wait(struct pci_dev *dev)
{
struct pci_vpd_pci22 *vpd =
container_of(dev->vpd, struct pci_vpd_pci22, base);
unsigned long timeout = jiffies + HZ/20 + 2;
struct pci_vpd *vpd = dev->vpd;
unsigned long timeout = jiffies + msecs_to_jiffies(50);
unsigned long max_sleep = 16;
u16 status;
int ret;
if (!vpd->busy)
return 0;
for (;;) {
while (time_before(jiffies, timeout)) {
ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
&status);
if (ret < 0)
return ret;
if ((status & PCI_VPD_ADDR_F) == vpd->flag) {
vpd->busy = false;
vpd->busy = 0;
return 0;
}
if (time_after(jiffies, timeout)) {
dev_printk(KERN_DEBUG, &dev->dev, "vpd r/w failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update\n");
return -ETIMEDOUT;
}
if (fatal_signal_pending(current))
return -EINTR;
if (!cond_resched())
udelay(10);
usleep_range(10, max_sleep);
if (max_sleep < 1024)
max_sleep *= 2;
}
dev_warn(&dev->dev, "VPD access failed. This is likely a firmware bug on this device. Contact the card vendor for a firmware update\n");
return -ETIMEDOUT;
}
static ssize_t pci_vpd_pci22_read(struct pci_dev *dev, loff_t pos, size_t count,
void *arg)
static ssize_t pci_vpd_read(struct pci_dev *dev, loff_t pos, size_t count,
void *arg)
{
struct pci_vpd_pci22 *vpd =
container_of(dev->vpd, struct pci_vpd_pci22, base);
struct pci_vpd *vpd = dev->vpd;
int ret;
loff_t end = pos + count;
u8 *buf = arg;
if (pos < 0 || pos > vpd->base.len || end > vpd->base.len)
if (pos < 0)
return -EINVAL;
if (!vpd->valid) {
vpd->valid = 1;
vpd->len = pci_vpd_size(dev, vpd->len);
}
if (vpd->len == 0)
return -EIO;
if (pos > vpd->len)
return 0;
if (end > vpd->len) {
end = vpd->len;
count = end - pos;
}
if (mutex_lock_killable(&vpd->lock))
return -EINTR;
ret = pci_vpd_pci22_wait(dev);
ret = pci_vpd_wait(dev);
if (ret < 0)
goto out;
@ -355,9 +415,9 @@ static ssize_t pci_vpd_pci22_read(struct pci_dev *dev, loff_t pos, size_t count,
pos & ~3);
if (ret < 0)
break;
vpd->busy = true;
vpd->busy = 1;
vpd->flag = PCI_VPD_ADDR_F;
ret = pci_vpd_pci22_wait(dev);
ret = pci_vpd_wait(dev);
if (ret < 0)
break;
@ -380,22 +440,32 @@ out:
return ret ? ret : count;
}
static ssize_t pci_vpd_pci22_write(struct pci_dev *dev, loff_t pos, size_t count,
const void *arg)
static ssize_t pci_vpd_write(struct pci_dev *dev, loff_t pos, size_t count,
const void *arg)
{
struct pci_vpd_pci22 *vpd =
container_of(dev->vpd, struct pci_vpd_pci22, base);
struct pci_vpd *vpd = dev->vpd;
const u8 *buf = arg;
loff_t end = pos + count;
int ret = 0;
if (pos < 0 || (pos & 3) || (count & 3) || end > vpd->base.len)
if (pos < 0 || (pos & 3) || (count & 3))
return -EINVAL;
if (!vpd->valid) {
vpd->valid = 1;
vpd->len = pci_vpd_size(dev, vpd->len);
}
if (vpd->len == 0)
return -EIO;
if (end > vpd->len)
return -EINVAL;
if (mutex_lock_killable(&vpd->lock))
return -EINTR;
ret = pci_vpd_pci22_wait(dev);
ret = pci_vpd_wait(dev);
if (ret < 0)
goto out;
@ -415,9 +485,9 @@ static ssize_t pci_vpd_pci22_write(struct pci_dev *dev, loff_t pos, size_t count
if (ret < 0)
break;
vpd->busy = true;
vpd->busy = 1;
vpd->flag = 0;
ret = pci_vpd_pci22_wait(dev);
ret = pci_vpd_wait(dev);
if (ret < 0)
break;
@ -428,15 +498,9 @@ out:
return ret ? ret : count;
}
static void pci_vpd_pci22_release(struct pci_dev *dev)
{
kfree(container_of(dev->vpd, struct pci_vpd_pci22, base));
}
static const struct pci_vpd_ops pci_vpd_pci22_ops = {
.read = pci_vpd_pci22_read,
.write = pci_vpd_pci22_write,
.release = pci_vpd_pci22_release,
static const struct pci_vpd_ops pci_vpd_ops = {
.read = pci_vpd_read,
.write = pci_vpd_write,
};
static ssize_t pci_vpd_f0_read(struct pci_dev *dev, loff_t pos, size_t count,
@ -472,12 +536,11 @@ static ssize_t pci_vpd_f0_write(struct pci_dev *dev, loff_t pos, size_t count,
static const struct pci_vpd_ops pci_vpd_f0_ops = {
.read = pci_vpd_f0_read,
.write = pci_vpd_f0_write,
.release = pci_vpd_pci22_release,
};
int pci_vpd_pci22_init(struct pci_dev *dev)
int pci_vpd_init(struct pci_dev *dev)
{
struct pci_vpd_pci22 *vpd;
struct pci_vpd *vpd;
u8 cap;
cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
@ -488,18 +551,24 @@ int pci_vpd_pci22_init(struct pci_dev *dev)
if (!vpd)
return -ENOMEM;
vpd->base.len = PCI_VPD_PCI22_SIZE;
vpd->len = PCI_VPD_MAX_SIZE;
if (dev->dev_flags & PCI_DEV_FLAGS_VPD_REF_F0)
vpd->base.ops = &pci_vpd_f0_ops;
vpd->ops = &pci_vpd_f0_ops;
else
vpd->base.ops = &pci_vpd_pci22_ops;
vpd->ops = &pci_vpd_ops;
mutex_init(&vpd->lock);
vpd->cap = cap;
vpd->busy = false;
dev->vpd = &vpd->base;
vpd->busy = 0;
vpd->valid = 0;
dev->vpd = vpd;
return 0;
}
void pci_vpd_release(struct pci_dev *dev)
{
kfree(dev->vpd);
}
/**
* pci_cfg_access_lock - Lock PCI config reads/writes
* @dev: pci device struct

4
drivers/pci/iov.c
View file

@ -387,10 +387,6 @@ static int sriov_init(struct pci_dev *dev, int pos)
struct resource *res;
struct pci_dev *pdev;
if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
return -ENODEV;
pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
if (ctrl & PCI_SRIOV_CTRL_VFE) {
pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);

2
drivers/pci/pci-label.c
View file

@ -16,7 +16,7 @@
* the instance number and string from the type 41 record and exports
* it to sysfs.
*
* Please see http://linux.dell.com/wiki/index.php/Oss/libnetdevname for more
* Please see http://linux.dell.com/files/biosdevname/ for more
* information.
*/

22
drivers/pci/pci-sysfs.c
View file

@ -769,10 +769,12 @@ static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
{
struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
if (off > bin_attr->size)
count = 0;
else if (count > bin_attr->size - off)
count = bin_attr->size - off;
if (bin_attr->size > 0) {
if (off > bin_attr->size)
count = 0;
else if (count > bin_attr->size - off)
count = bin_attr->size - off;
}
return pci_read_vpd(dev, off, count, buf);
}
@ -783,10 +785,12 @@ static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
{
struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
if (off > bin_attr->size)
count = 0;
else if (count > bin_attr->size - off)
count = bin_attr->size - off;
if (bin_attr->size > 0) {
if (off > bin_attr->size)
count = 0;
else if (count > bin_attr->size - off)
count = bin_attr->size - off;
}
return pci_write_vpd(dev, off, count, buf);
}
@ -1319,7 +1323,7 @@ static int pci_create_capabilities_sysfs(struct pci_dev *dev)
return -ENOMEM;
sysfs_bin_attr_init(attr);
attr->size = dev->vpd->len;
attr->size = 0;
attr->attr.name = "vpd";
attr->attr.mode = S_IRUSR | S_IWUSR;
attr->read = read_vpd_attr;

39
drivers/pci/pci.c
View file

@ -3385,18 +3385,6 @@ bool pci_check_and_unmask_intx(struct pci_dev *dev)
}
EXPORT_SYMBOL_GPL(pci_check_and_unmask_intx);
int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size)
{
return dma_set_max_seg_size(&dev->dev, size);
}
EXPORT_SYMBOL(pci_set_dma_max_seg_size);
int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask)
{
return dma_set_seg_boundary(&dev->dev, mask);
}
EXPORT_SYMBOL(pci_set_dma_seg_boundary);
/**
* pci_wait_for_pending_transaction - waits for pending transaction
* @dev: the PCI device to operate on
@ -3413,6 +3401,29 @@ int pci_wait_for_pending_transaction(struct pci_dev *dev)
}
EXPORT_SYMBOL(pci_wait_for_pending_transaction);
/*
* We should only need to wait 100ms after FLR, but some devices take longer.
* Wait for up to 1000ms for config space to return something other than -1.
* Intel IGD requires this when an LCD panel is attached. We read the 2nd
* dword because VFs don't implement the 1st dword.
*/
static void pci_flr_wait(struct pci_dev *dev)
{
int i = 0;
u32 id;
do {
msleep(100);
pci_read_config_dword(dev, PCI_COMMAND, &id);
} while (i++ < 10 && id == ~0);
if (id == ~0)
dev_warn(&dev->dev, "Failed to return from FLR\n");
else if (i > 1)
dev_info(&dev->dev, "Required additional %dms to return from FLR\n",
(i - 1) * 100);
}
static int pcie_flr(struct pci_dev *dev, int probe)
{
u32 cap;
@ -3428,7 +3439,7 @@ static int pcie_flr(struct pci_dev *dev, int probe)
dev_err(&dev->dev, "timed out waiting for pending transaction; performing function level reset anyway\n");
pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
msleep(100);
pci_flr_wait(dev);
return 0;
}
@ -3458,7 +3469,7 @@ static int pci_af_flr(struct pci_dev *dev, int probe)
dev_err(&dev->dev, "timed out waiting for pending transaction; performing AF function level reset anyway\n");
pci_write_config_byte(dev, pos + PCI_AF_CTRL, PCI_AF_CTRL_FLR);
msleep(100);
pci_flr_wait(dev);
return 0;
}

16
drivers/pci/pci.h
View file

@ -97,21 +97,21 @@ static inline bool pci_has_subordinate(struct pci_dev *pci_dev)
struct pci_vpd_ops {
ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
void (*release)(struct pci_dev *dev);
};
struct pci_vpd {
unsigned int len;
const struct pci_vpd_ops *ops;
struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
struct mutex lock;
unsigned int len;
u16 flag;
u8 cap;
u8 busy:1;
u8 valid:1;
};
int pci_vpd_pci22_init(struct pci_dev *dev);
static inline void pci_vpd_release(struct pci_dev *dev)
{
if (dev->vpd)
dev->vpd->ops->release(dev);
}
int pci_vpd_init(struct pci_dev *dev);
void pci_vpd_release(struct pci_dev *dev);
/* PCI /proc functions */
#ifdef CONFIG_PROC_FS

7
drivers/pci/pcie/Kconfig
View file

@ -44,6 +44,7 @@ config PCIEASPM
/sys/module/pcie_aspm/parameters/policy
When in doubt, say Y.
config PCIEASPM_DEBUG
bool "Debug PCI Express ASPM"
depends on PCIEASPM
@ -58,20 +59,20 @@ choice
depends on PCIEASPM
config PCIEASPM_DEFAULT
bool "BIOS default"
bool "BIOS default"
depends on PCIEASPM
help
Use the BIOS defaults for PCI Express ASPM.
config PCIEASPM_POWERSAVE
bool "Powersave"
bool "Powersave"
depends on PCIEASPM
help
Enable PCI Express ASPM L0s and L1 where possible, even if the
BIOS did not.
config PCIEASPM_PERFORMANCE
bool "Performance"
bool "Performance"
depends on PCIEASPM
help
Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them.

29
drivers/pci/pcie/aer/aer_inject.c
View file

@ -25,6 +25,7 @@
#include <linux/fs.h>
#include <linux/uaccess.h>
#include <linux/stddef.h>
#include <linux/device.h>
#include "aerdrv.h"
/* Override the existing corrected and uncorrected error masks */
@ -357,13 +358,15 @@ static int aer_inject(struct aer_error_inj *einj)
return -ENODEV;
rpdev = pcie_find_root_port(dev);
if (!rpdev) {
dev_err(&dev->dev, "aer_inject: Root port not found\n");
ret = -ENODEV;
goto out_put;
}
pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
if (!pos_cap_err) {
ret = -EPERM;
dev_err(&dev->dev, "aer_inject: Device doesn't support AER\n");
ret = -EPROTONOSUPPORT;
goto out_put;
}
pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
@ -373,7 +376,9 @@ static int aer_inject(struct aer_error_inj *einj)
rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
if (!rp_pos_cap_err) {
ret = -EPERM;
dev_err(&rpdev->dev,
"aer_inject: Root port doesn't support AER\n");
ret = -EPROTONOSUPPORT;
goto out_put;
}
@ -420,14 +425,16 @@ static int aer_inject(struct aer_error_inj *einj)
if (!aer_mask_override && einj->cor_status &&
!(einj->cor_status & ~cor_mask)) {
ret = -EINVAL;
printk(KERN_WARNING "The correctable error(s) is masked by device\n");
dev_warn(&dev->dev,
"aer_inject: The correctable error(s) is masked by device\n");
spin_unlock_irqrestore(&inject_lock, flags);
goto out_put;
}
if (!aer_mask_override && einj->uncor_status &&
!(einj->uncor_status & ~uncor_mask)) {
ret = -EINVAL;
printk(KERN_WARNING "The uncorrectable error(s) is masked by device\n");
dev_warn(&dev->dev,
"aer_inject: The uncorrectable error(s) is masked by device\n");
spin_unlock_irqrestore(&inject_lock, flags);
goto out_put;
}
@ -480,13 +487,19 @@ static int aer_inject(struct aer_error_inj *einj)
if (find_aer_device(rpdev, &edev)) {
if (!get_service_data(edev)) {
printk(KERN_WARNING "AER service is not initialized\n");
ret = -EINVAL;
dev_warn(&edev->device,
"aer_inject: AER service is not initialized\n");
ret = -EPROTONOSUPPORT;
goto out_put;
}
dev_info(&edev->device,
"aer_inject: Injecting errors %08x/%08x into device %s\n",
einj->cor_status, einj->uncor_status, pci_name(dev));
aer_irq(-1, edev);
} else
ret = -EINVAL;
} else {
dev_err(&rpdev->dev, "aer_inject: AER device not found\n");
ret = -ENODEV;
}
out_put:
kfree(err_alloc);
kfree(rperr_alloc);

2
drivers/pci/probe.c
View file

@ -1607,7 +1607,7 @@ static void pci_init_capabilities(struct pci_dev *dev)
pci_pm_init(dev);
/* Vital Product Data */
pci_vpd_pci22_init(dev);
pci_vpd_init(dev);
/* Alternative Routing-ID Forwarding */
pci_configure_ari(dev);

31
drivers/pci/quirks.c
View file

@ -438,7 +438,7 @@ static void quirk_amd_nl_class(struct pci_dev *pdev)
u32 class = pdev->class;
/* Use "USB Device (not host controller)" class */
pdev->class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe;
pdev->class = PCI_CLASS_SERIAL_USB_DEVICE;
dev_info(&pdev->dev, "PCI class overridden (%#08x -> %#08x) so dwc3 driver can claim this instead of xhci\n",
class, pdev->class);
}
@ -2134,6 +2134,35 @@ static void quirk_via_cx700_pci_parking_caching(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, 0x324e, quirk_via_cx700_pci_parking_caching);
/*
* If a device follows the VPD format spec, the PCI core will not read or
* write past the VPD End Tag. But some vendors do not follow the VPD
* format spec, so we can't tell how much data is safe to access. Devices
* may behave unpredictably if we access too much. Blacklist these devices
* so we don't touch VPD at all.
*/
static void quirk_blacklist_vpd(struct pci_dev *dev)
{
if (dev->vpd) {
dev->vpd->len = 0;
dev_warn(&dev->dev, FW_BUG "VPD access disabled\n");
}
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0060, quirk_blacklist_vpd);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x007c, quirk_blacklist_vpd);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0413, quirk_blacklist_vpd);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0078, quirk_blacklist_vpd);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0079, quirk_blacklist_vpd);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0073, quirk_blacklist_vpd);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x0071, quirk_blacklist_vpd);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005b, quirk_blacklist_vpd);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x002f, quirk_blacklist_vpd);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005d, quirk_blacklist_vpd);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_LSI_LOGIC, 0x005f, quirk_blacklist_vpd);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATTANSIC, PCI_ANY_ID,
quirk_blacklist_vpd);
/*
* For Broadcom 5706, 5708, 5709 rev. A nics, any read beyond the
* VPD end tag will hang the device. This problem was initially

2
drivers/usb/gadget/udc/amd5536udc.c
View file

@ -3397,7 +3397,7 @@ err_pcidev:
static const struct pci_device_id pci_id[] = {
{
PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x2096),
.class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe,
.class = PCI_CLASS_SERIAL_USB_DEVICE,
.class_mask = 0xffffffff,
},
{},

2
drivers/usb/gadget/udc/goku_udc.c
View file

@ -1846,7 +1846,7 @@ err:
/*-------------------------------------------------------------------------*/
static const struct pci_device_id pci_ids[] = { {
.class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
.class = PCI_CLASS_SERIAL_USB_DEVICE,
.class_mask = ~0,
.vendor = 0x102f, /* Toshiba */
.device = 0x0107, /* this UDC */

8
drivers/usb/gadget/udc/net2280.c
View file

@ -3735,7 +3735,7 @@ static void net2280_shutdown(struct pci_dev *pdev)
/*-------------------------------------------------------------------------*/
static const struct pci_device_id pci_ids[] = { {
.class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
.class = PCI_CLASS_SERIAL_USB_DEVICE,
.class_mask = ~0,
.vendor = PCI_VENDOR_ID_PLX_LEGACY,
.device = 0x2280,
@ -3743,7 +3743,7 @@ static const struct pci_device_id pci_ids[] = { {
.subdevice = PCI_ANY_ID,
.driver_data = PLX_LEGACY | PLX_2280,
}, {
.class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
.class = PCI_CLASS_SERIAL_USB_DEVICE,
.class_mask = ~0,
.vendor = PCI_VENDOR_ID_PLX_LEGACY,
.device = 0x2282,
@ -3752,7 +3752,7 @@ static const struct pci_device_id pci_ids[] = { {
.driver_data = PLX_LEGACY,
},
{
.class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
.class = PCI_CLASS_SERIAL_USB_DEVICE,
.class_mask = ~0,
.vendor = PCI_VENDOR_ID_PLX,
.device = 0x3380,
@ -3761,7 +3761,7 @@ static const struct pci_device_id pci_ids[] = { {
.driver_data = PLX_SUPERSPEED,
},
{
.class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
.class = PCI_CLASS_SERIAL_USB_DEVICE,
.class_mask = ~0,
.vendor = PCI_VENDOR_ID_PLX,
.device = 0x3382,

8
drivers/usb/gadget/udc/pch_udc.c
View file

@ -3234,22 +3234,22 @@ static const struct pci_device_id pch_udc_pcidev_id[] = {
{
PCI_DEVICE(PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_QUARK_X1000_UDC),
.class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe,
.class = PCI_CLASS_SERIAL_USB_DEVICE,
.class_mask = 0xffffffff,
},
{
PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EG20T_UDC),
.class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe,
.class = PCI_CLASS_SERIAL_USB_DEVICE,
.class_mask = 0xffffffff,
},
{
PCI_DEVICE(PCI_VENDOR_ID_ROHM, PCI_DEVICE_ID_ML7213_IOH_UDC),
.class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe,
.class = PCI_CLASS_SERIAL_USB_DEVICE,
.class_mask = 0xffffffff,
},
{
PCI_DEVICE(PCI_VENDOR_ID_ROHM, PCI_DEVICE_ID_ML7831_IOH_UDC),
.class = (PCI_CLASS_SERIAL_USB << 8) | 0xfe,
.class = PCI_CLASS_SERIAL_USB_DEVICE,
.class_mask = 0xffffffff,
},
{ 0 },

2
drivers/virtio/virtio_pci_common.c
View file

@ -467,7 +467,7 @@ static const struct dev_pm_ops virtio_pci_pm_ops = {
/* Qumranet donated their vendor ID for devices 0x1000 thru 0x10FF. */
static const struct pci_device_id virtio_pci_id_table[] = {
{ PCI_DEVICE(0x1af4, PCI_ANY_ID) },
{ PCI_DEVICE(PCI_VENDOR_ID_REDHAT_QUMRANET, PCI_ANY_ID) },
{ 0 }
};

29
include/asm-generic/pci-dma-compat.h → include/linux/pci-dma-compat.h
View file

@ -6,6 +6,12 @@
#include <linux/dma-mapping.h>
/* This defines the direction arg to the DMA mapping routines. */
#define PCI_DMA_BIDIRECTIONAL 0
#define PCI_DMA_TODEVICE 1
#define PCI_DMA_FROMDEVICE 2
#define PCI_DMA_NONE 3
static inline void *
pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
dma_addr_t *dma_handle)
@ -113,6 +119,29 @@ static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
{
return dma_set_coherent_mask(&dev->dev, mask);
}
static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
unsigned int size)
{
return dma_set_max_seg_size(&dev->dev, size);
}
static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
unsigned long mask)
{
return dma_set_seg_boundary(&dev->dev, mask);
}
#else
static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
{ return -EIO; }
static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
{ return -EIO; }
static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
unsigned int size)
{ return -EIO; }
static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
unsigned long mask)
{ return -EIO; }
#endif
#endif

50
include/linux/pci.h
View file

@ -70,12 +70,6 @@ enum pci_mmap_state {
pci_mmap_mem
};
/* This defines the direction arg to the DMA mapping routines. */
#define PCI_DMA_BIDIRECTIONAL 0
#define PCI_DMA_TODEVICE 1
#define PCI_DMA_FROMDEVICE 2
#define PCI_DMA_NONE 3
/*
* For PCI devices, the region numbers are assigned this way:
*/
@ -1038,8 +1032,6 @@ void pci_intx(struct pci_dev *dev, int enable);
bool pci_intx_mask_supported(struct pci_dev *dev);
bool pci_check_and_mask_intx(struct pci_dev *dev);
bool pci_check_and_unmask_intx(struct pci_dev *dev);
int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
int pci_wait_for_pending(struct pci_dev *dev, int pos, u16 mask);
int pci_wait_for_pending_transaction(struct pci_dev *dev);
int pcix_get_max_mmrbc(struct pci_dev *dev);
@ -1255,6 +1247,7 @@ resource_size_t pcibios_iov_resource_alignment(struct pci_dev *dev, int resno);
int pci_set_vga_state(struct pci_dev *pdev, bool decode,
unsigned int command_bits, u32 flags);
/* kmem_cache style wrapper around pci_alloc_consistent() */
#include <linux/pci-dma.h>
@ -1466,16 +1459,6 @@ static inline struct pci_dev *pci_get_class(unsigned int class,
static inline void pci_set_master(struct pci_dev *dev) { }
static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
static inline void pci_disable_device(struct pci_dev *dev) { }
static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
{ return -EIO; }
static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
{ return -EIO; }
static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
unsigned int size)
{ return -EIO; }
static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
unsigned long mask)
{ return -EIO; }
static inline int pci_assign_resource(struct pci_dev *dev, int i)
{ return -EBUSY; }
static inline int __pci_register_driver(struct pci_driver *drv,
@ -1856,12 +1839,13 @@ bool pci_acs_path_enabled(struct pci_dev *start,
#define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA)
/* Small Resource Data Type Tag Item Names */
#define PCI_VPD_STIN_END 0x78 /* End */
#define PCI_VPD_STIN_END 0x0f /* End */
#define PCI_VPD_SRDT_END PCI_VPD_STIN_END
#define PCI_VPD_SRDT_END (PCI_VPD_STIN_END << 3)
#define PCI_VPD_SRDT_TIN_MASK 0x78
#define PCI_VPD_SRDT_LEN_MASK 0x07
#define PCI_VPD_LRDT_TIN_MASK 0x7f
#define PCI_VPD_LRDT_TAG_SIZE 3
#define PCI_VPD_SRDT_TAG_SIZE 1
@ -1884,6 +1868,17 @@ static inline u16 pci_vpd_lrdt_size(const u8 *lrdt)
return (u16)lrdt[1] + ((u16)lrdt[2] << 8);
}
/**
* pci_vpd_lrdt_tag - Extracts the Large Resource Data Type Tag Item
* @lrdt: Pointer to the beginning of the Large Resource Data Type tag
*
* Returns the extracted Large Resource Data Type Tag item.
*/
static inline u16 pci_vpd_lrdt_tag(const u8 *lrdt)
{
return (u16)(lrdt[0] & PCI_VPD_LRDT_TIN_MASK);
}
/**
* pci_vpd_srdt_size - Extracts the Small Resource Data Type length
* @lrdt: Pointer to the beginning of the Small Resource Data Type tag
@ -1895,6 +1890,17 @@ static inline u8 pci_vpd_srdt_size(const u8 *srdt)
return (*srdt) & PCI_VPD_SRDT_LEN_MASK;
}
/**
* pci_vpd_srdt_tag - Extracts the Small Resource Data Type Tag Item
* @lrdt: Pointer to the beginning of the Small Resource Data Type tag
*
* Returns the extracted Small Resource Data Type Tag Item.
*/
static inline u8 pci_vpd_srdt_tag(const u8 *srdt)
{
return ((*srdt) & PCI_VPD_SRDT_TIN_MASK) >> 3;
}
/**
* pci_vpd_info_field_size - Extracts the information field length
* @lrdt: Pointer to the beginning of an information field header
@ -2011,4 +2017,8 @@ static inline bool pci_ari_enabled(struct pci_bus *bus)
{
return bus->self && bus->self->ari_enabled;
}
/* provide the legacy pci_dma_* API */
#include <linux/pci-dma-compat.h>
#endif /* LINUX_PCI_H */

5
include/linux/pci_ids.h
View file

@ -110,6 +110,7 @@
#define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310
#define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320
#define PCI_CLASS_SERIAL_USB_XHCI 0x0c0330
#define PCI_CLASS_SERIAL_USB_DEVICE 0x0c03fe
#define PCI_CLASS_SERIAL_FIBER 0x0c04
#define PCI_CLASS_SERIAL_SMBUS 0x0c05
@ -2506,6 +2507,10 @@
#define PCI_VENDOR_ID_AZWAVE 0x1a3b
#define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4
#define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4
#define PCI_SUBDEVICE_ID_QEMU 0x1100
#define PCI_VENDOR_ID_ASMEDIA 0x1b21
#define PCI_VENDOR_ID_CIRCUITCO 0x1cc8

4
sound/pci/intel8x0.c
View file

@ -2980,8 +2980,8 @@ static int snd_intel8x0_inside_vm(struct pci_dev *pci)
goto fini;
/* check for known (emulated) devices */
if (pci->subsystem_vendor == 0x1af4 &&
pci->subsystem_device == 0x1100) {
if (pci->subsystem_vendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
pci->subsystem_device == PCI_SUBDEVICE_ID_QEMU) {
/* KVM emulated sound, PCI SSID: 1af4:1100 */
msg = "enable KVM";
} else if (pci->subsystem_vendor == 0x1ab8) {