irqchip/gic: Unify GIC priority definitions
LPIs use the same priority value as other GIC interrupts. Make the GIC default priority definition visible to ITS implementation and use this same definition for LPI priorities. Tested-by: Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by: Julien Thierry <julien.thierry@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -68,7 +68,7 @@ static u32 lpi_id_bits;
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#define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K)
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#define LPI_PROPBASE_SZ ALIGN(BIT(LPI_NRBITS), SZ_64K)
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#define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K)
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#define LPI_PENDBASE_SZ ALIGN(BIT(LPI_NRBITS) / 8, SZ_64K)
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#define LPI_PROP_DEFAULT_PRIO 0xa0
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#define LPI_PROP_DEFAULT_PRIO GICD_INT_DEF_PRI
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/*
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/*
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* Collection structure - just an ID, and a redistributor address to
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* Collection structure - just an ID, and a redistributor address to
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@ -13,6 +13,12 @@
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#include <linux/types.h>
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#include <linux/types.h>
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#include <linux/ioport.h>
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#include <linux/ioport.h>
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#define GICD_INT_DEF_PRI 0xa0
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#define GICD_INT_DEF_PRI_X4 ((GICD_INT_DEF_PRI << 24) |\
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(GICD_INT_DEF_PRI << 16) |\
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(GICD_INT_DEF_PRI << 8) |\
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GICD_INT_DEF_PRI)
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enum gic_type {
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enum gic_type {
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GIC_V2,
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GIC_V2,
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GIC_V3,
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GIC_V3,
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@ -65,11 +65,6 @@
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#define GICD_INT_EN_CLR_X32 0xffffffff
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#define GICD_INT_EN_CLR_X32 0xffffffff
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#define GICD_INT_EN_SET_SGI 0x0000ffff
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#define GICD_INT_EN_SET_SGI 0x0000ffff
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#define GICD_INT_EN_CLR_PPI 0xffff0000
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#define GICD_INT_EN_CLR_PPI 0xffff0000
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#define GICD_INT_DEF_PRI 0xa0
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#define GICD_INT_DEF_PRI_X4 ((GICD_INT_DEF_PRI << 24) |\
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(GICD_INT_DEF_PRI << 16) |\
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(GICD_INT_DEF_PRI << 8) |\
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GICD_INT_DEF_PRI)
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#define GICD_IIDR_IMPLEMENTER_SHIFT 0
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#define GICD_IIDR_IMPLEMENTER_SHIFT 0
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#define GICD_IIDR_IMPLEMENTER_MASK (0xfff << GICD_IIDR_IMPLEMENTER_SHIFT)
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#define GICD_IIDR_IMPLEMENTER_MASK (0xfff << GICD_IIDR_IMPLEMENTER_SHIFT)
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