From 2646b90de5c3492db2ead71337fd4c7d7f549ebe Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 26 Oct 2018 10:41:22 +0200 Subject: [PATCH 01/99] gpio: Add global TODO file for GPIO With a new subsystem co-maintainer on board it is good to draw up the ongoing changes and future plans for the subsystem, i.e. what is in my head and being worked on long term. What better way is there than simply adding a TODO right in the code and send it out to the mailing list. Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/TODO | 109 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 109 insertions(+) create mode 100644 drivers/gpio/TODO diff --git a/drivers/gpio/TODO b/drivers/gpio/TODO new file mode 100644 index 000000000000..19d27c904916 --- /dev/null +++ b/drivers/gpio/TODO @@ -0,0 +1,109 @@ +This is a place for planning the ongoing long-term work in the GPIO +subsystem. + + +GPIO descriptors + +Starting with commit 79a9becda894 the GPIO subsystem embarked on a journey +to move away from the global GPIO numberspace and toward a decriptor-based +approach. This means that GPIO consumers, drivers and machine descriptions +ideally have no use or idea of the global GPIO numberspace that has/was +used in the inception of the GPIO subsystem. + +Work items: + +- Convert all GPIO device drivers to only #include + +- Convert all consumer drivers to only #include + +- Convert all machine descriptors in "boardfiles" to only + #include , the other option being to convert it + to a machine description such as device tree, ACPI or fwnode that + implicitly does not use global GPIO numbers. + +- When this work is complete (will require some of the items in the + following ongoing work as well) we can delete the old global + numberspace accessors from and eventually delete + altogether. + + +Get rid of + +This header and helpers appeared at one point when there was no proper +driver infrastructure for doing simpler MMIO GPIO devices and there was +no core support for parsing device tree GPIOs from the core library with +the [devm_]gpiod_get() calls we have today that will implicitly go into +the device tree back-end. + +Work items: + +- Get rid of struct of_mm_gpio_chip altogether: use the generic MMIO + GPIO for all current users (see below). Delete struct of_mm_gpio_chip, + to_of_mm_gpio_chip(), of_mm_gpiochip_add_data(), of_mm_gpiochip_add() + of_mm_gpiochip_remove() from the kernel. + +- Change all consumer drivers that #include to + #include and stop doing custom parsing of the + GPIO lines from the device tree. This can be tricky and often ivolves + changing boardfiles, etc. + +- Pull semantics for legacy device tree (OF) GPIO lookups into + gpiolib-of.c: in some cases subsystems are doing custom flags and + lookups for polarity inversion, open drain and what not. As we now + handle this with generic OF bindings, pull all legacy handling into + gpiolib so the library API becomes narrow and deep and handle all + legacy bindings internally. (See e.g. commits 6953c57ab172, + 6a537d48461d etc) + +- Delete when all the above is complete and everything + uses or instead. + + +Collect drivers + +Collect GPIO drivers from arch/* and other places that should be placed +in drivers/gpio/gpio-*. Augment platforms to create platform devices or +similar and probe a proper driver in the gpiolib subsystem. + +In some cases it makes sense to create a GPIO chip from the local driver +for a few GPIOs. Those should stay where they are. + + +Generic MMIO GPIO + +The GPIO drivers can utilize the generic MMIO helper library in many +cases, and the helper library should be as helpful as possible for MMIO +drivers. (drivers/gpio/gpio-mmio.c) + +Work items: + +- Look over and identify any remaining easily converted drivers and + dry-code conversions to MMIO GPIO for maintainers to test + +- Expand the MMIO GPIO or write a new library for port-mapped I/O + helpers (x86 inb()/outb()) and convert port-mapped I/O drivers to use + this with dry-coding and sending to maintainers to test + + +GPIOLIB irqchip + +The GPIOLIB irqchip is a helper irqchip for "simple cases" that should +try to cover any generic kind of irqchip cascaded from a GPIO. + +- Look over and identify any remaining easily converted drivers and + dry-code conversions to gpiolib irqchip for maintainers to test + +- Support generic hierarchical GPIO interrupts: these are for the + non-cascading case where there is one IRQ per GPIO line, there is + currently no common infrastructure for this. + + +Increase integration with pin control + +There are already ways to use pin control as back-end for GPIO and +it may make sense to bring these subsystems closer. One reason for +creating pin control as its own subsystem was that we could avoid any +use of the global GPIO numbers. Once the above is complete, it may +make sense to simply join the subsystems into one and make pin +multiplexing, pin configuration, GPIO, etc selectable options in one +and the same pin control and GPIO subsystem. From deb19ac533ac2febe52d4058b0ce42109a2571a6 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sun, 21 Oct 2018 21:59:56 +0200 Subject: [PATCH 02/99] gpio: gpio-dwapb: simplify getting .driver_data We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang Signed-off-by: Linus Walleij --- drivers/gpio/gpio-dwapb.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/gpio/gpio-dwapb.c index 044888fd96a1..84ae04402f70 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/gpio/gpio-dwapb.c @@ -748,8 +748,7 @@ static int dwapb_gpio_remove(struct platform_device *pdev) #ifdef CONFIG_PM_SLEEP static int dwapb_gpio_suspend(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct dwapb_gpio *gpio = platform_get_drvdata(pdev); + struct dwapb_gpio *gpio = dev_get_drvdata(dev); struct gpio_chip *gc = &gpio->ports[0].gc; unsigned long flags; int i; @@ -793,8 +792,7 @@ static int dwapb_gpio_suspend(struct device *dev) static int dwapb_gpio_resume(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct dwapb_gpio *gpio = platform_get_drvdata(pdev); + struct dwapb_gpio *gpio = dev_get_drvdata(dev); struct gpio_chip *gc = &gpio->ports[0].gc; unsigned long flags; int i; From ea5ec5e3aeaba45083eeec3de1708afdbeb2abfb Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sun, 21 Oct 2018 21:59:57 +0200 Subject: [PATCH 03/99] gpio: gpio-lynxpoint: simplify getting .driver_data We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang Signed-off-by: Linus Walleij --- drivers/gpio/gpio-lynxpoint.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c index b5b5e500e72c..ca12d9f96914 100644 --- a/drivers/gpio/gpio-lynxpoint.c +++ b/drivers/gpio/gpio-lynxpoint.c @@ -408,8 +408,7 @@ static int lp_gpio_runtime_resume(struct device *dev) static int lp_gpio_resume(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct lp_gpio *lg = platform_get_drvdata(pdev); + struct lp_gpio *lg = dev_get_drvdata(dev); unsigned long reg; int i; From 11868645c5b534467d6f079a6367ad8fe75c15e8 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sun, 21 Oct 2018 21:59:58 +0200 Subject: [PATCH 04/99] gpio: gpio-mxc: simplify getting .driver_data We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang Signed-off-by: Linus Walleij --- drivers/gpio/gpio-mxc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 995cf0b9e0b1..5c69516e90b1 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -552,8 +552,7 @@ static void mxc_gpio_restore_regs(struct mxc_gpio_port *port) static int __maybe_unused mxc_gpio_noirq_suspend(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct mxc_gpio_port *port = platform_get_drvdata(pdev); + struct mxc_gpio_port *port = dev_get_drvdata(dev); mxc_gpio_save_regs(port); clk_disable_unprepare(port->clk); @@ -563,8 +562,7 @@ static int __maybe_unused mxc_gpio_noirq_suspend(struct device *dev) static int __maybe_unused mxc_gpio_noirq_resume(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct mxc_gpio_port *port = platform_get_drvdata(pdev); + struct mxc_gpio_port *port = dev_get_drvdata(dev); int ret; ret = clk_prepare_enable(port->clk); From a3f4f728d3bbfe4fc2a8e0d8e5d04b3812e44de0 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sun, 21 Oct 2018 21:59:59 +0200 Subject: [PATCH 05/99] gpio: gpio-omap: simplify getting .driver_data We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang Acked-by: Grygorii Strashko Signed-off-by: Linus Walleij --- drivers/gpio/gpio-omap.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 9887c3db6e16..6ed621a00561 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -984,8 +984,7 @@ omap4_gpio_disable_level_quirk(struct gpio_bank *bank) static int omap_mpuio_suspend_noirq(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct gpio_bank *bank = platform_get_drvdata(pdev); + struct gpio_bank *bank = dev_get_drvdata(dev); void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT / bank->stride; unsigned long flags; @@ -999,8 +998,7 @@ static int omap_mpuio_suspend_noirq(struct device *dev) static int omap_mpuio_resume_noirq(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct gpio_bank *bank = platform_get_drvdata(pdev); + struct gpio_bank *bank = dev_get_drvdata(dev); void __iomem *mask_reg = bank->base + OMAP_MPUIO_GPIO_MASKIT / bank->stride; unsigned long flags; @@ -1688,8 +1686,7 @@ static void omap_gpio_restore_context(struct gpio_bank *bank) static int __maybe_unused omap_gpio_runtime_suspend(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct gpio_bank *bank = platform_get_drvdata(pdev); + struct gpio_bank *bank = dev_get_drvdata(dev); unsigned long flags; int error = 0; @@ -1709,8 +1706,7 @@ unlock: static int __maybe_unused omap_gpio_runtime_resume(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct gpio_bank *bank = platform_get_drvdata(pdev); + struct gpio_bank *bank = dev_get_drvdata(dev); unsigned long flags; int error = 0; From 38ccad0243f9e2f6ab9a852b31b8181b29479b59 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sun, 21 Oct 2018 22:00:01 +0200 Subject: [PATCH 06/99] gpio: gpio-zynq: simplify getting .driver_data We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang Signed-off-by: Linus Walleij --- drivers/gpio/gpio-zynq.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c index 3f5fcdd5a429..ac9b02c9598f 100644 --- a/drivers/gpio/gpio-zynq.c +++ b/drivers/gpio/gpio-zynq.c @@ -693,8 +693,7 @@ static int __maybe_unused zynq_gpio_resume(struct device *dev) static int __maybe_unused zynq_gpio_runtime_suspend(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct zynq_gpio *gpio = platform_get_drvdata(pdev); + struct zynq_gpio *gpio = dev_get_drvdata(dev); clk_disable_unprepare(gpio->clk); @@ -703,8 +702,7 @@ static int __maybe_unused zynq_gpio_runtime_suspend(struct device *dev) static int __maybe_unused zynq_gpio_runtime_resume(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct zynq_gpio *gpio = platform_get_drvdata(pdev); + struct zynq_gpio *gpio = dev_get_drvdata(dev); return clk_prepare_enable(gpio->clk); } From 7ddb7dce0ab69aef140a0fb3034a07d356ad9252 Mon Sep 17 00:00:00 2001 From: Wolfram Sang Date: Sun, 21 Oct 2018 22:00:00 +0200 Subject: [PATCH 07/99] gpio: gpio-tegra: simplify getting .driver_data We should get 'driver_data' from 'struct device' directly. Going via platform_device is an unneeded step back and forth. Signed-off-by: Wolfram Sang Acked-by: Thierry Reding Signed-off-by: Linus Walleij --- drivers/gpio/gpio-tegra.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index 47dbd19751d0..02f6db925fd5 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c @@ -404,8 +404,7 @@ static void tegra_gpio_irq_handler(struct irq_desc *desc) #ifdef CONFIG_PM_SLEEP static int tegra_gpio_resume(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct tegra_gpio_info *tgi = platform_get_drvdata(pdev); + struct tegra_gpio_info *tgi = dev_get_drvdata(dev); unsigned long flags; unsigned int b, p; @@ -444,8 +443,7 @@ static int tegra_gpio_resume(struct device *dev) static int tegra_gpio_suspend(struct device *dev) { - struct platform_device *pdev = to_platform_device(dev); - struct tegra_gpio_info *tgi = platform_get_drvdata(pdev); + struct tegra_gpio_info *tgi = dev_get_drvdata(dev); unsigned long flags; unsigned int b, p; From f90deea4a6615b7397c559565a4a4eb3ed98dd90 Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Mon, 22 Oct 2018 21:08:59 +0900 Subject: [PATCH 08/99] gpio: 104-dio-48e: Mask read inputs for get_multiple This patch masks the read inputs with the word mask in order to ensure only requested input states are returned in the bits array. Suggested-by: Rasmus Villemoes Signed-off-by: William Breathitt Gray Signed-off-by: Linus Walleij --- drivers/gpio/gpio-104-dio-48e.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c index 9c4e07fcb74b..92c8f944bf64 100644 --- a/drivers/gpio/gpio-104-dio-48e.c +++ b/drivers/gpio/gpio-104-dio-48e.c @@ -222,7 +222,7 @@ static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, port_state = inb(dio48egpio->base + ports[i]); /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word_index] |= (port_state << word_offset) & word_mask; } return 0; From b7f53f67980e72da3317fffc160c746c02c23fb5 Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Mon, 22 Oct 2018 21:09:16 +0900 Subject: [PATCH 09/99] gpio: 104-idi-48e: Mask the read inputs for get_multiple This patch masks the read inputs with the word mask in order to ensure only requested input states are returned in the bits array. Suggested-by: Rasmus Villemoes Signed-off-by: William Breathitt Gray Signed-off-by: Linus Walleij --- drivers/gpio/gpio-104-idi-48.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-104-idi-48.c b/drivers/gpio/gpio-104-idi-48.c index 2c9738adb3a6..88dc6f2449f6 100644 --- a/drivers/gpio/gpio-104-idi-48.c +++ b/drivers/gpio/gpio-104-idi-48.c @@ -128,7 +128,7 @@ static int idi_48_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, port_state = inb(idi48gpio->base + ports[i]); /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word_index] |= (port_state << word_offset) & word_mask; } return 0; From 3bfbc44029926e1bc4b89d16f562a364b2c9379e Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Mon, 22 Oct 2018 21:09:31 +0900 Subject: [PATCH 10/99] gpio: gpio-mm: Mask read inputs for get_multiple This patch masks the read inputs with the word mask in order to ensure only requested input states are returned in the bits array. Suggested-by: Rasmus Villemoes Signed-off-by: William Breathitt Gray Signed-off-by: Linus Walleij --- drivers/gpio/gpio-gpio-mm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c index b56ff2efbf36..8c150fd68d9d 100644 --- a/drivers/gpio/gpio-gpio-mm.c +++ b/drivers/gpio/gpio-gpio-mm.c @@ -211,7 +211,7 @@ static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, port_state = inb(gpiommgpio->base + ports[i]); /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word_index] |= (port_state << word_offset) & word_mask; } return 0; From 7a702691d0ceb1a3a2199a1c7a15ddb5fbb50b7d Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Mon, 22 Oct 2018 21:09:49 +0900 Subject: [PATCH 11/99] gpio: ws16c48: Mask read inputs for get_multiple This patch masks the read inputs with the word mask in order to ensure only requested input states are returned in the bits array. Suggested-by: Rasmus Villemoes Signed-off-by: William Breathitt Gray Signed-off-by: Linus Walleij --- drivers/gpio/gpio-ws16c48.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-ws16c48.c b/drivers/gpio/gpio-ws16c48.c index c7028eb0b8e1..5cf3697bfb15 100644 --- a/drivers/gpio/gpio-ws16c48.c +++ b/drivers/gpio/gpio-ws16c48.c @@ -169,7 +169,7 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip, port_state = inb(ws16c48gpio->base + i); /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word_index] |= (port_state << word_offset) & word_mask; } return 0; From f837bf6acaf54aa8b3a09378f5c8ec1ca2cd3338 Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Mon, 22 Oct 2018 21:10:06 +0900 Subject: [PATCH 12/99] gpio: pci-idio-16: Mask read inputs for get_multiple This patch masks the read inputs with the word mask in order to ensure only requested input states are returned in the bits array. Suggested-by: Rasmus Villemoes Signed-off-by: William Breathitt Gray Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pci-idio-16.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-pci-idio-16.c b/drivers/gpio/gpio-pci-idio-16.c index 25d16b2af1c3..6b7349783223 100644 --- a/drivers/gpio/gpio-pci-idio-16.c +++ b/drivers/gpio/gpio-pci-idio-16.c @@ -146,7 +146,7 @@ static int idio_16_gpio_get_multiple(struct gpio_chip *chip, port_state = ioread8(ports[i]); /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word_index] |= (port_state << word_offset) & word_mask; } return 0; From 25451945648af488077ed61afc59a79710422f31 Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Mon, 22 Oct 2018 21:10:20 +0900 Subject: [PATCH 13/99] gpio: pcie-idio-24: Mask read inputs for get_multiple This patch masks the read inputs with the word mask in order to ensure only requested input states are returned in the bits array. Suggested-by: Rasmus Villemoes Signed-off-by: William Breathitt Gray Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pcie-idio-24.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-idio-24.c index f953541e7890..52f1647a46fd 100644 --- a/drivers/gpio/gpio-pcie-idio-24.c +++ b/drivers/gpio/gpio-pcie-idio-24.c @@ -243,7 +243,7 @@ static int idio_24_gpio_get_multiple(struct gpio_chip *chip, port_state = ioread8(&idio24gpio->reg->ttl_in0_7); /* store acquired bits at respective bits array offset */ - bits[word_index] |= port_state << word_offset; + bits[word_index] |= (port_state << word_offset) & word_mask; } return 0; From 48207d7595d2be604e21228e5a93aaff17e4b808 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Fri, 5 Oct 2018 21:42:06 +0200 Subject: [PATCH 14/99] gpio: drop devm_gpiochip_remove() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There is hardly any reason to call devm_gpiochip_remove() because the driver core handles calling gpiochip_remove() automatically. To make it harder to introduce new (and probably unneeded) callers, drop the function. Signed-off-by: Uwe Kleine-König Signed-off-by: Linus Walleij --- Documentation/driver-model/devres.txt | 1 - drivers/gpio/gpiolib.c | 18 +----------------- include/linux/gpio/driver.h | 1 - 3 files changed, 1 insertion(+), 19 deletions(-) diff --git a/Documentation/driver-model/devres.txt b/Documentation/driver-model/devres.txt index 43681ca0837f..48aa1ef80d75 100644 --- a/Documentation/driver-model/devres.txt +++ b/Documentation/driver-model/devres.txt @@ -255,7 +255,6 @@ GPIO devm_gpiod_get_optional() devm_gpiod_put() devm_gpiochip_add_data() - devm_gpiochip_remove() devm_gpio_request() devm_gpio_request_one() devm_gpio_free() diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 230e41562462..9ccc096a0df7 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1524,6 +1524,7 @@ static int devm_gpio_chip_match(struct device *dev, void *res, void *data) return *r == data; } + /** * devm_gpiochip_add_data() - Resource manager gpiochip_add_data() * @dev: pointer to the device that gpio_chip belongs to. @@ -1563,23 +1564,6 @@ int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip, } EXPORT_SYMBOL_GPL(devm_gpiochip_add_data); -/** - * devm_gpiochip_remove() - Resource manager of gpiochip_remove() - * @dev: device for which which resource was allocated - * @chip: the chip to remove - * - * A gpio_chip with any GPIOs still requested may not be removed. - */ -void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip) -{ - int ret; - - ret = devres_release(dev, devm_gpio_chip_release, - devm_gpio_chip_match, chip); - WARN_ON(ret); -} -EXPORT_SYMBOL_GPL(devm_gpiochip_remove); - /** * gpiochip_find() - iterator for locating a specific gpio_chip * @data: data to pass to match function diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 2db62b550b95..f70d976e1395 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -422,7 +422,6 @@ static inline int gpiochip_add(struct gpio_chip *chip) extern void gpiochip_remove(struct gpio_chip *chip); extern int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip, void *data); -extern void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip); extern struct gpio_chip *gpiochip_find(void *data, int (*match)(struct gpio_chip *chip, void *data)); From ed8dce4c6f726b7f3c6bf40859b92a9e32f189c1 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Wed, 24 Oct 2018 22:59:15 +0530 Subject: [PATCH 15/99] gpio: pl061: Move irq_chip definition inside struct pl061 Keeping the irq_chip definition static will make it shared with multiple giochips in the system. This practice is considered to be bad and now we will get the below warning from gpiolib core: "detected irqchip that is shared with multiple gpiochips: please fix the driver." Hence, move the irq_chip definition from static to `struct pl061` for using a unique irq_chip for each gpiochip. Signed-off-by: Manivannan Sadhasivam Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pl061.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index 2afd9de84a0d..dc42571e6fdc 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -54,6 +54,7 @@ struct pl061 { void __iomem *base; struct gpio_chip gc; + struct irq_chip irq_chip; int parent_irq; #ifdef CONFIG_PM @@ -281,15 +282,6 @@ static int pl061_irq_set_wake(struct irq_data *d, unsigned int state) return irq_set_irq_wake(pl061->parent_irq, state); } -static struct irq_chip pl061_irqchip = { - .name = "pl061", - .irq_ack = pl061_irq_ack, - .irq_mask = pl061_irq_mask, - .irq_unmask = pl061_irq_unmask, - .irq_set_type = pl061_irq_type, - .irq_set_wake = pl061_irq_set_wake, -}; - static int pl061_probe(struct amba_device *adev, const struct amba_id *id) { struct device *dev = &adev->dev; @@ -328,6 +320,13 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) /* * irq_chip support */ + pl061->irq_chip.name = dev_name(dev); + pl061->irq_chip.irq_ack = pl061_irq_ack; + pl061->irq_chip.irq_mask = pl061_irq_mask; + pl061->irq_chip.irq_unmask = pl061_irq_unmask; + pl061->irq_chip.irq_set_type = pl061_irq_type; + pl061->irq_chip.irq_set_wake = pl061_irq_set_wake; + writeb(0, pl061->base + GPIOIE); /* disable irqs */ irq = adev->irq[0]; if (irq < 0) { @@ -336,14 +335,14 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) } pl061->parent_irq = irq; - ret = gpiochip_irqchip_add(&pl061->gc, &pl061_irqchip, + ret = gpiochip_irqchip_add(&pl061->gc, &pl061->irq_chip, 0, handle_bad_irq, IRQ_TYPE_NONE); if (ret) { dev_info(&adev->dev, "could not add irqchip\n"); return ret; } - gpiochip_set_chained_irqchip(&pl061->gc, &pl061_irqchip, + gpiochip_set_chained_irqchip(&pl061->gc, &pl061->irq_chip, irq, pl061_irq_handler); amba_set_drvdata(adev, pl061); From 02cb87f79b6dfd17bb16b71ec30652e76c6d8cf2 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Tue, 30 Oct 2018 14:07:22 +0000 Subject: [PATCH 16/99] gpio: sch311x: clean an indentation issue, remove extraneous space Trivial fix to clean up an indentation issue, remove space Signed-off-by: Colin Ian King Signed-off-by: Linus Walleij --- drivers/gpio/gpio-sch311x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-sch311x.c b/drivers/gpio/gpio-sch311x.c index 5497f0a88cf0..4df5335469fd 100644 --- a/drivers/gpio/gpio-sch311x.c +++ b/drivers/gpio/gpio-sch311x.c @@ -188,7 +188,7 @@ static void sch311x_gpio_set(struct gpio_chip *chip, unsigned offset, struct sch311x_gpio_block *block = gpiochip_get_data(chip); spin_lock(&block->lock); - __sch311x_gpio_set(block, offset, value); + __sch311x_gpio_set(block, offset, value); spin_unlock(&block->lock); } From 18534df419041e6c1f4b41af56ee7d41f757815c Mon Sep 17 00:00:00 2001 From: Muchun Song Date: Thu, 1 Nov 2018 21:12:50 +0800 Subject: [PATCH 17/99] gpiolib: Fix possible use after free on label gpiod_request_commit() copies the pointer to the label passed as an argument only to be used later. But there's a chance the caller could immediately free the passed string(e.g., local variable). This could trigger a use after free when we use gpio label(e.g., gpiochip_unlock_as_irq(), gpiochip_is_requested()). To be on the safe side: duplicate the string with kstrdup_const() so that if an unaware user passes an address to a stack-allocated buffer, we won't get the arbitrary label. Also fix gpiod_set_consumer_name(). Signed-off-by: Muchun Song Signed-off-by: Linus Walleij --- drivers/gpio/gpiolib.c | 25 +++++++++++++++++++++---- include/linux/gpio/consumer.h | 6 ++++-- 2 files changed, 25 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 9ccc096a0df7..2a9d50678aa1 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -2282,6 +2282,12 @@ static int gpiod_request_commit(struct gpio_desc *desc, const char *label) unsigned long flags; unsigned offset; + if (label) { + label = kstrdup_const(label, GFP_KERNEL); + if (!label) + return -ENOMEM; + } + spin_lock_irqsave(&gpio_lock, flags); /* NOTE: gpio_request() can be called in early boot, @@ -2292,6 +2298,7 @@ static int gpiod_request_commit(struct gpio_desc *desc, const char *label) desc_set_label(desc, label ? : "?"); status = 0; } else { + kfree_const(label); status = -EBUSY; goto done; } @@ -2308,6 +2315,7 @@ static int gpiod_request_commit(struct gpio_desc *desc, const char *label) if (status < 0) { desc_set_label(desc, NULL); + kfree_const(label); clear_bit(FLAG_REQUESTED, &desc->flags); goto done; } @@ -2403,6 +2411,7 @@ static bool gpiod_free_commit(struct gpio_desc *desc) chip->free(chip, gpio_chip_hwgpio(desc)); spin_lock_irqsave(&gpio_lock, flags); } + kfree_const(desc->label); desc_set_label(desc, NULL); clear_bit(FLAG_ACTIVE_LOW, &desc->flags); clear_bit(FLAG_REQUESTED, &desc->flags); @@ -3358,11 +3367,19 @@ EXPORT_SYMBOL_GPL(gpiod_cansleep); * @desc: gpio to set the consumer name on * @name: the new consumer name */ -void gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) +int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) { - VALIDATE_DESC_VOID(desc); - /* Just overwrite whatever the previous name was */ - desc->label = name; + VALIDATE_DESC(desc); + if (name) { + name = kstrdup_const(name, GFP_KERNEL); + if (!name) + return -ENOMEM; + } + + kfree_const(desc->label); + desc_set_label(desc, name); + + return 0; } EXPORT_SYMBOL_GPL(gpiod_set_consumer_name); diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h index f2f887795d43..ed070512b40e 100644 --- a/include/linux/gpio/consumer.h +++ b/include/linux/gpio/consumer.h @@ -162,7 +162,7 @@ int gpiod_is_active_low(const struct gpio_desc *desc); int gpiod_cansleep(const struct gpio_desc *desc); int gpiod_to_irq(const struct gpio_desc *desc); -void gpiod_set_consumer_name(struct gpio_desc *desc, const char *name); +int gpiod_set_consumer_name(struct gpio_desc *desc, const char *name); /* Convert between the old gpio_ and new gpiod_ interfaces */ struct gpio_desc *gpio_to_desc(unsigned gpio); @@ -495,10 +495,12 @@ static inline int gpiod_to_irq(const struct gpio_desc *desc) return -EINVAL; } -static inline void gpiod_set_consumer_name(struct gpio_desc *desc, const char *name) +static inline int gpiod_set_consumer_name(struct gpio_desc *desc, + const char *name) { /* GPIO can never have been requested */ WARN_ON(1); + return -EINVAL; } static inline struct gpio_desc *gpio_to_desc(unsigned gpio) From b45f2869a7aa067e5499ffe0ac1e32496e559638 Mon Sep 17 00:00:00 2001 From: "A.s. Dong" Date: Wed, 31 Oct 2018 14:43:04 +0000 Subject: [PATCH 18/99] dt-bindings: gpio: vf610: add optional clocks property On some SoCs(e.g. MX7ULP), GPIO clock is gatable and maybe disabled by default. Users have to make sure it's enabled before being able to access controller registers, otherwise an external abort error may occur. Let's add the optional clocks property to handle this case. For ULP GPIO clock, it includes two separate clocks: one is for GPIO controller Input/Output function clock while another is GPIO port control clock for interrupt function. Cc: Linus Walleij Cc: Mark Rutland Cc: Stefan Agner Cc: linux-gpio@vger.kernel.org Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring Signed-off-by: Dong Aisheng Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/gpio/gpio-vf610.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.txt b/Documentation/devicetree/bindings/gpio/gpio-vf610.txt index 0ccbae44019c..ae254aadee35 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-vf610.txt +++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.txt @@ -24,6 +24,12 @@ Required properties for GPIO node: 4 = active high level-sensitive. 8 = active low level-sensitive. +Optional properties: +-clocks: Must contain an entry for each entry in clock-names. + See common clock-bindings.txt for details. +-clock-names: A list of clock names. For imx7ulp, it must contain + "gpio", "port". + Note: Each GPIO port should have an alias correctly numbered in "aliases" node. From c3bc3ff9e8019fba74ce62bfb501d710c2fca9d3 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 6 Nov 2018 13:49:43 +0200 Subject: [PATCH 19/99] MAINTAINERS: Do maintain Intel GPIO drivers via separate tree We would like to consolidate Intel pure GPIO drivers, including PMICs and some old x86 platforms, in one tree which is maintained by Intel. Signed-off-by: Andy Shevchenko --- MAINTAINERS | 33 +++++++++++++++++++++------------ 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index f4855974f325..cab6edd93e31 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7429,6 +7429,20 @@ S: Maintained F: Documentation/fb/intelfb.txt F: drivers/video/fbdev/intelfb/ +INTEL GPIO DRIVERS +M: Andy Shevchenko +L: linux-gpio@vger.kernel.org +S: Maintained +T: git git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel.git +F: drivers/gpio/gpio-ich.c +F: drivers/gpio/gpio-intel-mid.c +F: drivers/gpio/gpio-lynxpoint.c +F: drivers/gpio/gpio-merrifield.c +F: drivers/gpio/gpio-ml-ioh.c +F: drivers/gpio/gpio-pch.c +F: drivers/gpio/gpio-sch.c +F: drivers/gpio/gpio-sodaville.c + INTEL GVT-g DRIVERS (Intel GPU Virtualization) M: Zhenyu Wang M: Zhi Wang @@ -7439,12 +7453,6 @@ T: git https://github.com/intel/gvt-linux.git S: Supported F: drivers/gpu/drm/i915/gvt/ -INTEL PMIC GPIO DRIVER -R: Andy Shevchenko -S: Maintained -F: drivers/gpio/gpio-*cove.c -F: drivers/gpio/gpio-msic.c - INTEL HID EVENT DRIVER M: Alex Hung L: platform-driver-x86@vger.kernel.org @@ -7532,12 +7540,6 @@ W: https://01.org/linux-acpi S: Supported F: drivers/platform/x86/intel_menlow.c -INTEL MERRIFIELD GPIO DRIVER -M: Andy Shevchenko -L: linux-gpio@vger.kernel.org -S: Maintained -F: drivers/gpio/gpio-merrifield.c - INTEL MIC DRIVERS (mic) M: Sudeep Dutt M: Ashutosh Dixit @@ -7570,6 +7572,13 @@ F: drivers/platform/x86/intel_punit_ipc.c F: arch/x86/include/asm/intel_pmc_ipc.h F: arch/x86/include/asm/intel_punit_ipc.h +INTEL PMIC GPIO DRIVERS +M: Andy Shevchenko +S: Maintained +T: git git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel.git +F: drivers/gpio/gpio-*cove.c +F: drivers/gpio/gpio-msic.c + INTEL MULTIFUNCTION PMIC DEVICE DRIVERS R: Andy Shevchenko S: Maintained From 0696d79456881e79c025cee35950e4a8334ce853 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 8 Nov 2018 01:15:07 +0200 Subject: [PATCH 20/99] gpio: drop devm_gpio_chip_match() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 48207d7595d2 ("gpio: drop devm_gpiochip_remove()") dropped the last user of drop devm_gpio_chip_match(), causing a defined but not used compilation warning. Fix it by removing the function. Fixes: 48207d7595d2 ("gpio: drop devm_gpiochip_remove()") Signed-off-by: Laurent Pinchart Acked-by: Uwe Kleine-König Acked-by: Olof Johansson Signed-off-by: Linus Walleij --- drivers/gpio/gpiolib.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 2a9d50678aa1..d61fdcb26fbd 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1511,20 +1511,6 @@ static void devm_gpio_chip_release(struct device *dev, void *res) gpiochip_remove(chip); } -static int devm_gpio_chip_match(struct device *dev, void *res, void *data) - -{ - struct gpio_chip **r = res; - - if (!r || !*r) { - WARN_ON(!r || !*r); - return 0; - } - - return *r == data; -} - - /** * devm_gpiochip_add_data() - Resource manager gpiochip_add_data() * @dev: pointer to the device that gpio_chip belongs to. From 8b37eb74d0e30dfc87bf2025b7958a9730a7b5eb Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Thu, 8 Nov 2018 06:35:16 +0000 Subject: [PATCH 21/99] gpio: rcar: convert to SPDX identifiers This patch updates license to use SPDX-License-Identifier instead of verbose license text. Signed-off-by: Kuninori Morimoto Signed-off-by: Linus Walleij --- drivers/gpio/gpio-rcar.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index 3c82bb3c2030..1322f7e0cfde 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c @@ -1,17 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Renesas R-Car GPIO Support * * Copyright (C) 2014 Renesas Electronics Corporation * Copyright (C) 2013 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include From eee3919c5f2949a8b7b1e9fa239d153be1538656 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Mon, 12 Nov 2018 15:10:28 +0100 Subject: [PATCH 22/99] gpio: drop broken to_gpio_irq_chip() helper Drop the broken to_gpio_irq_chip() container_of() helper, which would break the build for anyone who tries to use it. Specifically, struct gpio_irq_chip only holds a pointer to a struct irq_chip so using container_of() on an irq-chip pointer makes no sense. Fixes: da80ff81a8f5 ("gpio: Move irqchip into struct gpio_irq_chip") Cc: Thierry Reding Cc: Grygorii Strashko Signed-off-by: Johan Hovold Reviewed-by: Bartosz Golaszewski Signed-off-by: Linus Walleij --- include/linux/gpio/driver.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index f70d976e1395..9c8d5d491680 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -166,11 +166,6 @@ struct gpio_irq_chip { */ void (*irq_disable)(struct irq_data *data); }; - -static inline struct gpio_irq_chip *to_gpio_irq_chip(struct irq_chip *chip) -{ - return container_of(chip, struct gpio_irq_chip, chip); -} #endif /** From 1a5287a3dbc34cd0c02c8f64c9131bd23cdfe2bb Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Fri, 9 Nov 2018 04:56:56 +0000 Subject: [PATCH 23/99] gpio: mxc: move gpio noirq suspend/resume to syscore phase During noirq suspend/resume phase, GPIO irq could arrive and its registers like IMR will be changed by irq handle process, to make the GPIO registers exactly when it is powered ON after resume, move the GPIO noirq suspend/resume callback to syscore suspend/resume phase, local irq is disabled at this phase so GPIO registers are atomic. Signed-off-by: Anson Huang Signed-off-by: Linus Walleij --- drivers/gpio/gpio-mxc.c | 39 ++++++++++++++++++++++++--------------- 1 file changed, 24 insertions(+), 15 deletions(-) diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c index 5c69516e90b1..2d1dfa1e0745 100644 --- a/drivers/gpio/gpio-mxc.c +++ b/drivers/gpio/gpio-mxc.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -550,31 +551,38 @@ static void mxc_gpio_restore_regs(struct mxc_gpio_port *port) writel(port->gpio_saved_reg.dr, port->base + GPIO_DR); } -static int __maybe_unused mxc_gpio_noirq_suspend(struct device *dev) +static int mxc_gpio_syscore_suspend(void) { - struct mxc_gpio_port *port = dev_get_drvdata(dev); + struct mxc_gpio_port *port; - mxc_gpio_save_regs(port); - clk_disable_unprepare(port->clk); + /* walk through all ports */ + list_for_each_entry(port, &mxc_gpio_ports, node) { + mxc_gpio_save_regs(port); + clk_disable_unprepare(port->clk); + } return 0; } -static int __maybe_unused mxc_gpio_noirq_resume(struct device *dev) +static void mxc_gpio_syscore_resume(void) { - struct mxc_gpio_port *port = dev_get_drvdata(dev); + struct mxc_gpio_port *port; int ret; - ret = clk_prepare_enable(port->clk); - if (ret) - return ret; - mxc_gpio_restore_regs(port); - - return 0; + /* walk through all ports */ + list_for_each_entry(port, &mxc_gpio_ports, node) { + ret = clk_prepare_enable(port->clk); + if (ret) { + pr_err("mxc: failed to enable gpio clock %d\n", ret); + return; + } + mxc_gpio_restore_regs(port); + } } -static const struct dev_pm_ops mxc_gpio_dev_pm_ops = { - SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mxc_gpio_noirq_suspend, mxc_gpio_noirq_resume) +static struct syscore_ops mxc_gpio_syscore_ops = { + .suspend = mxc_gpio_syscore_suspend, + .resume = mxc_gpio_syscore_resume, }; static struct platform_driver mxc_gpio_driver = { @@ -582,7 +590,6 @@ static struct platform_driver mxc_gpio_driver = { .name = "gpio-mxc", .of_match_table = mxc_gpio_dt_ids, .suppress_bind_attrs = true, - .pm = &mxc_gpio_dev_pm_ops, }, .probe = mxc_gpio_probe, .id_table = mxc_gpio_devtype, @@ -590,6 +597,8 @@ static struct platform_driver mxc_gpio_driver = { static int __init gpio_mxc_init(void) { + register_syscore_ops(&mxc_gpio_syscore_ops); + return platform_driver_register(&mxc_gpio_driver); } subsys_initcall(gpio_mxc_init); From 91393622bca33cac70175e0fdc5a3ec8f9efe08b Mon Sep 17 00:00:00 2001 From: "A.s. Dong" Date: Sat, 10 Nov 2018 14:21:18 +0000 Subject: [PATCH 24/99] gpio: vf610: add optional clock support Some SoCs need the gpio clock to be enabled before accessing HW registers. This patch add the optional clock handling. Cc: Linus Walleij Cc: Stefan Agner Cc: Shawn Guo Cc: linux-gpio@vger.kernel.org Signed-off-by: Dong Aisheng Signed-off-by: Linus Walleij --- drivers/gpio/gpio-vf610.c | 44 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c index 5960396c8d9a..1b79ebcfce3e 100644 --- a/drivers/gpio/gpio-vf610.c +++ b/drivers/gpio/gpio-vf610.c @@ -7,6 +7,7 @@ * Author: Stefan Agner . */ #include +#include #include #include #include @@ -32,6 +33,8 @@ struct vf610_gpio_port { void __iomem *gpio_base; const struct fsl_gpio_soc_data *sdata; u8 irqc[VF610_GPIO_PER_PORT]; + struct clk *clk_port; + struct clk *clk_gpio; int irq; }; @@ -271,6 +274,33 @@ static int vf610_gpio_probe(struct platform_device *pdev) if (port->irq < 0) return port->irq; + port->clk_port = devm_clk_get(&pdev->dev, "port"); + if (!IS_ERR(port->clk_port)) { + ret = clk_prepare_enable(port->clk_port); + if (ret) + return ret; + } else if (port->clk_port == ERR_PTR(-EPROBE_DEFER)) { + /* + * Percolate deferrals, for anything else, + * just live without the clocking. + */ + return PTR_ERR(port->clk_port); + } + + port->clk_gpio = devm_clk_get(&pdev->dev, "gpio"); + if (!IS_ERR(port->clk_gpio)) { + ret = clk_prepare_enable(port->clk_gpio); + if (ret) { + clk_disable_unprepare(port->clk_port); + return ret; + } + } else if (port->clk_gpio == ERR_PTR(-EPROBE_DEFER)) { + clk_disable_unprepare(port->clk_port); + return PTR_ERR(port->clk_gpio); + } + + platform_set_drvdata(pdev, port); + gc = &port->gc; gc->of_node = np; gc->parent = dev; @@ -305,12 +335,26 @@ static int vf610_gpio_probe(struct platform_device *pdev) return 0; } +static int vf610_gpio_remove(struct platform_device *pdev) +{ + struct vf610_gpio_port *port = platform_get_drvdata(pdev); + + gpiochip_remove(&port->gc); + if (!IS_ERR(port->clk_port)) + clk_disable_unprepare(port->clk_port); + if (!IS_ERR(port->clk_gpio)) + clk_disable_unprepare(port->clk_gpio); + + return 0; +} + static struct platform_driver vf610_gpio_driver = { .driver = { .name = "gpio-vf610", .of_match_table = vf610_gpio_dt_ids, }, .probe = vf610_gpio_probe, + .remove = vf610_gpio_remove, }; builtin_platform_driver(vf610_gpio_driver); From 8a9d000f015d0ee9191f5d0c2abc43ec9b8a4756 Mon Sep 17 00:00:00 2001 From: Brajeswar Ghosh Date: Fri, 16 Nov 2018 16:19:10 +0530 Subject: [PATCH 25/99] drivers/gpio/gpio-grgpio.c: Remove duplicate header Remove linux/gpio/driver.h which is included more than once Signed-off-by: Brajeswar Ghosh Signed-off-by: Linus Walleij --- drivers/gpio/gpio-grgpio.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c index 60a1556c570a..45b8d6a02b87 100644 --- a/drivers/gpio/gpio-grgpio.c +++ b/drivers/gpio/gpio-grgpio.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include #include From 27038c3e1f140a9c3f0e514db6db82495f78bbc9 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 22 Nov 2018 15:59:01 +0200 Subject: [PATCH 26/99] gpio: restore original GPLv2+ license of gpiolib-of.c sources It's easy to verify that the change of drivers/gpio/gpiolib-of.c license header to SPDX standard changes the license from GPLv2+ to GPLv2, and this change corrects it. Fixes: dae5f0afcfc3 ("gpio: Use SPDX header for core library") Signed-off-by: Vladimir Zapolskiy Signed-off-by: Linus Walleij --- drivers/gpio/gpiolib-of.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index 7f1260c78270..59cb87325179 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: GPL-2.0+ /* * OF helpers for the GPIO API * From 7c0d404fac4b9a7167002dfe0850781cbcd3a942 Mon Sep 17 00:00:00 2001 From: Phil Edworthy Date: Tue, 20 Nov 2018 11:17:09 +0000 Subject: [PATCH 27/99] gpio: dwapb: Correct the DT node name in the example The sub-nodes should not be called gpio-controller, but simply gpio. Signed-off-by: Phil Edworthy Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt b/Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt index 7276b50c3506..839dd32ffe11 100644 --- a/Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt +++ b/Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt @@ -43,7 +43,7 @@ gpio: gpio@20000 { #address-cells = <1>; #size-cells = <0>; - porta: gpio-controller@0 { + porta: gpio@0 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; @@ -55,7 +55,7 @@ gpio: gpio@20000 { interrupts = <0>; }; - portb: gpio-controller@1 { + portb: gpio@1 { compatible = "snps,dw-apb-gpio-port"; gpio-controller; #gpio-cells = <2>; From 81c85ec15a1946f2e347ec0bf66936121eb97ce7 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 26 Nov 2018 14:51:23 +0100 Subject: [PATCH 28/99] gpio: OF: Parse MMC-specific CD and WP properties When retrieveing CD (card detect) and WP (write protect) GPIO handles from the device tree, make sure to assign them active low by default unless the "cd-inverted" or "wp-inverted" properties are set. These properties mean that respective signal is active HIGH since the SDHCI specification stipulates that this kind of signals should be treated as active LOW. If the twocell GPIO flag is also specified as active low, well that's nice and we will silently ignore the tautological specification. If however the GPIO line is specified as active low in the GPIO flasg cell and "cd-inverted" or "wp-inverted" is also specified, the latter takes precedence and we print a warning. The current effect on the MMC slot-gpio core are as follows: For CD GPIOs: no effect. The current code in mmc/core/host.c calls mmc_gpiod_request_cd() with the "override_active_level" argument set to true, which means that whatever the GPIO descriptor thinks about active low/high will be ignored, the core will use the MMC_CAP2_CD_ACTIVE_HIGH to keep track of this and reads the raw value from the GPIO descriptor, totally bypassing gpiolibs inversion semantics. I plan to clean this up at a later point passing the handling of inversion semantics over to gpiolib, so this patch prepares the ground for that. Fow WP GPIOs: this is probably fixing a bug, because the code in mmc/core/host.c calls mmc_gpiod_request_ro() with the "override_active_level" argument set to false, which means it will respect the inversion semantics of the gpiolib and ignore the MMC_CAP2_RO_ACTIVE_HIGH flag for everyone using this through device tree. However the code in host.c confusingly goes to great lengths setting up the MMC_CAP2_RO_ACTIVE_HIGH flag from the GPIO descriptor and by reading the "wp-inverted" property of the node. As far as I can tell this is all in vain and the inversion is broken: device trees that use "wp-inverted" do not work as intended, instead the only way to actually get inversion on a line is by setting the second cell flag to GPIO_ACTIVE_HIGH (which will be the default) or GPIO_ACTIVE_LOW if they want the proper MMC semantics. Presumably all device trees do this right but we need to parse and handle this properly. Cc: linux-mmc@vger.kernel.org Cc: linux-gpio@vger.kernel.org Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpiolib-of.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index 59cb87325179..fa8044228f0e 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c @@ -57,6 +57,45 @@ static void of_gpio_flags_quirks(struct device_node *np, enum of_gpio_flags *flags, int index) { + /* + * Handle MMC "cd-inverted" and "wp-inverted" semantics. + */ + if (IS_ENABLED(CONFIG_MMC)) { + if (of_property_read_bool(np, "cd-gpios")) { + if (of_property_read_bool(np, "cd-inverted")) { + if (*flags & OF_GPIO_ACTIVE_LOW) { + /* "cd-inverted" takes precedence */ + *flags &= ~OF_GPIO_ACTIVE_LOW; + pr_warn("%s GPIO handle specifies CD active low - ignored\n", + of_node_full_name(np)); + } + } else { + /* + * Active low is the default according to the + * SDHCI specification. If the GPIO handle + * specifies the same thing - good. + */ + *flags |= OF_GPIO_ACTIVE_LOW; + } + } + if (of_property_read_bool(np, "wp-gpios")) { + if (of_property_read_bool(np, "wp-inverted")) { + /* "wp-inverted" takes precedence */ + if (*flags & OF_GPIO_ACTIVE_LOW) { + *flags &= ~OF_GPIO_ACTIVE_LOW; + pr_warn("%s GPIO handle specifies WP active low - ignored\n", + of_node_full_name(np)); + } + } else { + /* + * Active low is the default according to the + * SDHCI specification. If the GPIO handle + * specifies the same thing - good. + */ + *flags |= OF_GPIO_ACTIVE_LOW; + } + } + } /* * Some GPIO fixed regulator quirks. * Note that active low is the default. From 6ad02b29b836b6180263f14cc41147f4cb6d6a70 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 7 Nov 2018 21:18:04 +0200 Subject: [PATCH 29/99] gpio: pch: Convert to use managed functions pcim_* and devm_* This makes the error handling much more simpler than open-coding everything and in addition makes the probe function smaller an tidier. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-pch.c | 64 ++++++++--------------------------------- 1 file changed, 12 insertions(+), 52 deletions(-) diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c index ffce0ab912ed..789e60ea2ac5 100644 --- a/drivers/gpio/gpio-pch.c +++ b/drivers/gpio/gpio-pch.c @@ -367,29 +367,24 @@ static int pch_gpio_probe(struct pci_dev *pdev, int irq_base; u32 msk; - chip = kzalloc(sizeof(*chip), GFP_KERNEL); + chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); if (chip == NULL) return -ENOMEM; chip->dev = &pdev->dev; - ret = pci_enable_device(pdev); + ret = pcim_enable_device(pdev); if (ret) { dev_err(&pdev->dev, "%s : pci_enable_device FAILED", __func__); - goto err_pci_enable; + return ret; } - ret = pci_request_regions(pdev, KBUILD_MODNAME); + ret = pcim_iomap_regions(pdev, 1 << 1, KBUILD_MODNAME); if (ret) { dev_err(&pdev->dev, "pci_request_regions FAILED-%d", ret); - goto err_request_regions; + return ret; } - chip->base = pci_iomap(pdev, 1, 0); - if (!chip->base) { - dev_err(&pdev->dev, "%s : pci_iomap FAILED", __func__); - ret = -ENOMEM; - goto err_iomap; - } + chip->base = pcim_iomap_table(pdev)[1]; if (pdev->device == 0x8803) chip->ioh = INTEL_EG20T_PCH; @@ -405,10 +400,10 @@ static int pch_gpio_probe(struct pci_dev *pdev, #ifdef CONFIG_OF_GPIO chip->gpio.of_node = pdev->dev.of_node; #endif - ret = gpiochip_add_data(&chip->gpio, chip); + ret = devm_gpiochip_add_data(&pdev->dev, &chip->gpio, chip); if (ret) { dev_err(&pdev->dev, "PCH gpio: Failed to register GPIO\n"); - goto err_gpiochip_add; + return ret; } irq_base = devm_irq_alloc_descs(&pdev->dev, -1, 0, @@ -416,7 +411,7 @@ static int pch_gpio_probe(struct pci_dev *pdev, if (irq_base < 0) { dev_warn(&pdev->dev, "PCH gpio: Failed to get IRQ base num\n"); chip->irq_base = -1; - goto end; + return 0; } chip->irq_base = irq_base; @@ -427,47 +422,13 @@ static int pch_gpio_probe(struct pci_dev *pdev, ret = devm_request_irq(&pdev->dev, pdev->irq, pch_gpio_handler, IRQF_SHARED, KBUILD_MODNAME, chip); - if (ret != 0) { + if (ret) { dev_err(&pdev->dev, "%s request_irq failed\n", __func__); - goto err_request_irq; + return ret; } - ret = pch_gpio_alloc_generic_chip(chip, irq_base, - gpio_pins[chip->ioh]); - if (ret) - goto err_request_irq; - -end: - return 0; - -err_request_irq: - gpiochip_remove(&chip->gpio); - -err_gpiochip_add: - pci_iounmap(pdev, chip->base); - -err_iomap: - pci_release_regions(pdev); - -err_request_regions: - pci_disable_device(pdev); - -err_pci_enable: - kfree(chip); - dev_err(&pdev->dev, "%s Failed returns %d\n", __func__, ret); - return ret; -} - -static void pch_gpio_remove(struct pci_dev *pdev) -{ - struct pch_gpio *chip = pci_get_drvdata(pdev); - - gpiochip_remove(&chip->gpio); - pci_iounmap(pdev, chip->base); - pci_release_regions(pdev); - pci_disable_device(pdev); - kfree(chip); + return pch_gpio_alloc_generic_chip(chip, irq_base, gpio_pins[chip->ioh]); } #ifdef CONFIG_PM @@ -538,7 +499,6 @@ static struct pci_driver pch_gpio_driver = { .name = "pch_gpio", .id_table = pch_gpio_pcidev_id, .probe = pch_gpio_probe, - .remove = pch_gpio_remove, .suspend = pch_gpio_suspend, .resume = pch_gpio_resume }; From 9381fc5d655d172af737b5f16749a63e4b931040 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 7 Nov 2018 21:18:04 +0200 Subject: [PATCH 30/99] gpio: sodaville: Convert to use managed functions pcim_* and devm_* This makes the error handling much more simpler than open-coding everything and in addition makes the probe function smaller an tidier. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-sodaville.c | 52 ++++++++++++----------------------- 1 file changed, 18 insertions(+), 34 deletions(-) diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c index f60da83349ef..633f363946b7 100644 --- a/drivers/gpio/gpio-sodaville.c +++ b/drivers/gpio/gpio-sodaville.c @@ -155,8 +155,10 @@ static int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd, * we unmask & ACK the IRQ before the source of the interrupt is gone * then the interrupt is active again. */ - sd->gc = irq_alloc_generic_chip("sdv-gpio", 1, sd->irq_base, - sd->gpio_pub_base, handle_fasteoi_irq); + sd->gc = devm_irq_alloc_generic_chip(&pdev->dev, "sdv-gpio", 1, + sd->irq_base, + sd->gpio_pub_base, + handle_fasteoi_irq); if (!sd->gc) return -ENOMEM; @@ -186,70 +188,52 @@ static int sdv_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id) { struct sdv_gpio_chip_data *sd; - unsigned long addr; - const void *prop; - int len; int ret; u32 mux_val; - sd = kzalloc(sizeof(struct sdv_gpio_chip_data), GFP_KERNEL); + sd = devm_kzalloc(&pdev->dev, sizeof(*sd), GFP_KERNEL); if (!sd) return -ENOMEM; - ret = pci_enable_device(pdev); + + ret = pcim_enable_device(pdev); if (ret) { dev_err(&pdev->dev, "can't enable device.\n"); - goto done; + return ret; } - ret = pci_request_region(pdev, GPIO_BAR, DRV_NAME); + ret = pcim_iomap_regions(pdev, 1 << GPIO_BAR, DRV_NAME); if (ret) { dev_err(&pdev->dev, "can't alloc PCI BAR #%d\n", GPIO_BAR); - goto disable_pci; + return ret; } - addr = pci_resource_start(pdev, GPIO_BAR); - if (!addr) { - ret = -ENODEV; - goto release_reg; - } - sd->gpio_pub_base = ioremap(addr, pci_resource_len(pdev, GPIO_BAR)); + sd->gpio_pub_base = pcim_iomap_table(pdev)[GPIO_BAR]; - prop = of_get_property(pdev->dev.of_node, "intel,muxctl", &len); - if (prop && len == 4) { - mux_val = of_read_number(prop, 1); + ret = of_property_read_u32(pdev->dev.of_node, "intel,muxctl", &mux_val); + if (!ret) writel(mux_val, sd->gpio_pub_base + GPMUXCTL); - } ret = bgpio_init(&sd->chip, &pdev->dev, 4, sd->gpio_pub_base + GPINR, sd->gpio_pub_base + GPOUTR, NULL, sd->gpio_pub_base + GPOER, NULL, 0); if (ret) - goto unmap; + return ret; + sd->chip.ngpio = SDV_NUM_PUB_GPIOS; - ret = gpiochip_add_data(&sd->chip, sd); + ret = devm_gpiochip_add_data(&pdev->dev, &sd->chip, sd); if (ret < 0) { dev_err(&pdev->dev, "gpiochip_add() failed.\n"); - goto unmap; + return ret; } ret = sdv_register_irqsupport(sd, pdev); if (ret) - goto unmap; + return ret; pci_set_drvdata(pdev, sd); dev_info(&pdev->dev, "Sodaville GPIO driver registered.\n"); return 0; - -unmap: - iounmap(sd->gpio_pub_base); -release_reg: - pci_release_region(pdev, GPIO_BAR); -disable_pci: - pci_disable_device(pdev); -done: - kfree(sd); - return ret; } static const struct pci_device_id sdv_gpio_pci_ids[] = { From 226e6b866d741a8cfb7486e7f0767fe4e018413c Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 7 Nov 2018 21:19:45 +0200 Subject: [PATCH 31/99] gpio: pch: Convert to dev_pm_ops Convert the legacy system PM callbacks to new ones. Meanwhile, remove the redundant calls to the PCI for changing a power state since it's done by bus code. While here, remove weird indentation with backslash in use. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-pch.c | 53 ++++++++++------------------------------- 1 file changed, 13 insertions(+), 40 deletions(-) diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c index 789e60ea2ac5..350f95fa7bc9 100644 --- a/drivers/gpio/gpio-pch.c +++ b/drivers/gpio/gpio-pch.c @@ -171,11 +171,10 @@ static int pch_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) return 0; } -#ifdef CONFIG_PM /* * Save register configuration and disable interrupts. */ -static void pch_gpio_save_reg_conf(struct pch_gpio *chip) +static void __maybe_unused pch_gpio_save_reg_conf(struct pch_gpio *chip) { chip->pch_gpio_reg.ien_reg = ioread32(&chip->reg->ien); chip->pch_gpio_reg.imask_reg = ioread32(&chip->reg->imask); @@ -185,14 +184,13 @@ static void pch_gpio_save_reg_conf(struct pch_gpio *chip) if (chip->ioh == INTEL_EG20T_PCH) chip->pch_gpio_reg.im1_reg = ioread32(&chip->reg->im1); if (chip->ioh == OKISEMI_ML7223n_IOH) - chip->pch_gpio_reg.gpio_use_sel_reg =\ - ioread32(&chip->reg->gpio_use_sel); + chip->pch_gpio_reg.gpio_use_sel_reg = ioread32(&chip->reg->gpio_use_sel); } /* * This function restores the register configuration of the GPIO device. */ -static void pch_gpio_restore_reg_conf(struct pch_gpio *chip) +static void __maybe_unused pch_gpio_restore_reg_conf(struct pch_gpio *chip) { iowrite32(chip->pch_gpio_reg.ien_reg, &chip->reg->ien); iowrite32(chip->pch_gpio_reg.imask_reg, &chip->reg->imask); @@ -204,10 +202,8 @@ static void pch_gpio_restore_reg_conf(struct pch_gpio *chip) if (chip->ioh == INTEL_EG20T_PCH) iowrite32(chip->pch_gpio_reg.im1_reg, &chip->reg->im1); if (chip->ioh == OKISEMI_ML7223n_IOH) - iowrite32(chip->pch_gpio_reg.gpio_use_sel_reg, - &chip->reg->gpio_use_sel); + iowrite32(chip->pch_gpio_reg.gpio_use_sel_reg, &chip->reg->gpio_use_sel); } -#endif static int pch_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) { @@ -431,10 +427,9 @@ static int pch_gpio_probe(struct pci_dev *pdev, return pch_gpio_alloc_generic_chip(chip, irq_base, gpio_pins[chip->ioh]); } -#ifdef CONFIG_PM -static int pch_gpio_suspend(struct pci_dev *pdev, pm_message_t state) +static int __maybe_unused pch_gpio_suspend(struct device *dev) { - s32 ret; + struct pci_dev *pdev = to_pci_dev(dev); struct pch_gpio *chip = pci_get_drvdata(pdev); unsigned long flags; @@ -442,36 +437,15 @@ static int pch_gpio_suspend(struct pci_dev *pdev, pm_message_t state) pch_gpio_save_reg_conf(chip); spin_unlock_irqrestore(&chip->spinlock, flags); - ret = pci_save_state(pdev); - if (ret) { - dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret); - return ret; - } - pci_disable_device(pdev); - pci_set_power_state(pdev, PCI_D0); - ret = pci_enable_wake(pdev, PCI_D0, 1); - if (ret) - dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret); - return 0; } -static int pch_gpio_resume(struct pci_dev *pdev) +static int __maybe_unused pch_gpio_resume(struct device *dev) { - s32 ret; + struct pci_dev *pdev = to_pci_dev(dev); struct pch_gpio *chip = pci_get_drvdata(pdev); unsigned long flags; - ret = pci_enable_wake(pdev, PCI_D0, 0); - - pci_set_power_state(pdev, PCI_D0); - ret = pci_enable_device(pdev); - if (ret) { - dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret); - return ret; - } - pci_restore_state(pdev); - spin_lock_irqsave(&chip->spinlock, flags); iowrite32(0x01, &chip->reg->reset); iowrite32(0x00, &chip->reg->reset); @@ -480,10 +454,8 @@ static int pch_gpio_resume(struct pci_dev *pdev) return 0; } -#else -#define pch_gpio_suspend NULL -#define pch_gpio_resume NULL -#endif + +static SIMPLE_DEV_PM_OPS(pch_gpio_pm_ops, pch_gpio_suspend, pch_gpio_resume); #define PCI_VENDOR_ID_ROHM 0x10DB static const struct pci_device_id pch_gpio_pcidev_id[] = { @@ -499,8 +471,9 @@ static struct pci_driver pch_gpio_driver = { .name = "pch_gpio", .id_table = pch_gpio_pcidev_id, .probe = pch_gpio_probe, - .suspend = pch_gpio_suspend, - .resume = pch_gpio_resume + .driver = { + .pm = &pch_gpio_pm_ops, + }, }; module_pci_driver(pch_gpio_driver); From 502ae42ca600760cf32c4de320a91cc37dd5ac89 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 6 Nov 2018 14:38:55 +0200 Subject: [PATCH 32/99] gpio: lynxpoint: Use for_each_set_bit() in IRQ handler This simplifies and standardizes the AB IRQ handler by using the for_each_set_bit() library function. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-lynxpoint.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c index b5b5e500e72c..46560d5913a9 100644 --- a/drivers/gpio/gpio-lynxpoint.c +++ b/drivers/gpio/gpio-lynxpoint.c @@ -240,21 +240,23 @@ static void lp_gpio_irq_handler(struct irq_desc *desc) struct gpio_chip *gc = irq_desc_get_handler_data(desc); struct lp_gpio *lg = gpiochip_get_data(gc); struct irq_chip *chip = irq_data_get_irq_chip(data); - u32 base, pin, mask; unsigned long reg, ena, pending; + u32 base, pin; /* check from GPIO controller which pin triggered the interrupt */ for (base = 0; base < lg->chip.ngpio; base += 32) { reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT); ena = lp_gpio_reg(&lg->chip, base, LP_INT_ENABLE); - while ((pending = (inl(reg) & inl(ena)))) { + /* Only interrupts that are enabled */ + pending = inl(reg) & inl(ena); + + for_each_set_bit(pin, &pending, 32) { unsigned irq; - pin = __ffs(pending); - mask = BIT(pin); /* Clear before handling so we don't lose an edge */ - outl(mask, reg); + outl(BIT(pin), reg); + irq = irq_find_mapping(lg->chip.irq.domain, base + pin); generic_handle_irq(irq); } From a53f79534f4ef418640b0f5c61500069de442e16 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 22 Nov 2018 22:19:41 +0200 Subject: [PATCH 33/99] gpio: rcar: reference device instead of platform device The change simplifies dereferences to the mediated struct device, also it allows to limit the scope of the platform device usage to probe and remove functions only. Non-functional change. Signed-off-by: Vladimir Zapolskiy Reviewed-by: Geert Uytterhoeven Signed-off-by: Linus Walleij --- drivers/gpio/gpio-rcar.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index 1322f7e0cfde..068ce25ffd28 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c @@ -35,7 +35,7 @@ struct gpio_rcar_bank_info { struct gpio_rcar_priv { void __iomem *base; spinlock_t lock; - struct platform_device *pdev; + struct device *dev; struct gpio_chip gpio_chip; struct irq_chip irq_chip; unsigned int irq_parent; @@ -140,7 +140,7 @@ static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type) struct gpio_rcar_priv *p = gpiochip_get_data(gc); unsigned int hwirq = irqd_to_hwirq(d); - dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type); + dev_dbg(p->dev, "sense irq = %d, type = %d\n", hwirq, type); switch (type & IRQ_TYPE_SENSE_MASK) { case IRQ_TYPE_LEVEL_HIGH: @@ -180,8 +180,7 @@ static int gpio_rcar_irq_set_wake(struct irq_data *d, unsigned int on) if (p->irq_parent) { error = irq_set_irq_wake(p->irq_parent, on); if (error) { - dev_dbg(&p->pdev->dev, - "irq %u doesn't support irq_set_wake\n", + dev_dbg(p->dev, "irq %u doesn't support irq_set_wake\n", p->irq_parent); p->irq_parent = 0; } @@ -244,13 +243,13 @@ static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset) struct gpio_rcar_priv *p = gpiochip_get_data(chip); int error; - error = pm_runtime_get_sync(&p->pdev->dev); + error = pm_runtime_get_sync(p->dev); if (error < 0) return error; error = pinctrl_gpio_request(chip->base + offset); if (error) - pm_runtime_put(&p->pdev->dev); + pm_runtime_put(p->dev); return error; } @@ -267,7 +266,7 @@ static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset) */ gpio_rcar_config_general_input_output_mode(chip, offset, false); - pm_runtime_put(&p->pdev->dev); + pm_runtime_put(p->dev); } static int gpio_rcar_get_direction(struct gpio_chip *chip, unsigned int offset) @@ -398,21 +397,20 @@ MODULE_DEVICE_TABLE(of, gpio_rcar_of_table); static int gpio_rcar_parse_dt(struct gpio_rcar_priv *p, unsigned int *npins) { - struct device_node *np = p->pdev->dev.of_node; + struct device_node *np = p->dev->of_node; const struct gpio_rcar_info *info; struct of_phandle_args args; int ret; - info = of_device_get_match_data(&p->pdev->dev); + info = of_device_get_match_data(p->dev); ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, &args); *npins = ret == 0 ? args.args[2] : RCAR_MAX_GPIO_PER_BANK; p->has_both_edge_trigger = info->has_both_edge_trigger; if (*npins == 0 || *npins > RCAR_MAX_GPIO_PER_BANK) { - dev_warn(&p->pdev->dev, - "Invalid number of gpio lines %u, using %u\n", *npins, - RCAR_MAX_GPIO_PER_BANK); + dev_warn(p->dev, "Invalid number of gpio lines %u, using %u\n", + *npins, RCAR_MAX_GPIO_PER_BANK); *npins = RCAR_MAX_GPIO_PER_BANK; } @@ -434,7 +432,7 @@ static int gpio_rcar_probe(struct platform_device *pdev) if (!p) return -ENOMEM; - p->pdev = pdev; + p->dev = dev; spin_lock_init(&p->lock); /* Get device configuration from DT node */ From 46a14b1aa4a161ad5e2abf03e1035d882437252b Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Mon, 26 Nov 2018 09:15:58 +0100 Subject: [PATCH 34/99] MAINTAINERS: remove a duplicate entry for gpio-mockup I'll be getting all GPIO e-mail now, so remove my name from reviewers of gpio-mockup. Signed-off-by: Bartosz Golaszewski Signed-off-by: Linus Walleij --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index f4855974f325..5e8b31ec8c31 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6291,7 +6291,6 @@ F: drivers/media/rc/gpio-ir-tx.c GPIO MOCKUP DRIVER M: Bamvor Jian Zhang -R: Bartosz Golaszewski L: linux-gpio@vger.kernel.org S: Maintained F: drivers/gpio/gpio-mockup.c From 59d646c775d6ae688ee90fda9f2a4270c47b7490 Mon Sep 17 00:00:00 2001 From: Nicholas Mc Guire Date: Wed, 21 Nov 2018 19:06:12 +0100 Subject: [PATCH 35/99] gpio: mt7621: report failure of devm_kasprintf() kasprintf() may return NULL on failure of internal allocation thus the assigned label is not safe if not explicitly checked. On error mediatek_gpio_bank_probe() returns negative values so -ENOMEM in the (unlikely) failure case should be fine here. Fixes: 4ba9c3afda41 ("gpio: mt7621: Add a driver for MT7621") Signed-off-by: Nicholas Mc Guire Reviewed-by: Bartosz Golaszewski Acked-by: Sean Wang Signed-off-by: Linus Walleij --- drivers/gpio/gpio-mt7621.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpio/gpio-mt7621.c b/drivers/gpio/gpio-mt7621.c index d72af6f6cdbd..1ec95bc18f5b 100644 --- a/drivers/gpio/gpio-mt7621.c +++ b/drivers/gpio/gpio-mt7621.c @@ -244,6 +244,8 @@ mediatek_gpio_bank_probe(struct device *dev, rg->chip.of_xlate = mediatek_gpio_xlate; rg->chip.label = devm_kasprintf(dev, GFP_KERNEL, "%s-bank%d", dev_name(dev), bank); + if (!rg->chip.label) + return -ENOMEM; ret = devm_gpiochip_add_data(dev, &rg->chip, mtk); if (ret < 0) { From a109c2dbb571b10bb9969285b646f57309c98251 Mon Sep 17 00:00:00 2001 From: Nicholas Mc Guire Date: Tue, 27 Nov 2018 18:00:18 +0100 Subject: [PATCH 36/99] gpio: mt7621: pass mediatek_gpio_bank_probe() failure up the stack The error cases of mediatek_gpio_bank_probe() would go unnoticed (except for the dev_err() messages). The probe function should return an error if one of the banks failed to initialize properly indicated by not returning non-0. Fixes: 4ba9c3afda41 ("gpio: mt7621: Add a driver for MT7621") Signed-off-by: Nicholas Mc Guire Acked-by: Sean Wang Signed-off-by: Linus Walleij --- drivers/gpio/gpio-mt7621.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-mt7621.c b/drivers/gpio/gpio-mt7621.c index 1ec95bc18f5b..00e954f22bc9 100644 --- a/drivers/gpio/gpio-mt7621.c +++ b/drivers/gpio/gpio-mt7621.c @@ -297,6 +297,7 @@ mediatek_gpio_probe(struct platform_device *pdev) struct device_node *np = dev->of_node; struct mtk *mtk; int i; + int ret; mtk = devm_kzalloc(dev, sizeof(*mtk), GFP_KERNEL); if (!mtk) @@ -311,8 +312,11 @@ mediatek_gpio_probe(struct platform_device *pdev) platform_set_drvdata(pdev, mtk); mediatek_gpio_irq_chip.name = dev_name(dev); - for (i = 0; i < MTK_BANK_CNT; i++) - mediatek_gpio_bank_probe(dev, np, i); + for (i = 0; i < MTK_BANK_CNT; i++) { + ret = mediatek_gpio_bank_probe(dev, np, i); + if (ret) + return ret; + } return 0; } From 9b34d05aa9c8cdd516762f2b06c22fcd05a14072 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 29 Nov 2018 00:28:46 +0200 Subject: [PATCH 37/99] gpio: lpc18xx: use SPDX license identifier Replace GPLv2 header with the SPDX identifier. Signed-off-by: Vladimir Zapolskiy Signed-off-by: Linus Walleij --- drivers/gpio/gpio-lpc18xx.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-lpc18xx.c b/drivers/gpio/gpio-lpc18xx.c index f12e02e1016d..59e6c0ba6b13 100644 --- a/drivers/gpio/gpio-lpc18xx.c +++ b/drivers/gpio/gpio-lpc18xx.c @@ -1,12 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * GPIO driver for NXP LPC18xx/43xx. * * Copyright (C) 2015 Joachim Eastwood * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * */ #include From 9dd1a30cb4881328ae568f6c060446b52539a2dd Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 29 Nov 2018 00:28:47 +0200 Subject: [PATCH 38/99] gpio: lpc18xx: add struct device local variable This is a non-functional change, it simplifies multiple access to 'struct device' pointer derived from a platform device pointer, the new local variable will also be used in the following changes. Signed-off-by: Vladimir Zapolskiy Signed-off-by: Linus Walleij --- drivers/gpio/gpio-lpc18xx.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpio-lpc18xx.c b/drivers/gpio/gpio-lpc18xx.c index 59e6c0ba6b13..52246221328b 100644 --- a/drivers/gpio/gpio-lpc18xx.c +++ b/drivers/gpio/gpio-lpc18xx.c @@ -89,11 +89,12 @@ static const struct gpio_chip lpc18xx_chip = { static int lpc18xx_gpio_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; struct lpc18xx_gpio_chip *gc; struct resource *res; int ret; - gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL); + gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL); if (!gc) return -ENOMEM; @@ -101,29 +102,29 @@ static int lpc18xx_gpio_probe(struct platform_device *pdev) platform_set_drvdata(pdev, gc); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - gc->base = devm_ioremap_resource(&pdev->dev, res); + gc->base = devm_ioremap_resource(dev, res); if (IS_ERR(gc->base)) return PTR_ERR(gc->base); - gc->clk = devm_clk_get(&pdev->dev, NULL); + gc->clk = devm_clk_get(dev, NULL); if (IS_ERR(gc->clk)) { - dev_err(&pdev->dev, "input clock not found\n"); + dev_err(dev, "input clock not found\n"); return PTR_ERR(gc->clk); } ret = clk_prepare_enable(gc->clk); if (ret) { - dev_err(&pdev->dev, "unable to enable clock\n"); + dev_err(dev, "unable to enable clock\n"); return ret; } spin_lock_init(&gc->lock); - gc->gpio.parent = &pdev->dev; + gc->gpio.parent = dev; ret = gpiochip_add_data(&gc->gpio, gc); if (ret) { - dev_err(&pdev->dev, "failed to add gpio chip\n"); + dev_err(dev, "failed to add gpio chip\n"); clk_disable_unprepare(gc->clk); return ret; } From 985d8d5c76dcdc8f4c8ceea8fae71e4a45a0a200 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 29 Nov 2018 00:28:48 +0200 Subject: [PATCH 39/99] gpio: lpc18xx: use resource managed interface to register GPIO controller Slightly simplify deregistration of the GPIO controller driver. Signed-off-by: Vladimir Zapolskiy Signed-off-by: Linus Walleij --- drivers/gpio/gpio-lpc18xx.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-lpc18xx.c b/drivers/gpio/gpio-lpc18xx.c index 52246221328b..dc33185a89b1 100644 --- a/drivers/gpio/gpio-lpc18xx.c +++ b/drivers/gpio/gpio-lpc18xx.c @@ -122,7 +122,7 @@ static int lpc18xx_gpio_probe(struct platform_device *pdev) gc->gpio.parent = dev; - ret = gpiochip_add_data(&gc->gpio, gc); + ret = devm_gpiochip_add_data(dev, &gc->gpio, gc); if (ret) { dev_err(dev, "failed to add gpio chip\n"); clk_disable_unprepare(gc->clk); @@ -136,7 +136,6 @@ static int lpc18xx_gpio_remove(struct platform_device *pdev) { struct lpc18xx_gpio_chip *gc = platform_get_drvdata(pdev); - gpiochip_remove(&gc->gpio); clk_disable_unprepare(gc->clk); return 0; From 5ddabfe8d3ded5dd5e760bf66ebb4241e5314e8d Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 29 Nov 2018 00:48:41 +0200 Subject: [PATCH 40/99] gpio: lpc18xx: add GPIO pin interrupt controller support The change adds support of LPC18xx/LPC43xx GPIO pin interrupt controller block within SoC GPIO controller. The new interrupt controller driver allows to configure and capture edge or level interrupts on 8 arbitrary selectedinput GPIO pins, and lift the signals to be reported as NVIC rising edge interrupts. Configuration of a particular GPIO pin to serve as interrupt and its mapping to an interrupt on NVIC is done by SCU pin controller, for more details see description of 'nxp,gpio-pin-interrupt' device tree property of a GPIO pin [1]. From LPC18xx and LPC43xx User Manuals the GPIO controller consists of the following blocks: * GPIO pin interrupt block at 0x40087000, this change adds its support, * GPIO GROUP0 interrupt block at 0x40088000, * GPIO GROUP1 interrupt block at 0x40089000, * GPIO port block at 0x400F4000, it is supported by the original driver. While all 4 sub-controller blocks have their own I/O addresses, moreover all 3 interrupt blocks are APB0 peripherals and high-speed GPIO block is an AHB slave, according to the hardware manual the GPIO controller is seen as a single block, and 4 sub-controllers have the shared reset signal RGU #28 and clock to register interface CLK_CPU_GPIO on CCU1. Likely support of two GPIO group interrupt blocks won't be added in short term, because the mechanism to mask several interrupt sources is not well defined. [1] Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt Signed-off-by: Vladimir Zapolskiy Signed-off-by: Linus Walleij --- drivers/gpio/Kconfig | 1 + drivers/gpio/gpio-lpc18xx.c | 267 +++++++++++++++++++++++++++++++++++- 2 files changed, 264 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 833a1b51c948..a1876c39a7b7 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -288,6 +288,7 @@ config GPIO_LPC18XX tristate "NXP LPC18XX/43XX GPIO support" default y if ARCH_LPC18XX depends on OF_GPIO && (ARCH_LPC18XX || COMPILE_TEST) + select IRQ_DOMAIN_HIERARCHY help Select this option to enable GPIO driver for NXP LPC18XX/43XX devices. diff --git a/drivers/gpio/gpio-lpc18xx.c b/drivers/gpio/gpio-lpc18xx.c index dc33185a89b1..040fb59d06f7 100644 --- a/drivers/gpio/gpio-lpc18xx.c +++ b/drivers/gpio/gpio-lpc18xx.c @@ -2,6 +2,7 @@ /* * GPIO driver for NXP LPC18xx/43xx. * + * Copyright (C) 2018 Vladimir Zapolskiy * Copyright (C) 2015 Joachim Eastwood * */ @@ -9,9 +10,13 @@ #include #include #include +#include +#include #include #include +#include #include +#include #include #include @@ -21,13 +26,247 @@ #define LPC18XX_MAX_PORTS 8 #define LPC18XX_PINS_PER_PORT 32 +/* LPC18xx GPIO pin interrupt controller register offsets */ +#define LPC18XX_GPIO_PIN_IC_ISEL 0x00 +#define LPC18XX_GPIO_PIN_IC_IENR 0x04 +#define LPC18XX_GPIO_PIN_IC_SIENR 0x08 +#define LPC18XX_GPIO_PIN_IC_CIENR 0x0c +#define LPC18XX_GPIO_PIN_IC_IENF 0x10 +#define LPC18XX_GPIO_PIN_IC_SIENF 0x14 +#define LPC18XX_GPIO_PIN_IC_CIENF 0x18 +#define LPC18XX_GPIO_PIN_IC_RISE 0x1c +#define LPC18XX_GPIO_PIN_IC_FALL 0x20 +#define LPC18XX_GPIO_PIN_IC_IST 0x24 + +#define NR_LPC18XX_GPIO_PIN_IC_IRQS 8 + +struct lpc18xx_gpio_pin_ic { + void __iomem *base; + struct irq_domain *domain; + struct raw_spinlock lock; +}; + struct lpc18xx_gpio_chip { struct gpio_chip gpio; void __iomem *base; struct clk *clk; + struct lpc18xx_gpio_pin_ic *pin_ic; spinlock_t lock; }; +static inline void lpc18xx_gpio_pin_ic_isel(struct lpc18xx_gpio_pin_ic *ic, + u32 pin, bool set) +{ + u32 val = readl_relaxed(ic->base + LPC18XX_GPIO_PIN_IC_ISEL); + + if (set) + val &= ~BIT(pin); + else + val |= BIT(pin); + + writel_relaxed(val, ic->base + LPC18XX_GPIO_PIN_IC_ISEL); +} + +static inline void lpc18xx_gpio_pin_ic_set(struct lpc18xx_gpio_pin_ic *ic, + u32 pin, u32 reg) +{ + writel_relaxed(BIT(pin), ic->base + reg); +} + +static void lpc18xx_gpio_pin_ic_mask(struct irq_data *d) +{ + struct lpc18xx_gpio_pin_ic *ic = d->chip_data; + u32 type = irqd_get_trigger_type(d); + + raw_spin_lock(&ic->lock); + + if (type & IRQ_TYPE_LEVEL_MASK || type & IRQ_TYPE_EDGE_RISING) + lpc18xx_gpio_pin_ic_set(ic, d->hwirq, + LPC18XX_GPIO_PIN_IC_CIENR); + + if (type & IRQ_TYPE_EDGE_FALLING) + lpc18xx_gpio_pin_ic_set(ic, d->hwirq, + LPC18XX_GPIO_PIN_IC_CIENF); + + raw_spin_unlock(&ic->lock); + + irq_chip_mask_parent(d); +} + +static void lpc18xx_gpio_pin_ic_unmask(struct irq_data *d) +{ + struct lpc18xx_gpio_pin_ic *ic = d->chip_data; + u32 type = irqd_get_trigger_type(d); + + raw_spin_lock(&ic->lock); + + if (type & IRQ_TYPE_LEVEL_MASK || type & IRQ_TYPE_EDGE_RISING) + lpc18xx_gpio_pin_ic_set(ic, d->hwirq, + LPC18XX_GPIO_PIN_IC_SIENR); + + if (type & IRQ_TYPE_EDGE_FALLING) + lpc18xx_gpio_pin_ic_set(ic, d->hwirq, + LPC18XX_GPIO_PIN_IC_SIENF); + + raw_spin_unlock(&ic->lock); + + irq_chip_unmask_parent(d); +} + +static void lpc18xx_gpio_pin_ic_eoi(struct irq_data *d) +{ + struct lpc18xx_gpio_pin_ic *ic = d->chip_data; + u32 type = irqd_get_trigger_type(d); + + raw_spin_lock(&ic->lock); + + if (type & IRQ_TYPE_EDGE_BOTH) + lpc18xx_gpio_pin_ic_set(ic, d->hwirq, + LPC18XX_GPIO_PIN_IC_IST); + + raw_spin_unlock(&ic->lock); + + irq_chip_eoi_parent(d); +} + +static int lpc18xx_gpio_pin_ic_set_type(struct irq_data *d, unsigned int type) +{ + struct lpc18xx_gpio_pin_ic *ic = d->chip_data; + + raw_spin_lock(&ic->lock); + + if (type & IRQ_TYPE_LEVEL_HIGH) { + lpc18xx_gpio_pin_ic_isel(ic, d->hwirq, true); + lpc18xx_gpio_pin_ic_set(ic, d->hwirq, + LPC18XX_GPIO_PIN_IC_SIENF); + } else if (type & IRQ_TYPE_LEVEL_LOW) { + lpc18xx_gpio_pin_ic_isel(ic, d->hwirq, true); + lpc18xx_gpio_pin_ic_set(ic, d->hwirq, + LPC18XX_GPIO_PIN_IC_CIENF); + } else { + lpc18xx_gpio_pin_ic_isel(ic, d->hwirq, false); + } + + raw_spin_unlock(&ic->lock); + + return 0; +} + +static struct irq_chip lpc18xx_gpio_pin_ic = { + .name = "LPC18xx GPIO pin", + .irq_mask = lpc18xx_gpio_pin_ic_mask, + .irq_unmask = lpc18xx_gpio_pin_ic_unmask, + .irq_eoi = lpc18xx_gpio_pin_ic_eoi, + .irq_set_type = lpc18xx_gpio_pin_ic_set_type, + .irq_retrigger = irq_chip_retrigger_hierarchy, + .flags = IRQCHIP_SET_TYPE_MASKED, +}; + +static int lpc18xx_gpio_pin_ic_domain_alloc(struct irq_domain *domain, + unsigned int virq, + unsigned int nr_irqs, void *data) +{ + struct irq_fwspec parent_fwspec, *fwspec = data; + struct lpc18xx_gpio_pin_ic *ic = domain->host_data; + irq_hw_number_t hwirq; + int ret; + + if (nr_irqs != 1) + return -EINVAL; + + hwirq = fwspec->param[0]; + if (hwirq >= NR_LPC18XX_GPIO_PIN_IC_IRQS) + return -EINVAL; + + /* + * All LPC18xx/LPC43xx GPIO pin hardware interrupts are translated + * into edge interrupts 32...39 on parent Cortex-M3/M4 NVIC + */ + parent_fwspec.fwnode = domain->parent->fwnode; + parent_fwspec.param_count = 1; + parent_fwspec.param[0] = hwirq + 32; + + ret = irq_domain_alloc_irqs_parent(domain, virq, 1, &parent_fwspec); + if (ret < 0) { + pr_err("failed to allocate parent irq %u: %d\n", + parent_fwspec.param[0], ret); + return ret; + } + + return irq_domain_set_hwirq_and_chip(domain, virq, hwirq, + &lpc18xx_gpio_pin_ic, ic); +} + +static const struct irq_domain_ops lpc18xx_gpio_pin_ic_domain_ops = { + .alloc = lpc18xx_gpio_pin_ic_domain_alloc, + .xlate = irq_domain_xlate_twocell, + .free = irq_domain_free_irqs_common, +}; + +static int lpc18xx_gpio_pin_ic_probe(struct lpc18xx_gpio_chip *gc) +{ + struct device *dev = gc->gpio.parent; + struct irq_domain *parent_domain; + struct device_node *parent_node; + struct lpc18xx_gpio_pin_ic *ic; + struct resource res; + int ret, index; + + parent_node = of_irq_find_parent(dev->of_node); + if (!parent_node) + return -ENXIO; + + parent_domain = irq_find_host(parent_node); + of_node_put(parent_node); + if (!parent_domain) + return -ENXIO; + + ic = devm_kzalloc(dev, sizeof(*ic), GFP_KERNEL); + if (!ic) + return -ENOMEM; + + index = of_property_match_string(dev->of_node, "reg-names", + "gpio-pin-ic"); + if (index < 0) { + ret = -ENODEV; + goto free_ic; + } + + ret = of_address_to_resource(dev->of_node, index, &res); + if (ret < 0) + goto free_ic; + + ic->base = devm_ioremap_resource(dev, &res); + if (IS_ERR(ic->base)) { + ret = PTR_ERR(ic->base); + goto free_ic; + } + + raw_spin_lock_init(&ic->lock); + + ic->domain = irq_domain_add_hierarchy(parent_domain, 0, + NR_LPC18XX_GPIO_PIN_IC_IRQS, + dev->of_node, + &lpc18xx_gpio_pin_ic_domain_ops, + ic); + if (!ic->domain) { + pr_err("unable to add irq domain\n"); + ret = -ENODEV; + goto free_iomap; + } + + gc->pin_ic = ic; + + return 0; + +free_iomap: + devm_iounmap(dev, ic->base); +free_ic: + devm_kfree(dev, ic); + + return ret; +} + static void lpc18xx_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct lpc18xx_gpio_chip *gc = gpiochip_get_data(chip); @@ -91,8 +330,7 @@ static int lpc18xx_gpio_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct lpc18xx_gpio_chip *gc; - struct resource *res; - int ret; + int index, ret; gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL); if (!gc) @@ -101,8 +339,22 @@ static int lpc18xx_gpio_probe(struct platform_device *pdev) gc->gpio = lpc18xx_chip; platform_set_drvdata(pdev, gc); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - gc->base = devm_ioremap_resource(dev, res); + index = of_property_match_string(dev->of_node, "reg-names", "gpio"); + if (index < 0) { + /* To support backward compatibility take the first resource */ + struct resource *res; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + gc->base = devm_ioremap_resource(dev, res); + } else { + struct resource res; + + ret = of_address_to_resource(dev->of_node, index, &res); + if (ret < 0) + return ret; + + gc->base = devm_ioremap_resource(dev, &res); + } if (IS_ERR(gc->base)) return PTR_ERR(gc->base); @@ -129,6 +381,9 @@ static int lpc18xx_gpio_probe(struct platform_device *pdev) return ret; } + /* On error GPIO pin interrupt controller just won't be registered */ + lpc18xx_gpio_pin_ic_probe(gc); + return 0; } @@ -136,6 +391,9 @@ static int lpc18xx_gpio_remove(struct platform_device *pdev) { struct lpc18xx_gpio_chip *gc = platform_get_drvdata(pdev); + if (gc->pin_ic) + irq_domain_remove(gc->pin_ic->domain); + clk_disable_unprepare(gc->clk); return 0; @@ -158,5 +416,6 @@ static struct platform_driver lpc18xx_gpio_driver = { module_platform_driver(lpc18xx_gpio_driver); MODULE_AUTHOR("Joachim Eastwood "); +MODULE_AUTHOR("Vladimir Zapolskiy "); MODULE_DESCRIPTION("GPIO driver for LPC18xx/43xx"); MODULE_LICENSE("GPL v2"); From e96fd5ce5ffab81ca1153eda28805dd3f073f03e Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Thu, 29 Nov 2018 00:48:40 +0200 Subject: [PATCH 41/99] dt-bindings: gpio: lpc18xx: describe interrupt controllers of GPIO controller From LPC18xx and LPC43xx User Manuals the GPIO controller consists of the following weakly connected blocks: * GPIO pin interrupt block at 0x40087000, * GPIO GROUP0 interrupt block at 0x40088000, * GPIO GROUP1 interrupt block at 0x40089000, * GPIO port block at 0x400F4000. While all 4 sub-controller blocks have their own I/O addresses, moreover all 3 interrupt blocks are APB0 peripherals and high-speed GPIO block is an AHB slave, according to the hardware manual interrupt controllers and GPIO controller block are seen as a single device, all 4 sub-controllers have the shared reset signal RGU #28 and the same shared clock to access registers CLK_Mx_GPIO on CCU1. The change adds descriptions of the currently missing interrupt controller blocks found on GPIO controller, new added properties are 'reg-names', 'resets', 'interrupt-controller' and '#interrupt-cells', also the example is updated to reflect the changes in device tree binding description. Signed-off-by: Vladimir Zapolskiy Signed-off-by: Linus Walleij --- .../bindings/gpio/nxp,lpc1850-gpio.txt | 38 ++++++++++++++----- 1 file changed, 29 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt b/Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt index eb7cdd69e10b..627efc78ecf2 100644 --- a/Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt +++ b/Documentation/devicetree/bindings/gpio/nxp,lpc1850-gpio.txt @@ -3,12 +3,24 @@ NXP LPC18xx/43xx GPIO controller Device Tree Bindings Required properties: - compatible : Should be "nxp,lpc1850-gpio" -- reg : Address and length of the register set for the device -- clocks : Clock specifier (see clock bindings for details) -- gpio-controller : Marks the device node as a GPIO controller. -- #gpio-cells : Should be two - - First cell is the GPIO line number - - Second cell is used to specify polarity +- reg : List of addresses and lengths of the GPIO controller + register sets +- reg-names : Should be "gpio", "gpio-pin-ic", "gpio-group0-ic" and + "gpio-gpoup1-ic" +- clocks : Phandle and clock specifier pair for GPIO controller +- resets : Phandle and reset specifier pair for GPIO controller +- gpio-controller : Marks the device node as a GPIO controller +- #gpio-cells : Should be two: + - The first cell is the GPIO line number + - The second cell is used to specify polarity +- interrupt-controller : Marks the device node as an interrupt controller +- #interrupt-cells : Should be two: + - The first cell is an interrupt number within + 0..9 range, for GPIO pin interrupts it is equal + to 'nxp,gpio-pin-interrupt' property value of + GPIO pin configuration, 8 is for GPIO GROUP0 + interrupt, 9 is for GPIO GROUP1 interrupt + - The second cell is used to specify interrupt type Optional properties: - gpio-ranges : Mapping between GPIO and pinctrl @@ -19,21 +31,29 @@ Example: gpio: gpio@400f4000 { compatible = "nxp,lpc1850-gpio"; - reg = <0x400f4000 0x4000>; + reg = <0x400f4000 0x4000>, <0x40087000 0x1000>, + <0x40088000 0x1000>, <0x40089000 0x1000>; + reg-names = "gpio", "gpio-pin-ic", + "gpio-group0-ic", "gpio-gpoup1-ic"; clocks = <&ccu1 CLK_CPU_GPIO>; + resets = <&rgu 28>; gpio-controller; #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; gpio-ranges = <&pinctrl LPC_GPIO(0,0) LPC_PIN(0,0) 2>, ... <&pinctrl LPC_GPIO(7,19) LPC_PIN(f,5) 7>; }; gpio_joystick { - compatible = "gpio-keys-polled"; + compatible = "gpio-keys"; ... - button@0 { + button0 { ... + interrupt-parent = <&gpio>; + interrupts = <1 IRQ_TYPE_EDGE_BOTH>; gpios = <&gpio LPC_GPIO(4,8) GPIO_ACTIVE_LOW>; }; }; From 25fbc9e8d3673d372ad6ae44a8d4f850879f50ad Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Fri, 23 Nov 2018 13:43:41 +0100 Subject: [PATCH 42/99] dt-bindings: tegra186-gpio: Add Tegra186 specific prefix Subsequent generations of Tegra, such as Tegra194, contain a completely different set of GPIOs. In order to clarify that the Tegra186 defines are indeed specific to Tegra186, change the prefix from TEGRA_ to TEGRA186_. Note that for now we need to keep the old definitions in place to avoid breaking compilation in file that use this header. Once all users have been converted to use the new defines, the old ones can be removed. Also note that this is only a naming change and doesn't affect device tree ABI. Signed-off-by: Thierry Reding Acked-by: Jon Hunter --- include/dt-bindings/gpio/tegra186-gpio.h | 41 ++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/include/dt-bindings/gpio/tegra186-gpio.h b/include/dt-bindings/gpio/tegra186-gpio.h index 463ad398fe3e..cabc5712e745 100644 --- a/include/dt-bindings/gpio/tegra186-gpio.h +++ b/include/dt-bindings/gpio/tegra186-gpio.h @@ -14,6 +14,34 @@ #include /* GPIOs implemented by main GPIO controller */ +#define TEGRA186_MAIN_GPIO_PORT_A 0 +#define TEGRA186_MAIN_GPIO_PORT_B 1 +#define TEGRA186_MAIN_GPIO_PORT_C 2 +#define TEGRA186_MAIN_GPIO_PORT_D 3 +#define TEGRA186_MAIN_GPIO_PORT_E 4 +#define TEGRA186_MAIN_GPIO_PORT_F 5 +#define TEGRA186_MAIN_GPIO_PORT_G 6 +#define TEGRA186_MAIN_GPIO_PORT_H 7 +#define TEGRA186_MAIN_GPIO_PORT_I 8 +#define TEGRA186_MAIN_GPIO_PORT_J 9 +#define TEGRA186_MAIN_GPIO_PORT_K 10 +#define TEGRA186_MAIN_GPIO_PORT_L 11 +#define TEGRA186_MAIN_GPIO_PORT_M 12 +#define TEGRA186_MAIN_GPIO_PORT_N 13 +#define TEGRA186_MAIN_GPIO_PORT_O 14 +#define TEGRA186_MAIN_GPIO_PORT_P 15 +#define TEGRA186_MAIN_GPIO_PORT_Q 16 +#define TEGRA186_MAIN_GPIO_PORT_R 17 +#define TEGRA186_MAIN_GPIO_PORT_T 18 +#define TEGRA186_MAIN_GPIO_PORT_X 19 +#define TEGRA186_MAIN_GPIO_PORT_Y 20 +#define TEGRA186_MAIN_GPIO_PORT_BB 21 +#define TEGRA186_MAIN_GPIO_PORT_CC 22 + +#define TEGRA186_MAIN_GPIO(port, offset) \ + ((TEGRA186_MAIN_GPIO_PORT_##port * 8) + offset) + +/* need to keep these for backwards-compatibility */ #define TEGRA_MAIN_GPIO_PORT_A 0 #define TEGRA_MAIN_GPIO_PORT_B 1 #define TEGRA_MAIN_GPIO_PORT_C 2 @@ -42,6 +70,19 @@ ((TEGRA_MAIN_GPIO_PORT_##port * 8) + offset) /* GPIOs implemented by AON GPIO controller */ +#define TEGRA186_AON_GPIO_PORT_S 0 +#define TEGRA186_AON_GPIO_PORT_U 1 +#define TEGRA186_AON_GPIO_PORT_V 2 +#define TEGRA186_AON_GPIO_PORT_W 3 +#define TEGRA186_AON_GPIO_PORT_Z 4 +#define TEGRA186_AON_GPIO_PORT_AA 5 +#define TEGRA186_AON_GPIO_PORT_EE 6 +#define TEGRA186_AON_GPIO_PORT_FF 7 + +#define TEGRA186_AON_GPIO(port, offset) \ + ((TEGRA186_AON_GPIO_PORT_##port * 8) + offset) + +/* need to keep these for backwards-compatibility */ #define TEGRA_AON_GPIO_PORT_S 0 #define TEGRA_AON_GPIO_PORT_U 1 #define TEGRA_AON_GPIO_PORT_V 2 From 9904f0325ec3d57b823b4c9cd569eed9fc1ef1f7 Mon Sep 17 00:00:00 2001 From: Yangtao Li Date: Fri, 30 Nov 2018 11:22:46 -0500 Subject: [PATCH 43/99] gpio: ks8695: Change to use DEFINE_SHOW_ATTRIBUTE macro Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Signed-off-by: Yangtao Li Signed-off-by: Linus Walleij --- drivers/gpio/gpio-ks8695.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/gpio/gpio-ks8695.c b/drivers/gpio/gpio-ks8695.c index 55d562e1278e..d6d6140ffc40 100644 --- a/drivers/gpio/gpio-ks8695.c +++ b/drivers/gpio/gpio-ks8695.c @@ -282,22 +282,13 @@ static int ks8695_gpio_show(struct seq_file *s, void *unused) return 0; } -static int ks8695_gpio_open(struct inode *inode, struct file *file) -{ - return single_open(file, ks8695_gpio_show, NULL); -} - -static const struct file_operations ks8695_gpio_operations = { - .open = ks8695_gpio_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; +DEFINE_SHOW_ATTRIBUTE(ks8695_gpio); static int __init ks8695_gpio_debugfs_init(void) { /* /sys/kernel/debug/ks8695_gpio */ - (void) debugfs_create_file("ks8695_gpio", S_IFREG | S_IRUGO, NULL, NULL, &ks8695_gpio_operations); + debugfs_create_file("ks8695_gpio", S_IFREG | S_IRUGO, NULL, NULL, + &ks8695_gpio_fops); return 0; } postcore_initcall(ks8695_gpio_debugfs_init); From 6169005ceb8c715582eca70df3912cd2b351ede2 Mon Sep 17 00:00:00 2001 From: Brandon Maier Date: Wed, 28 Nov 2018 11:14:17 -0600 Subject: [PATCH 44/99] gpio: zynq: Report gpio direction at boot The Zynq's gpios can be configured by the bootloader. But Linux will erroneously report all gpios as inputs unless we implement get_direction(). Signed-off-by: Brandon Maier Tested-by: Michal Simek Signed-off-by: Linus Walleij --- drivers/gpio/gpio-zynq.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c index ac9b02c9598f..b3b4edcdffe0 100644 --- a/drivers/gpio/gpio-zynq.c +++ b/drivers/gpio/gpio-zynq.c @@ -357,6 +357,28 @@ static int zynq_gpio_dir_out(struct gpio_chip *chip, unsigned int pin, return 0; } +/** + * zynq_gpio_get_direction - Read the direction of the specified GPIO pin + * @chip: gpio_chip instance to be worked on + * @pin: gpio pin number within the device + * + * This function returns the direction of the specified GPIO. + * + * Return: 0 for output, 1 for input + */ +static int zynq_gpio_get_direction(struct gpio_chip *chip, unsigned int pin) +{ + u32 reg; + unsigned int bank_num, bank_pin_num; + struct zynq_gpio *gpio = gpiochip_get_data(chip); + + zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio); + + reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num)); + + return !(reg & BIT(bank_pin_num)); +} + /** * zynq_gpio_irq_mask - Disable the interrupts for a gpio pin * @irq_data: per irq and chip data passed down to chip functions @@ -825,6 +847,7 @@ static int zynq_gpio_probe(struct platform_device *pdev) chip->free = zynq_gpio_free; chip->direction_input = zynq_gpio_dir_in; chip->direction_output = zynq_gpio_dir_out; + chip->get_direction = zynq_gpio_get_direction; chip->base = of_alias_get_id(pdev->dev.of_node, "gpio"); chip->ngpio = gpio->p_data->ngpio; From b00b7980af8a126976105ec68664a72bb72c6db2 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 5 Dec 2018 21:54:09 +0900 Subject: [PATCH 45/99] gpio: uniphier: convert to SPDX License Identifier checkpatch.pl suggests to use SPDX license tag. I am happy to follow it. Signed-off-by: Masahiro Yamada Signed-off-by: Linus Walleij --- drivers/gpio/gpio-uniphier.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c index 74551cbdb2e8..0f662b297a95 100644 --- a/drivers/gpio/gpio-uniphier.c +++ b/drivers/gpio/gpio-uniphier.c @@ -1,16 +1,7 @@ -/* - * Copyright (C) 2017 Socionext Inc. - * Author: Masahiro Yamada - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2017 Socionext Inc. +// Author: Masahiro Yamada #include #include From 9be93e1ab73f34953971cb1b92e79826aa274055 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 6 Nov 2018 14:38:55 +0200 Subject: [PATCH 46/99] gpio: pch: Use for_each_set_bit() in IRQ handler This simplifies and standardizes the AB IRQ handler by using the for_each_set_bit() library function. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-pch.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c index 350f95fa7bc9..ebecb8ad88ab 100644 --- a/drivers/gpio/gpio-pch.c +++ b/drivers/gpio/gpio-pch.c @@ -313,16 +313,14 @@ static void pch_irq_ack(struct irq_data *d) static irqreturn_t pch_gpio_handler(int irq, void *dev_id) { struct pch_gpio *chip = dev_id; - u32 reg_val = ioread32(&chip->reg->istatus); + unsigned long reg_val = ioread32(&chip->reg->istatus); int i, ret = IRQ_NONE; - for (i = 0; i < gpio_pins[chip->ioh]; i++) { - if (reg_val & BIT(i)) { - dev_dbg(chip->dev, "%s:[%d]:irq=%d status=0x%x\n", - __func__, i, irq, reg_val); - generic_handle_irq(chip->irq_base + i); - ret = IRQ_HANDLED; - } + for_each_set_bit(i, ®_val, gpio_pins[chip->ioh]) { + dev_dbg(chip->dev, "%s:[%d]:irq=%d status=0x%lx\n", __func__, + i, irq, reg_val); + generic_handle_irq(chip->irq_base + i); + ret = IRQ_HANDLED; } return ret; } From f3af44f052272b815a2803b8205acfce393ee352 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 6 Nov 2018 14:38:55 +0200 Subject: [PATCH 47/99] gpio: sodaville: Use for_each_set_bit() in IRQ handler This simplifies and standardizes the AB IRQ handler by using the for_each_set_bit() library function. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-sodaville.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c index 633f363946b7..bb21214461d2 100644 --- a/drivers/gpio/gpio-sodaville.c +++ b/drivers/gpio/gpio-sodaville.c @@ -80,18 +80,15 @@ static int sdv_gpio_pub_set_type(struct irq_data *d, unsigned int type) static irqreturn_t sdv_gpio_pub_irq_handler(int irq, void *data) { struct sdv_gpio_chip_data *sd = data; - u32 irq_stat = readl(sd->gpio_pub_base + GPSTR); + unsigned long irq_stat = readl(sd->gpio_pub_base + GPSTR); + int irq_bit; irq_stat &= readl(sd->gpio_pub_base + GPIO_INT); if (!irq_stat) return IRQ_NONE; - while (irq_stat) { - u32 irq_bit = __fls(irq_stat); - - irq_stat &= ~BIT(irq_bit); + for_each_set_bit(irq_bit, &irq_stat, 32) generic_handle_irq(irq_find_mapping(sd->id, irq_bit)); - } return IRQ_HANDLED; } From c5aaa316819428560dafe4429bff97459fe61fd3 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 7 Nov 2018 23:29:41 +0200 Subject: [PATCH 48/99] gpio: ich: Simplify error handling in ichx_write_bit() Simplify error handling in ichx_write_bit() and propagate its error code to the caller. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-ich.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c index dba392221042..4f388a48b632 100644 --- a/drivers/gpio/gpio-ich.c +++ b/drivers/gpio/gpio-ich.c @@ -121,7 +121,6 @@ static int ichx_write_bit(int reg, unsigned nr, int val, int verify) u32 data, tmp; int reg_nr = nr / 32; int bit = nr & 0x1f; - int ret = 0; spin_lock_irqsave(&ichx_priv.lock, flags); @@ -142,12 +141,10 @@ static int ichx_write_bit(int reg, unsigned nr, int val, int verify) tmp = ICHX_READ(ichx_priv.desc->regs[reg][reg_nr], ichx_priv.gpio_base); - if (verify && data != tmp) - ret = -EPERM; spin_unlock_irqrestore(&ichx_priv.lock, flags); - return ret; + return (verify && data != tmp) ? -EPERM : 0; } static int ichx_read_bit(int reg, unsigned nr) @@ -186,10 +183,7 @@ static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) * Try setting pin as an input and verify it worked since many pins * are output-only. */ - if (ichx_write_bit(GPIO_IO_SEL, nr, 1, 1)) - return -EINVAL; - - return 0; + return ichx_write_bit(GPIO_IO_SEL, nr, 1, 1); } static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, @@ -206,10 +200,7 @@ static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, * Try setting pin as an output and verify it worked since many pins * are input-only. */ - if (ichx_write_bit(GPIO_IO_SEL, nr, 0, 1)) - return -EINVAL; - - return 0; + return ichx_write_bit(GPIO_IO_SEL, nr, 0, 1); } static int ichx_gpio_get(struct gpio_chip *chip, unsigned nr) From ff4709b44cc0755ce7af4c7b3a18580f388b3bff Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Thu, 8 Nov 2018 17:37:07 +0200 Subject: [PATCH 49/99] gpio: ich: Switch to use struct device instead of platform_device There is no need to have a pointer to struct platform_device. Instead, switch to use struct device one. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-ich.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c index 4f388a48b632..de88a45c2e7c 100644 --- a/drivers/gpio/gpio-ich.c +++ b/drivers/gpio/gpio-ich.c @@ -100,7 +100,7 @@ struct ichx_desc { static struct { spinlock_t lock; - struct platform_device *dev; + struct device *dev; struct gpio_chip chip; struct resource *gpio_base; /* GPIO IO base */ struct resource *pm_base; /* Power Mangagment IO base */ @@ -275,7 +275,7 @@ static void ichx_gpiolib_setup(struct gpio_chip *chip) { chip->owner = THIS_MODULE; chip->label = DRV_NAME; - chip->parent = &ichx_priv.dev->dev; + chip->parent = ichx_priv.dev; /* Allow chip-specific overrides of request()/get() */ chip->request = ichx_priv.desc->request ? @@ -398,15 +398,14 @@ static int ichx_gpio_request_regions(struct device *dev, static int ichx_gpio_probe(struct platform_device *pdev) { + struct device *dev = &pdev->dev; + struct lpc_ich_info *ich_info = dev_get_platdata(dev); struct resource *res_base, *res_pm; int err; - struct lpc_ich_info *ich_info = dev_get_platdata(&pdev->dev); if (!ich_info) return -ENODEV; - ichx_priv.dev = pdev; - switch (ich_info->gpio_version) { case ICH_I3100_GPIO: ichx_priv.desc = &i3100_desc; @@ -436,15 +435,17 @@ static int ichx_gpio_probe(struct platform_device *pdev) return -ENODEV; } + ichx_priv.dev = dev; spin_lock_init(&ichx_priv.lock); + res_base = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPIO); - ichx_priv.use_gpio = ich_info->use_gpio; - err = ichx_gpio_request_regions(&pdev->dev, res_base, pdev->name, - ichx_priv.use_gpio); + err = ichx_gpio_request_regions(dev, res_base, pdev->name, + ich_info->use_gpio); if (err) return err; ichx_priv.gpio_base = res_base; + ichx_priv.use_gpio = ich_info->use_gpio; /* * If necessary, determine the I/O address of ACPI/power management @@ -460,8 +461,8 @@ static int ichx_gpio_probe(struct platform_device *pdev) goto init; } - if (!devm_request_region(&pdev->dev, res_pm->start, - resource_size(res_pm), pdev->name)) { + if (!devm_request_region(dev, res_pm->start, resource_size(res_pm), + pdev->name)) { pr_warn("ACPI BAR is busy, GPI 0 - 15 unavailable\n"); goto init; } From c086bea543023329f3676492749f64914d0cf69f Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Thu, 8 Nov 2018 17:48:14 +0200 Subject: [PATCH 50/99] gpio: ich: Convert pr_ to dev_ Instead of customized pr_ format use unified dev_ output. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-ich.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c index de88a45c2e7c..6af651619926 100644 --- a/drivers/gpio/gpio-ich.c +++ b/drivers/gpio/gpio-ich.c @@ -18,7 +18,6 @@ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include #include @@ -457,13 +456,13 @@ static int ichx_gpio_probe(struct platform_device *pdev) res_pm = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPE0); if (!res_pm) { - pr_warn("ACPI BAR is unavailable, GPI 0 - 15 unavailable\n"); + dev_warn(dev, "ACPI BAR is unavailable, GPI 0 - 15 unavailable\n"); goto init; } if (!devm_request_region(dev, res_pm->start, resource_size(res_pm), pdev->name)) { - pr_warn("ACPI BAR is busy, GPI 0 - 15 unavailable\n"); + dev_warn(dev, "ACPI BAR is busy, GPI 0 - 15 unavailable\n"); goto init; } @@ -473,12 +472,12 @@ init: ichx_gpiolib_setup(&ichx_priv.chip); err = gpiochip_add_data(&ichx_priv.chip, NULL); if (err) { - pr_err("Failed to register GPIOs\n"); + dev_err(dev, "Failed to register GPIOs\n"); return err; } - pr_info("GPIO from %d to %d on %s\n", ichx_priv.chip.base, - ichx_priv.chip.base + ichx_priv.chip.ngpio - 1, DRV_NAME); + dev_info(dev, "GPIO from %d to %d\n", ichx_priv.chip.base, + ichx_priv.chip.base + ichx_priv.chip.ngpio - 1); return 0; } From 5f6f2b9f6dbf7afb5ce4e2faaf25006e7d9d8880 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 3 Jul 2018 03:39:03 +0300 Subject: [PATCH 51/99] gpio: ich: Join string literals back For easy grepping on debug purposes join string literals back in the messages. While here, fix spelling typo. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-ich.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c index 6af651619926..e674d2eebe41 100644 --- a/drivers/gpio/gpio-ich.c +++ b/drivers/gpio/gpio-ich.c @@ -111,8 +111,7 @@ static struct { static int modparam_gpiobase = -1; /* dynamic */ module_param_named(gpiobase, modparam_gpiobase, int, 0444); -MODULE_PARM_DESC(gpiobase, "The GPIO number base. -1 means dynamic, " - "which is the default."); +MODULE_PARM_DESC(gpiobase, "The GPIO number base. -1 means dynamic, which is the default."); static int ichx_write_bit(int reg, unsigned nr, int val, int verify) { @@ -448,7 +447,7 @@ static int ichx_gpio_probe(struct platform_device *pdev) /* * If necessary, determine the I/O address of ACPI/power management - * registers which are needed to read the the GPE0 register for GPI pins + * registers which are needed to read the GPE0 register for GPI pins * 0 - 15 on some chipsets. */ if (!ichx_priv.desc->uses_gpe0) From 0511e116b8327aa7bf621d9cee35b93ffa69c85a Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 7 Dec 2018 17:33:07 +0200 Subject: [PATCH 52/99] gpio: pch: Remove redundant __func__ from debug print dev_dbg includes the function name & line number by default when dynamic debugging is enabled. Hence __func__ is redundant here and removed. Do the same for any messages in ->probe() since it doesn't make sense. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-pch.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c index ebecb8ad88ab..8759f5b4b8e4 100644 --- a/drivers/gpio/gpio-pch.c +++ b/drivers/gpio/gpio-pch.c @@ -246,8 +246,7 @@ static int pch_irq_type(struct irq_data *d, unsigned int type) im_reg = &chip->reg->im1; im_pos = ch - 8; } - dev_dbg(chip->dev, "%s:irq=%d type=%d ch=%d pos=%d\n", - __func__, irq, type, ch, im_pos); + dev_dbg(chip->dev, "irq=%d type=%d ch=%d pos=%d\n", irq, type, ch, im_pos); spin_lock_irqsave(&chip->spinlock, flags); @@ -317,8 +316,7 @@ static irqreturn_t pch_gpio_handler(int irq, void *dev_id) int i, ret = IRQ_NONE; for_each_set_bit(i, ®_val, gpio_pins[chip->ioh]) { - dev_dbg(chip->dev, "%s:[%d]:irq=%d status=0x%lx\n", __func__, - i, irq, reg_val); + dev_dbg(chip->dev, "[%d]:irq=%d status=0x%lx\n", i, irq, reg_val); generic_handle_irq(chip->irq_base + i); ret = IRQ_HANDLED; } @@ -368,7 +366,7 @@ static int pch_gpio_probe(struct pci_dev *pdev, chip->dev = &pdev->dev; ret = pcim_enable_device(pdev); if (ret) { - dev_err(&pdev->dev, "%s : pci_enable_device FAILED", __func__); + dev_err(&pdev->dev, "pci_enable_device FAILED"); return ret; } @@ -417,8 +415,7 @@ static int pch_gpio_probe(struct pci_dev *pdev, ret = devm_request_irq(&pdev->dev, pdev->irq, pch_gpio_handler, IRQF_SHARED, KBUILD_MODNAME, chip); if (ret) { - dev_err(&pdev->dev, - "%s request_irq failed\n", __func__); + dev_err(&pdev->dev, "request_irq failed\n"); return ret; } From a3bb44bcb3a06b43940576f9749020a42d31a9c0 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 7 Nov 2018 21:29:53 +0200 Subject: [PATCH 53/99] gpio: pch: Remove duplicate assignments There is no need to assign the same values which core does for us anyway. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-pch.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c index 8759f5b4b8e4..9fadda50232b 100644 --- a/drivers/gpio/gpio-pch.c +++ b/drivers/gpio/gpio-pch.c @@ -222,7 +222,6 @@ static void pch_gpio_setup(struct pch_gpio *chip) gpio->get = pch_gpio_get; gpio->direction_output = pch_gpio_direction_output; gpio->set = pch_gpio_set; - gpio->dbg_show = NULL; gpio->base = -1; gpio->ngpio = gpio_pins[chip->ioh]; gpio->can_sleep = false; @@ -389,9 +388,7 @@ static int pch_gpio_probe(struct pci_dev *pdev, pci_set_drvdata(pdev, chip); spin_lock_init(&chip->spinlock); pch_gpio_setup(chip); -#ifdef CONFIG_OF_GPIO - chip->gpio.of_node = pdev->dev.of_node; -#endif + ret = devm_gpiochip_add_data(&pdev->dev, &chip->gpio, chip); if (ret) { dev_err(&pdev->dev, "PCH gpio: Failed to register GPIO\n"); From ddc53c40cbe7b13d1086cf3b5fdc5c074a289d18 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 4 Sep 2018 14:26:25 +0300 Subject: [PATCH 54/99] gpio: intel-mid: Remove linux/module.h and sort headers There is no need to include linux/module.h when at the same time we include linux/init.h. Remove redundant inclusion. While here, remove no-op macro and sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-intel-mid.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-intel-mid.c b/drivers/gpio/gpio-intel-mid.c index 028d64c2cb1e..9b5f27a244b7 100644 --- a/drivers/gpio/gpio-intel-mid.c +++ b/drivers/gpio/gpio-intel-mid.c @@ -20,12 +20,11 @@ */ #include +#include #include #include #include -#include #include -#include #include #include #include @@ -273,9 +272,8 @@ static const struct pci_device_id intel_gpio_ids[] = { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x08f7), .driver_data = (kernel_ulong_t)&gpio_cloverview_core, }, - { 0 } + { } }; -MODULE_DEVICE_TABLE(pci, intel_gpio_ids); static void intel_mid_irq_handler(struct irq_desc *desc) { From 92c286267d62c40a7bab85f303d467085954ee3b Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 4 Sep 2018 14:26:25 +0300 Subject: [PATCH 55/99] gpio: lynxpoint: Remove linux/init.h and sort headers There is no need to include linux/init.h when at the same time we include linux/module.h. Remove redundant inclusion. While here, sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-lynxpoint.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c index 46560d5913a9..8ffd237e8433 100644 --- a/drivers/gpio/gpio-lynxpoint.c +++ b/drivers/gpio/gpio-lynxpoint.c @@ -19,18 +19,17 @@ * */ +#include +#include +#include +#include +#include #include #include -#include -#include -#include -#include -#include -#include -#include #include #include -#include +#include +#include /* LynxPoint chipset has support for 94 gpio pins */ From 7629771f5eb8d24edeb28fda09a637d7b6fb8f03 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 4 Sep 2018 14:26:25 +0300 Subject: [PATCH 56/99] gpio: merrifield: Remove linux/init.h There is no need to include linux/init.h when at the same time we include linux/module.h. Remove redundant inclusion. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-merrifield.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpio/gpio-merrifield.c b/drivers/gpio/gpio-merrifield.c index 97421bd4a60f..3d0a37f8ee75 100644 --- a/drivers/gpio/gpio-merrifield.c +++ b/drivers/gpio/gpio-merrifield.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include From 47091b0594d95359cac907c67051c97975b6f6c9 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 4 Sep 2018 14:26:25 +0300 Subject: [PATCH 57/99] gpio: sch: Remove linux/init.h and sort headers There is no need to include linux/init.h when at the same time we include linux/module.h. Remove redundant inclusion. While here, sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-sch.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c index e9878f6ede67..7286f991fcaa 100644 --- a/drivers/gpio/gpio-sch.c +++ b/drivers/gpio/gpio-sch.c @@ -18,15 +18,14 @@ * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ -#include +#include +#include +#include +#include #include #include -#include -#include -#include -#include #include -#include +#include #define GEN 0x00 #define GIO 0x04 From 488f270cad27fdb87b00ee22b2c4d0616d8bb135 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 4 Sep 2018 14:26:25 +0300 Subject: [PATCH 58/99] gpio: ich: Sort headers alphabetically Sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-ich.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c index e674d2eebe41..d55080d14606 100644 --- a/drivers/gpio/gpio-ich.c +++ b/drivers/gpio/gpio-ich.c @@ -19,13 +19,13 @@ */ +#include +#include #include +#include #include #include -#include #include -#include -#include #define DRV_NAME "gpio_ich" From 3e1884f8c32f845bd74fcfa347fe8936999f471d Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 4 Sep 2018 14:26:25 +0300 Subject: [PATCH 59/99] gpio: pch: Sort headers alphabetically Sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-pch.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c index 9fadda50232b..a9a114c77bdc 100644 --- a/drivers/gpio/gpio-pch.c +++ b/drivers/gpio/gpio-pch.c @@ -14,12 +14,12 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. */ -#include -#include -#include #include #include #include +#include +#include +#include #include #define PCH_EDGE_FALLING 0 From 8700998ff6b3ae23f9421eb936d7260a17a38f5d Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 4 Sep 2018 14:26:25 +0300 Subject: [PATCH 60/99] gpio: sodaville: Sort headers alphabetically Sort header block alphabetically for easy maintenance. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-sodaville.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c index bb21214461d2..65eaff290b00 100644 --- a/drivers/gpio/gpio-sodaville.c +++ b/drivers/gpio/gpio-sodaville.c @@ -12,15 +12,15 @@ */ #include +#include #include +#include #include #include -#include #include +#include #include #include -#include -#include #define DRV_NAME "sdv_gpio" #define SDV_NUM_PUB_GPIOS 12 From 7ed0cf0afd603f565bb04538b21103b3dadd514c Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 6 Nov 2018 14:11:42 +0200 Subject: [PATCH 61/99] gpio: ich: Convert to use SPDX identifier Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-ich.c | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c index d55080d14606..90bf7742f9b0 100644 --- a/drivers/gpio/gpio-ich.c +++ b/drivers/gpio/gpio-ich.c @@ -1,21 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver * * Copyright (C) 2010 Extreme Engineering Solutions. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ From 917842f676961d72922332489deee8373284e624 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 6 Nov 2018 14:11:42 +0200 Subject: [PATCH 62/99] gpio: intel-mid: Convert to use SPDX identifier Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-intel-mid.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/gpio/gpio-intel-mid.c b/drivers/gpio/gpio-intel-mid.c index 9b5f27a244b7..4e803baf980e 100644 --- a/drivers/gpio/gpio-intel-mid.c +++ b/drivers/gpio/gpio-intel-mid.c @@ -1,16 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Intel MID GPIO driver * * Copyright (c) 2008-2014,2016 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ /* Supports: From 7fa07b6f4e13bec94370efde258cfc0d892d0c58 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 6 Nov 2018 14:11:42 +0200 Subject: [PATCH 63/99] gpio: lynxpoint: Convert to use SPDX identifier Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-lynxpoint.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c index 8ffd237e8433..24dd4069262a 100644 --- a/drivers/gpio/gpio-lynxpoint.c +++ b/drivers/gpio/gpio-lynxpoint.c @@ -1,22 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * GPIO controller driver for Intel Lynxpoint PCH chipset> * Copyright (c) 2012, Intel Corporation. * * Author: Mathias Nyman - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - * */ #include @@ -468,5 +455,5 @@ module_exit(lp_gpio_exit); MODULE_AUTHOR("Mathias Nyman (Intel)"); MODULE_DESCRIPTION("GPIO interface for Intel Lynxpoint"); -MODULE_LICENSE("GPL"); +MODULE_LICENSE("GPL v2"); MODULE_ALIAS("platform:lp_gpio"); From 93374b76a92c1e88f3251d38a6ea36e07a2cdf86 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 6 Nov 2018 14:11:42 +0200 Subject: [PATCH 64/99] gpio: merrifield: Convert to use SPDX identifier Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-merrifield.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpio/gpio-merrifield.c b/drivers/gpio/gpio-merrifield.c index 3d0a37f8ee75..7c659fdaa6d5 100644 --- a/drivers/gpio/gpio-merrifield.c +++ b/drivers/gpio/gpio-merrifield.c @@ -1,12 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Intel Merrifield SoC GPIO driver * * Copyright (c) 2016 Intel Corporation. * Author: Andy Shevchenko - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ #include From 9b8bf5bfb6cebc46761fdc213928432d50061546 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 6 Nov 2018 14:11:42 +0200 Subject: [PATCH 65/99] gpio: pch: Convert to use SPDX identifier Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-pch.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/drivers/gpio/gpio-pch.c b/drivers/gpio/gpio-pch.c index a9a114c77bdc..ee79e5f88b5a 100644 --- a/drivers/gpio/gpio-pch.c +++ b/drivers/gpio/gpio-pch.c @@ -1,18 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2011 LAPIS Semiconductor Co., Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. */ #include #include @@ -471,4 +459,4 @@ static struct pci_driver pch_gpio_driver = { module_pci_driver(pch_gpio_driver); MODULE_DESCRIPTION("PCH GPIO PCI Driver"); -MODULE_LICENSE("GPL"); +MODULE_LICENSE("GPL v2"); From cb0e9a7bda9b3989c2be0d37eb2053690a58c0a3 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 6 Nov 2018 14:11:42 +0200 Subject: [PATCH 66/99] gpio: sch: Convert to use SPDX identifier Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-sch.c | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c index 7286f991fcaa..c333046d02b8 100644 --- a/drivers/gpio/gpio-sch.c +++ b/drivers/gpio/gpio-sch.c @@ -1,21 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0 /* * GPIO interface for Intel Poulsbo SCH * * Copyright (c) 2010 CompuLab Ltd * Author: Denis Turischev - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License 2 as published - * by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. If not, write to - * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ #include @@ -234,5 +222,5 @@ module_platform_driver(sch_gpio_driver); MODULE_AUTHOR("Denis Turischev "); MODULE_DESCRIPTION("GPIO interface for Intel Poulsbo SCH"); -MODULE_LICENSE("GPL"); +MODULE_LICENSE("GPL v2"); MODULE_ALIAS("platform:sch_gpio"); From aaa21231698c0d326922a325647adf38e4f21db0 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 6 Nov 2018 14:11:42 +0200 Subject: [PATCH 67/99] gpio: sodaville: Convert to use SPDX identifier Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko --- drivers/gpio/gpio-sodaville.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/gpio/gpio-sodaville.c b/drivers/gpio/gpio-sodaville.c index 65eaff290b00..aed988e78251 100644 --- a/drivers/gpio/gpio-sodaville.c +++ b/drivers/gpio/gpio-sodaville.c @@ -1,14 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 /* * GPIO interface for Intel Sodaville SoCs. * * Copyright (c) 2010, 2011 Intel Corporation * * Author: Hans J. Koch - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License 2 as published - * by the Free Software Foundation. - * */ #include From 67566ae474e628c0077163d1e20d09d3e33b0ae3 Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Sat, 8 Dec 2018 16:38:41 +0200 Subject: [PATCH 68/99] gpio: lpc18xx: fix GPIO controller driver build as a module The problem is reported for allmodconfig build setup: ERROR: "irq_chip_retrigger_hierarchy" [drivers/gpio/gpio-lpc18xx.ko] undefined! make[2]: *** [scripts/Makefile.modpost:92: __modpost] Error 1 make[1]: *** [Makefile:1271: modules] Error 2 My testing in runtime shows that it is sufficient to remove .irq_retrigger callback, which is assigned to unexported irq_chip_retrigger_hierarchy() function, I did't observe any regressions, and thus apparently it is a better fix rather than exporting the function defined in kernel/irq/chip.c (see commit 52b2a05fa7c8 ("genirq: Export IRQ functions for module use")) or sticking the GPIO controller driver build to built-in option only. Reported-by: kbuild test robot Fixes: 5ddabfe8d3de ("gpio: lpc18xx: add GPIO pin interrupt controller support") Signed-off-by: Vladimir Zapolskiy Signed-off-by: Linus Walleij --- drivers/gpio/gpio-lpc18xx.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpio/gpio-lpc18xx.c b/drivers/gpio/gpio-lpc18xx.c index 040fb59d06f7..d441dbaed7a3 100644 --- a/drivers/gpio/gpio-lpc18xx.c +++ b/drivers/gpio/gpio-lpc18xx.c @@ -11,7 +11,6 @@ #include #include #include -#include #include #include #include @@ -158,7 +157,6 @@ static struct irq_chip lpc18xx_gpio_pin_ic = { .irq_unmask = lpc18xx_gpio_pin_ic_unmask, .irq_eoi = lpc18xx_gpio_pin_ic_eoi, .irq_set_type = lpc18xx_gpio_pin_ic_set_type, - .irq_retrigger = irq_chip_retrigger_hierarchy, .flags = IRQCHIP_SET_TYPE_MASKED, }; From 21abf103818a4735e80fb0ab03934bed8ae9a028 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 4 Sep 2018 13:31:45 +0200 Subject: [PATCH 69/99] gpio: Pass a flag to gpiochip_request_own_desc() Before things go out of hand, make it possible to pass flags when requesting "own" descriptors from a gpio_chip. This is necessary if the chip wants to request a GPIO with active low semantics, for example. Cc: Janusz Krzysztofik Cc: Thomas Petazzoni Cc: Jason Cooper Cc: Jiri Kosina Cc: Roger Quadros Reviewed-by: Gregory CLEMENT Signed-off-by: Linus Walleij --- Documentation/driver-api/gpio/driver.rst | 4 +++- arch/arm/mach-omap1/ams-delta-fiq.c | 2 +- arch/arm/mach-omap1/board-ams-delta.c | 2 +- drivers/gpio/gpio-mvebu.c | 2 +- drivers/gpio/gpiolib-acpi.c | 13 +++---------- drivers/gpio/gpiolib.c | 21 +++++++++++++++++++-- drivers/hid/hid-cp2112.c | 2 +- drivers/memory/omap-gpmc.c | 3 ++- include/linux/gpio/driver.h | 4 +++- 9 files changed, 34 insertions(+), 19 deletions(-) diff --git a/Documentation/driver-api/gpio/driver.rst b/Documentation/driver-api/gpio/driver.rst index a6c14ff0c54f..a92d8837b62b 100644 --- a/Documentation/driver-api/gpio/driver.rst +++ b/Documentation/driver-api/gpio/driver.rst @@ -434,7 +434,9 @@ try_module_get()). A GPIO driver can use the following functions instead to request and free descriptors without being pinned to the kernel forever:: struct gpio_desc *gpiochip_request_own_desc(struct gpio_desc *desc, - const char *label) + u16 hwnum, + const char *label, + enum gpiod_flags flags) void gpiochip_free_own_desc(struct gpio_desc *desc) diff --git a/arch/arm/mach-omap1/ams-delta-fiq.c b/arch/arm/mach-omap1/ams-delta-fiq.c index b0dc7ddf5877..0324d0f209ea 100644 --- a/arch/arm/mach-omap1/ams-delta-fiq.c +++ b/arch/arm/mach-omap1/ams-delta-fiq.c @@ -103,7 +103,7 @@ void __init ams_delta_init_fiq(struct gpio_chip *chip, } for (i = 0; i < ARRAY_SIZE(irq_data); i++) { - gpiod = gpiochip_request_own_desc(chip, i, pin_name[i]); + gpiod = gpiochip_request_own_desc(chip, i, pin_name[i], 0); if (IS_ERR(gpiod)) { pr_err("%s: failed to get GPIO pin %d (%ld)\n", __func__, i, PTR_ERR(gpiod)); diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 3d191fd52910..6719e139eb62 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -808,7 +808,7 @@ static void __init ams_delta_led_init(struct gpio_chip *chip) int i; for (i = LATCH1_PIN_LED_CAMERA; i < LATCH1_PIN_DOCKIT1; i++) { - gpiod = gpiochip_request_own_desc(chip, i, NULL); + gpiod = gpiochip_request_own_desc(chip, i, "camera-led", 0); if (IS_ERR(gpiod)) { pr_warn("%s: %s GPIO %d request failed (%ld)\n", __func__, LATCH1_LABEL, i, PTR_ERR(gpiod)); diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index 6e02148c208b..6c675c5accba 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -608,7 +608,7 @@ static int mvebu_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) ret = -EBUSY; } else { desc = gpiochip_request_own_desc(&mvchip->chip, - pwm->hwpwm, "mvebu-pwm"); + pwm->hwpwm, "mvebu-pwm", 0); if (IS_ERR(desc)) { ret = PTR_ERR(desc); goto out; diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c index 55b72fbe1631..722a9befa8a9 100644 --- a/drivers/gpio/gpiolib-acpi.c +++ b/drivers/gpio/gpiolib-acpi.c @@ -167,7 +167,7 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares, if (!handler) return AE_OK; - desc = gpiochip_request_own_desc(chip, pin, "ACPI:Event"); + desc = gpiochip_request_own_desc(chip, pin, "ACPI:Event", 0); if (IS_ERR(desc)) { dev_err(chip->parent, "Failed to request GPIO\n"); return AE_ERROR; @@ -884,21 +884,14 @@ acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address, const char *label = "ACPI:OpRegion"; int err; - desc = gpiochip_request_own_desc(chip, pin, label); + desc = gpiochip_request_own_desc(chip, pin, label, + flags); if (IS_ERR(desc)) { status = AE_ERROR; mutex_unlock(&achip->conn_lock); goto out; } - err = gpiod_configure_flags(desc, label, 0, flags); - if (err < 0) { - status = AE_NOT_CONFIGURED; - gpiochip_free_own_desc(desc); - mutex_unlock(&achip->conn_lock); - goto out; - } - conn = kzalloc(sizeof(*conn), GFP_KERNEL); if (!conn) { status = AE_NO_MEMORY; diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index d61fdcb26fbd..2ec8b0d2096a 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -2454,6 +2454,7 @@ EXPORT_SYMBOL_GPL(gpiochip_is_requested); * @chip: GPIO chip * @hwnum: hardware number of the GPIO for which to request the descriptor * @label: label for the GPIO + * @flags: flags for this GPIO or 0 if default * * Function allows GPIO chip drivers to request and use their own GPIO * descriptors via gpiolib API. Difference to gpiod_request() is that this @@ -2466,7 +2467,8 @@ EXPORT_SYMBOL_GPL(gpiochip_is_requested); * code on failure. */ struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum, - const char *label) + const char *label, + enum gpiod_flags flags) { struct gpio_desc *desc = gpiochip_get_desc(chip, hwnum); int err; @@ -2480,6 +2482,13 @@ struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum, if (err < 0) return ERR_PTR(err); + err = gpiod_configure_flags(desc, label, 0, flags); + if (err) { + chip_err(chip, "setup of own GPIO %s failed\n", label); + gpiod_free_commit(desc); + return ERR_PTR(err); + } + return desc; } EXPORT_SYMBOL_GPL(gpiochip_request_own_desc); @@ -4332,7 +4341,15 @@ int gpiod_hog(struct gpio_desc *desc, const char *name, chip = gpiod_to_chip(desc); hwnum = gpio_chip_hwgpio(desc); - local_desc = gpiochip_request_own_desc(chip, hwnum, name); + /* + * FIXME: not very elegant that we call gpiod_configure_flags() + * twice here (once inside gpiochip_request_own_desc() and + * again here), but the gpiochip_request_own_desc() is external + * and cannot really pass the lflags so this is the lesser evil + * at the moment. Pass zero as dflags on this first call so we + * don't screw anything up. + */ + local_desc = gpiochip_request_own_desc(chip, hwnum, name, 0); if (IS_ERR(local_desc)) { status = PTR_ERR(local_desc); pr_err("requesting hog GPIO %s (chip %s, offset %d) failed, %d\n", diff --git a/drivers/hid/hid-cp2112.c b/drivers/hid/hid-cp2112.c index 271f31461da4..47f65857408d 100644 --- a/drivers/hid/hid-cp2112.c +++ b/drivers/hid/hid-cp2112.c @@ -1203,7 +1203,7 @@ static int __maybe_unused cp2112_allocate_irq(struct cp2112_device *dev, return -EINVAL; dev->desc[pin] = gpiochip_request_own_desc(&dev->gc, pin, - "HID/I2C:Event"); + "HID/I2C:Event", 0); if (IS_ERR(dev->desc[pin])) { dev_err(dev->gc.parent, "Failed to request GPIO\n"); return PTR_ERR(dev->desc[pin]); diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index c215287e80cf..b9b4f7058b05 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -2170,7 +2170,8 @@ static int gpmc_probe_generic_child(struct platform_device *pdev, unsigned int wait_pin = gpmc_s.wait_pin; waitpin_desc = gpiochip_request_own_desc(&gpmc->gpio_chip, - wait_pin, "WAITPIN"); + wait_pin, "WAITPIN", + 0); if (IS_ERR(waitpin_desc)) { dev_err(&pdev->dev, "invalid wait-pin: %d\n", wait_pin); ret = PTR_ERR(waitpin_desc); diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 9c8d5d491680..07cddbf45186 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -17,6 +17,7 @@ struct device_node; struct seq_file; struct gpio_device; struct module; +enum gpiod_flags; #ifdef CONFIG_GPIOLIB @@ -604,7 +605,8 @@ gpiochip_remove_pin_ranges(struct gpio_chip *chip) #endif /* CONFIG_PINCTRL */ struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum, - const char *label); + const char *label, + enum gpiod_flags flags); void gpiochip_free_own_desc(struct gpio_desc *desc); #else /* CONFIG_GPIOLIB */ From 3a2fa906c0a92d1a0813162a3252f24d383a5374 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Thu, 29 Nov 2018 18:03:10 +0100 Subject: [PATCH 70/99] gpio: tegra186: Rename flow variable to type The IRQ core code refers to the interrupt type by that name, whereas the term flow is almost never used. Some GPIO controllers use the term flow_type, but it is most consistent to just go with the IRQ core terminology. Signed-off-by: Thierry Reding Signed-off-by: Linus Walleij --- drivers/gpio/gpio-tegra186.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c index 9d0292c8a199..66ec38bb7954 100644 --- a/drivers/gpio/gpio-tegra186.c +++ b/drivers/gpio/gpio-tegra186.c @@ -279,7 +279,7 @@ static void tegra186_irq_unmask(struct irq_data *data) writel(value, base + TEGRA186_GPIO_ENABLE_CONFIG); } -static int tegra186_irq_set_type(struct irq_data *data, unsigned int flow) +static int tegra186_irq_set_type(struct irq_data *data, unsigned int type) { struct tegra_gpio *gpio = irq_data_get_irq_chip_data(data); void __iomem *base; @@ -293,7 +293,7 @@ static int tegra186_irq_set_type(struct irq_data *data, unsigned int flow) value &= ~TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_TYPE_MASK; value &= ~TEGRA186_GPIO_ENABLE_CONFIG_TRIGGER_LEVEL; - switch (flow & IRQ_TYPE_SENSE_MASK) { + switch (type & IRQ_TYPE_SENSE_MASK) { case IRQ_TYPE_NONE: break; @@ -325,7 +325,7 @@ static int tegra186_irq_set_type(struct irq_data *data, unsigned int flow) writel(value, base + TEGRA186_GPIO_ENABLE_CONFIG); - if ((flow & IRQ_TYPE_EDGE_BOTH) == 0) + if ((type & IRQ_TYPE_EDGE_BOTH) == 0) irq_set_handler_locked(data, handle_level_irq); else irq_set_handler_locked(data, handle_edge_irq); From 873d1e8e6fafabc7750e5ef0fe0289548f540f5b Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:39:49 +0100 Subject: [PATCH 71/99] gpio: pca953x: Deduplicate the bank_shift The bank_shift = fls(...) code was duplicated in the driver 5 times, pull it into separate function. Signed-off-by: Marek Vasut Cc: Bartosz Golaszewski Reviewed-by: Kieran Bingham Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 023a32cfac42..31e3b1b52330 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -159,11 +159,16 @@ struct pca953x_chip { int (*read_regs)(struct pca953x_chip *, int, u8 *); }; +static int pca953x_bank_shift(struct pca953x_chip *chip) +{ + return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); +} + static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, int off) { int ret; - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int bank_shift = pca953x_bank_shift(chip); int offset = off / BANK_SZ; ret = i2c_smbus_read_byte_data(chip->client, @@ -182,7 +187,7 @@ static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, int off) { int ret; - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int bank_shift = pca953x_bank_shift(chip); int offset = off / BANK_SZ; ret = i2c_smbus_write_byte_data(chip->client, @@ -221,7 +226,7 @@ static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) { - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; @@ -265,7 +270,7 @@ static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val) { - int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); + int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; @@ -402,13 +407,12 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { struct pca953x_chip *chip = gpiochip_get_data(gc); + int bank_shift = pca953x_bank_shift(chip); unsigned int bank_mask, bank_val; - int bank_shift, bank; + int bank; u8 reg_val[MAX_BANK]; int ret; - bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); - mutex_lock(&chip->i2c_lock); memcpy(reg_val, chip->reg_output, NBANK(chip)); for (bank = 0; bank < NBANK(chip); bank++) { From 92f45ebe68181c2d7f76633ffae55bc9447d62cd Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:39:50 +0100 Subject: [PATCH 72/99] gpio: pca953x: Fix AI overflow on PCAL6524 The PCAL_PINCTRL_MASK is too large. The extended register block on PCAL6524, which is the largest chip with this block, has the block limited to address range 0x40..0x7f. This is because the bit 7 in the command register is used for the Address Increment functionality. Trim the mask to 0x60 to match the datasheet and to prevent accidental overwrite of the AI bit. Signed-off-by: Marek Vasut Reviewed-by: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 31e3b1b52330..4e9c79ca69c5 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -58,7 +58,7 @@ #define PCA_GPIO_MASK 0x00FF #define PCAL_GPIO_MASK 0x1f -#define PCAL_PINCTRL_MASK 0xe0 +#define PCAL_PINCTRL_MASK 0x60 #define PCA_INT 0x0100 #define PCA_PCAL 0x0200 From 8958262af3fb832c9817e50f599c5552957ceaba Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:39:51 +0100 Subject: [PATCH 73/99] gpio: pca953x: Repair multi-byte IO address increment on PCA9575 The multi-byte IO on various pca953x chips requires the auto-increment bit, while other chips toggle the LSbit automatically. Note that LSbit toggling only alternates between two registers during the IO, it is not the same as address auto-increment. The driver currently assumes that #gpios > 16 implies auto-increment, while #gpios <= 16 implies LSbit toggling. This is incorrect at there are chips with 16 GPIOs which require the auto-increment bit. The PCA9575, according to NXP datasheet rev. 4.2 from 16 April 2015, section 7.3 Command Register, the bit 7 in command register is the auto-increment bit, which allows programming multiple registers sequentially. Set this bit both in pca953x_gpio_set_multiple(), where it fixes the multi register programming, and in pca957x_write_regs_16(), where is simplifies the function. In fact, the pca957x_write_regs_16() now looks rather similar to pca953x_write_regs_24() and pca953x_write_regs_16(), which is intended for subsequent patches. Signed-off-by: Marek Vasut Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 4e9c79ca69c5..479fa376bd18 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -215,13 +215,10 @@ static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) { - int ret; + u32 regaddr = (reg << 1) | REG_ADDR_AI; - ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]); - if (ret < 0) - return ret; - - return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]); + return i2c_smbus_write_i2c_block_data(chip->client, regaddr, + NBANK(chip), val); } static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) @@ -408,6 +405,7 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, { struct pca953x_chip *chip = gpiochip_get_data(gc); int bank_shift = pca953x_bank_shift(chip); + u32 regaddr = chip->regs->output << bank_shift; unsigned int bank_mask, bank_val; int bank; u8 reg_val[MAX_BANK]; @@ -426,8 +424,13 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, } } - ret = i2c_smbus_write_i2c_block_data(chip->client, - chip->regs->output << bank_shift, + /* PCA9575 needs address-increment on multi-byte writes */ + if ((PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) && + (NBANK(chip) > 1)) { + regaddr |= REG_ADDR_AI; + } + + ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, NBANK(chip), reg_val); if (ret) goto exit; From 028a219ae5b4661ccc400d7f182766853275f0eb Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:39:52 +0100 Subject: [PATCH 74/99] gpio: pca953x: Unify pca95{3,7}x_write_regs_16() At this point, these two functions only differ in whether they do or do not set the address increment bit on PCA9575. Merge these two functions together to simplify the code a bit. Signed-off-by: Marek Vasut Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 479fa376bd18..2e02b3a9ac48 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -208,14 +208,11 @@ static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) { - u16 word = get_unaligned((u16 *)val); + u32 regaddr = (reg << 1); - return i2c_smbus_write_word_data(chip->client, reg << 1, word); -} - -static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) -{ - u32 regaddr = (reg << 1) | REG_ADDR_AI; + /* PCA9575 needs address-increment on multi-byte writes */ + if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) + regaddr |= REG_ADDR_AI; return i2c_smbus_write_i2c_block_data(chip->client, regaddr, NBANK(chip), val); @@ -892,10 +889,7 @@ static int pca953x_probe(struct i2c_client *client, chip->write_regs = pca953x_write_regs_24; chip->read_regs = pca953x_read_regs_24; } else { - if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) - chip->write_regs = pca953x_write_regs_16; - else - chip->write_regs = pca957x_write_regs_16; + chip->write_regs = pca953x_write_regs_16; chip->read_regs = pca953x_read_regs_16; } From 49e713738f9ebfe659d16bff3ff1fb0a054aa9f7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:39:53 +0100 Subject: [PATCH 75/99] gpio: pca953x: Unify pca953x_{read,write}_regs_{16,24}() At this point, these two functions only differ in whether they do or do not set the address increment bit. The 16 GPIO case does not need to set the AI bit, except for PCA9575 on write, while the 24 GPIO and more case does set the AI bit always. Merge these two functions together to simplify the code a bit. Signed-off-by: Marek Vasut Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 49 ++++++++++++++----------------------- 1 file changed, 18 insertions(+), 31 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 2e02b3a9ac48..551fa69661b2 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -206,9 +206,16 @@ static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val) return i2c_smbus_write_byte_data(chip->client, reg, *val); } -static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) +static int pca953x_write_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) { - u32 regaddr = (reg << 1); + int bank_shift = pca953x_bank_shift(chip); + int addr = (reg & PCAL_GPIO_MASK) << bank_shift; + int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; + u8 regaddr = pinctrl | addr; + + /* Chips with 24 and more GPIOs always support Auto Increment */ + if (NBANK(chip) > 2) + regaddr |= REG_ADDR_AI; /* PCA9575 needs address-increment on multi-byte writes */ if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) @@ -218,17 +225,6 @@ static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val) NBANK(chip), val); } -static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val) -{ - int bank_shift = pca953x_bank_shift(chip); - int addr = (reg & PCAL_GPIO_MASK) << bank_shift; - int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; - - return i2c_smbus_write_i2c_block_data(chip->client, - pinctrl | addr | REG_ADDR_AI, - NBANK(chip), val); -} - static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { int ret = 0; @@ -252,24 +248,18 @@ static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val) return ret; } -static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val) -{ - int ret; - - ret = i2c_smbus_read_word_data(chip->client, reg << 1); - put_unaligned(ret, (u16 *)val); - - return ret; -} - -static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val) +static int pca953x_read_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) { int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; + u8 regaddr = pinctrl | addr; - return i2c_smbus_read_i2c_block_data(chip->client, - pinctrl | addr | REG_ADDR_AI, + /* Chips with 24 and more GPIOs always support Auto Increment */ + if (NBANK(chip) > 2) + regaddr |= REG_ADDR_AI; + + return i2c_smbus_read_i2c_block_data(chip->client, regaddr, NBANK(chip), val); } @@ -885,12 +875,9 @@ static int pca953x_probe(struct i2c_client *client, if (chip->gpio_chip.ngpio <= 8) { chip->write_regs = pca953x_write_regs_8; chip->read_regs = pca953x_read_regs_8; - } else if (chip->gpio_chip.ngpio >= 24) { - chip->write_regs = pca953x_write_regs_24; - chip->read_regs = pca953x_read_regs_24; } else { - chip->write_regs = pca953x_write_regs_16; - chip->read_regs = pca953x_read_regs_16; + chip->write_regs = pca953x_write_regs_mul; + chip->read_regs = pca953x_read_regs_mul; } if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) From 90adb0979947ab9ee2bd5fffa28c6812a47cd7f2 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:39:54 +0100 Subject: [PATCH 76/99] gpio: pca953x: Unify pca953x_{read,write}_regs_{8,mul}() At this point, the pca953x_{read,write}_regs_mul() can read single bank PCA953x GPIO chips as well. Merge the _8 and _mul functions together to simplify the code a bit. Signed-off-by: Marek Vasut Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 54 ++++++------------------------------- 1 file changed, 8 insertions(+), 46 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 551fa69661b2..09fd8cde9ca9 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -154,9 +154,6 @@ struct pca953x_chip { struct regulator *regulator; const struct pca953x_reg_config *regs; - - int (*write_regs)(struct pca953x_chip *, int, u8 *); - int (*read_regs)(struct pca953x_chip *, int, u8 *); }; static int pca953x_bank_shift(struct pca953x_chip *chip) @@ -201,17 +198,13 @@ static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, return 0; } -static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val) -{ - return i2c_smbus_write_byte_data(chip->client, reg, *val); -} - -static int pca953x_write_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) +static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; u8 regaddr = pinctrl | addr; + int ret; /* Chips with 24 and more GPIOs always support Auto Increment */ if (NBANK(chip) > 2) @@ -221,15 +214,8 @@ static int pca953x_write_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) regaddr |= REG_ADDR_AI; - return i2c_smbus_write_i2c_block_data(chip->client, regaddr, - NBANK(chip), val); -} - -static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) -{ - int ret = 0; - - ret = chip->write_regs(chip, reg, val); + ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, + NBANK(chip), val); if (ret < 0) { dev_err(&chip->client->dev, "failed writing register\n"); return ret; @@ -238,36 +224,20 @@ static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) return 0; } -static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val) -{ - int ret; - - ret = i2c_smbus_read_byte_data(chip->client, reg); - *val = ret; - - return ret; -} - -static int pca953x_read_regs_mul(struct pca953x_chip *chip, int reg, u8 *val) +static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) { int bank_shift = pca953x_bank_shift(chip); int addr = (reg & PCAL_GPIO_MASK) << bank_shift; int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; u8 regaddr = pinctrl | addr; + int ret; /* Chips with 24 and more GPIOs always support Auto Increment */ if (NBANK(chip) > 2) regaddr |= REG_ADDR_AI; - return i2c_smbus_read_i2c_block_data(chip->client, regaddr, - NBANK(chip), val); -} - -static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) -{ - int ret; - - ret = chip->read_regs(chip, reg, val); + ret = i2c_smbus_read_i2c_block_data(chip->client, regaddr, + NBANK(chip), val); if (ret < 0) { dev_err(&chip->client->dev, "failed reading register\n"); return ret; @@ -872,14 +842,6 @@ static int pca953x_probe(struct i2c_client *client, */ pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); - if (chip->gpio_chip.ngpio <= 8) { - chip->write_regs = pca953x_write_regs_8; - chip->read_regs = pca953x_read_regs_8; - } else { - chip->write_regs = pca953x_write_regs_mul; - chip->read_regs = pca953x_read_regs_mul; - } - if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) ret = device_pca953x_init(chip, invert); else From 7a04aaa32cbc449588fecc77da637e0da771283f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:39:55 +0100 Subject: [PATCH 77/99] gpio: pca953x: Factor out common code from device_pca95xx_init() The PCA957x and PCA953x init functions are almost the same, except for the different register mapping and one extra write to BKEN register in case of PCA957x. Factor out the common code. Signed-off-by: Marek Vasut Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 35 ++++++++++++----------------------- 1 file changed, 12 insertions(+), 23 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 09fd8cde9ca9..dc691bd52a79 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -119,18 +119,21 @@ struct pca953x_reg_config { int direction; int output; int input; + int invert; }; static const struct pca953x_reg_config pca953x_regs = { .direction = PCA953X_DIRECTION, .output = PCA953X_OUTPUT, .input = PCA953X_INPUT, + .invert = PCA953X_INVERT, }; static const struct pca953x_reg_config pca957x_regs = { .direction = PCA957X_CFG, .output = PCA957X_OUT, .input = PCA957X_IN, + .invert = PCA957X_INVRT, }; struct pca953x_chip { @@ -679,13 +682,11 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, } #endif -static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) +static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) { int ret; u8 val[MAX_BANK]; - chip->regs = &pca953x_regs; - ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); if (ret) goto out; @@ -701,7 +702,7 @@ static int device_pca953x_init(struct pca953x_chip *chip, u32 invert) else memset(val, 0, NBANK(chip)); - ret = pca953x_write_regs(chip, PCA953X_INVERT, val); + ret = pca953x_write_regs(chip, chip->regs->invert, val); out: return ret; } @@ -711,22 +712,7 @@ static int device_pca957x_init(struct pca953x_chip *chip, u32 invert) int ret; u8 val[MAX_BANK]; - chip->regs = &pca957x_regs; - - ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); - if (ret) - goto out; - ret = pca953x_read_regs(chip, chip->regs->direction, - chip->reg_direction); - if (ret) - goto out; - - /* set platform specific polarity inversion */ - if (invert) - memset(val, 0xFF, NBANK(chip)); - else - memset(val, 0, NBANK(chip)); - ret = pca953x_write_regs(chip, PCA957X_INVRT, val); + ret = device_pca95xx_init(chip, invert); if (ret) goto out; @@ -842,10 +828,13 @@ static int pca953x_probe(struct i2c_client *client, */ pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK); - if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) - ret = device_pca953x_init(chip, invert); - else + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { + chip->regs = &pca953x_regs; + ret = device_pca95xx_init(chip, invert); + } else { + chip->regs = &pca957x_regs; ret = device_pca957x_init(chip, invert); + } if (ret) goto err_exit; From 25a1b7102f3f1181be1feaa0ed6ff82f1b526acd Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:39:56 +0100 Subject: [PATCH 78/99] gpio: pca953x: Zap ad-hoc I2C block write in multi GPIO set The ad-hoc i2c block write can be replaced by standard register accessor function, which correctly handles all the chip details and differences. Do so to simplify the code. Signed-off-by: Marek Vasut Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index dc691bd52a79..b3386819c550 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -364,8 +364,6 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { struct pca953x_chip *chip = gpiochip_get_data(gc); - int bank_shift = pca953x_bank_shift(chip); - u32 regaddr = chip->regs->output << bank_shift; unsigned int bank_mask, bank_val; int bank; u8 reg_val[MAX_BANK]; @@ -384,14 +382,7 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, } } - /* PCA9575 needs address-increment on multi-byte writes */ - if ((PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) && - (NBANK(chip) > 1)) { - regaddr |= REG_ADDR_AI; - } - - ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, - NBANK(chip), reg_val); + ret = pca953x_write_regs(chip, chip->regs->output, reg_val); if (ret) goto exit; From b32cecb46bdc8b3ea36c7a71aaca1853c0342cae Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:39:57 +0100 Subject: [PATCH 79/99] gpio: pca953x: Extract the register address mangling to single function Instead of having the I2C register calculation function spread across multiple accessor functions, pull it out into a single function which returns the adjusted register address. Signed-off-by: Marek Vasut Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 59 ++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 30 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index b3386819c550..7e66f46b41b2 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -164,17 +164,37 @@ static int pca953x_bank_shift(struct pca953x_chip *chip) return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); } +static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off, + bool write, bool addrinc) +{ + int bank_shift = pca953x_bank_shift(chip); + int addr = (reg & PCAL_GPIO_MASK) << bank_shift; + int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; + u8 regaddr = pinctrl | addr | (off / BANK_SZ); + + /* Single byte read doesn't need AI bit set. */ + if (!addrinc) + return regaddr; + + /* Chips with 24 and more GPIOs always support Auto Increment */ + if (write && NBANK(chip) > 2) + regaddr |= REG_ADDR_AI; + + /* PCA9575 needs address-increment on multi-byte writes */ + if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) + regaddr |= REG_ADDR_AI; + + return regaddr; +} + static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, int off) { + u8 regaddr = pca953x_recalc_addr(chip, reg, off, false, false); int ret; - int bank_shift = pca953x_bank_shift(chip); - int offset = off / BANK_SZ; - ret = i2c_smbus_read_byte_data(chip->client, - (reg << bank_shift) + offset); + ret = i2c_smbus_read_byte_data(chip->client, regaddr); *val = ret; - if (ret < 0) { dev_err(&chip->client->dev, "failed reading register\n"); return ret; @@ -186,13 +206,10 @@ static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, int off) { + u8 regaddr = pca953x_recalc_addr(chip, reg, off, true, false); int ret; - int bank_shift = pca953x_bank_shift(chip); - int offset = off / BANK_SZ; - - ret = i2c_smbus_write_byte_data(chip->client, - (reg << bank_shift) + offset, val); + ret = i2c_smbus_write_byte_data(chip->client, regaddr, val); if (ret < 0) { dev_err(&chip->client->dev, "failed writing register\n"); return ret; @@ -203,20 +220,9 @@ static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { - int bank_shift = pca953x_bank_shift(chip); - int addr = (reg & PCAL_GPIO_MASK) << bank_shift; - int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; - u8 regaddr = pinctrl | addr; + u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true); int ret; - /* Chips with 24 and more GPIOs always support Auto Increment */ - if (NBANK(chip) > 2) - regaddr |= REG_ADDR_AI; - - /* PCA9575 needs address-increment on multi-byte writes */ - if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) - regaddr |= REG_ADDR_AI; - ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, NBANK(chip), val); if (ret < 0) { @@ -229,16 +235,9 @@ static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) { - int bank_shift = pca953x_bank_shift(chip); - int addr = (reg & PCAL_GPIO_MASK) << bank_shift; - int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1; - u8 regaddr = pinctrl | addr; + u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true); int ret; - /* Chips with 24 and more GPIOs always support Auto Increment */ - if (NBANK(chip) > 2) - regaddr |= REG_ADDR_AI; - ret = i2c_smbus_read_i2c_block_data(chip->client, regaddr, NBANK(chip), val); if (ret < 0) { From 49427232764d62e5933b2c23cc841739abc9804c Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:39:58 +0100 Subject: [PATCH 80/99] gpio: pca953x: Perform basic regmap conversion Convert the driver to use regmap to access the chips. Due to the convoluted register mapping scheme, implement read/write/volatile check functions that untangle the mess and perform check accordingly. This patch does not zap the internal register cache of the PCA953x driver, nor does it push the regmap access down into the gpiochip accessors to simplify the review. All that is in subsequent patches. Signed-off-by: Marek Vasut Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 159 ++++++++++++++++++++++++++++++++++-- 1 file changed, 151 insertions(+), 8 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 7e66f46b41b2..389fa891f342 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -30,6 +31,8 @@ #define PCA953X_INVERT 0x02 #define PCA953X_DIRECTION 0x03 +#define REG_ADDR_MASK 0x3f +#define REG_ADDR_EXT 0x40 #define REG_ADDR_AI 0x80 #define PCA957X_IN 0x00 @@ -141,6 +144,7 @@ struct pca953x_chip { u8 reg_output[MAX_BANK]; u8 reg_direction[MAX_BANK]; struct mutex i2c_lock; + struct regmap *regmap; #ifdef CONFIG_GPIO_PCA953X_IRQ struct mutex irq_lock; @@ -164,6 +168,141 @@ static int pca953x_bank_shift(struct pca953x_chip *chip) return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ); } +#define PCA953x_BANK_INPUT BIT(0) +#define PCA953x_BANK_OUTPUT BIT(1) +#define PCA953x_BANK_POLARITY BIT(2) +#define PCA953x_BANK_CONFIG BIT(3) + +#define PCA957x_BANK_INPUT BIT(0) +#define PCA957x_BANK_POLARITY BIT(1) +#define PCA957x_BANK_BUSHOLD BIT(2) +#define PCA957x_BANK_CONFIG BIT(4) +#define PCA957x_BANK_OUTPUT BIT(5) + +#define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2) +#define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5) +#define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6) + +/* + * We care about the following registers: + * - Standard set, below 0x40, each port can be replicated up to 8 times + * - PCA953x standard + * Input port 0x00 + 0 * bank_size R + * Output port 0x00 + 1 * bank_size RW + * Polarity Inversion port 0x00 + 2 * bank_size RW + * Configuration port 0x00 + 3 * bank_size RW + * - PCA957x with mixed up registers + * Input port 0x00 + 0 * bank_size R + * Polarity Inversion port 0x00 + 1 * bank_size RW + * Bus hold port 0x00 + 2 * bank_size RW + * Configuration port 0x00 + 4 * bank_size RW + * Output port 0x00 + 5 * bank_size RW + * + * - Extended set, above 0x40, often chip specific. + * - PCAL6524/PCAL9555A with custom PCAL IRQ handling: + * Input latch register 0x40 + 2 * bank_size RW + * Interrupt mask register 0x40 + 5 * bank_size RW + * Interrupt status register 0x40 + 6 * bank_size R + * + * - Registers with bit 0x80 set, the AI bit + * The bit is cleared and the registers fall into one of the + * categories above. + */ + +static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg, + u32 checkbank) +{ + int bank_shift = pca953x_bank_shift(chip); + int bank = (reg & REG_ADDR_MASK) >> bank_shift; + int offset = reg & (BIT(bank_shift) - 1); + + /* Special PCAL extended register check. */ + if (reg & REG_ADDR_EXT) { + if (!(chip->driver_data & PCA_PCAL)) + return false; + bank += 8; + } + + /* Register is not in the matching bank. */ + if (!(BIT(bank) & checkbank)) + return false; + + /* Register is not within allowed range of bank. */ + if (offset >= NBANK(chip)) + return false; + + return true; +} + +static bool pca953x_readable_register(struct device *dev, unsigned int reg) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + u32 bank; + + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { + bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT | + PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG; + } else { + bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT | + PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG | + PCA957x_BANK_BUSHOLD; + } + + if (chip->driver_data & PCA_PCAL) { + bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_IRQ_MASK | + PCAL9xxx_BANK_IRQ_STAT; + } + + return pca953x_check_register(chip, reg, bank); +} + +static bool pca953x_writeable_register(struct device *dev, unsigned int reg) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + u32 bank; + + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) { + bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY | + PCA953x_BANK_CONFIG; + } else { + bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY | + PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD; + } + + if (chip->driver_data & PCA_PCAL) + bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_IRQ_MASK; + + return pca953x_check_register(chip, reg, bank); +} + +static bool pca953x_volatile_register(struct device *dev, unsigned int reg) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + u32 bank; + + if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) + bank = PCA953x_BANK_INPUT; + else + bank = PCA957x_BANK_INPUT; + + if (chip->driver_data & PCA_PCAL) + bank |= PCAL9xxx_BANK_IRQ_STAT; + + return pca953x_check_register(chip, reg, bank); +} + +const struct regmap_config pca953x_i2c_regmap = { + .reg_bits = 8, + .val_bits = 8, + + .readable_reg = pca953x_readable_register, + .writeable_reg = pca953x_writeable_register, + .volatile_reg = pca953x_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .max_register = 0x7f, +}; + static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off, bool write, bool addrinc) { @@ -193,8 +332,7 @@ static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, u8 regaddr = pca953x_recalc_addr(chip, reg, off, false, false); int ret; - ret = i2c_smbus_read_byte_data(chip->client, regaddr); - *val = ret; + ret = regmap_read(chip->regmap, regaddr, val); if (ret < 0) { dev_err(&chip->client->dev, "failed reading register\n"); return ret; @@ -209,7 +347,7 @@ static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, u8 regaddr = pca953x_recalc_addr(chip, reg, off, true, false); int ret; - ret = i2c_smbus_write_byte_data(chip->client, regaddr, val); + ret = regmap_write(chip->regmap, regaddr, val); if (ret < 0) { dev_err(&chip->client->dev, "failed writing register\n"); return ret; @@ -223,8 +361,7 @@ static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true); int ret; - ret = i2c_smbus_write_i2c_block_data(chip->client, regaddr, - NBANK(chip), val); + ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip)); if (ret < 0) { dev_err(&chip->client->dev, "failed writing register\n"); return ret; @@ -238,8 +375,7 @@ static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true); int ret; - ret = i2c_smbus_read_i2c_block_data(chip->client, regaddr, - NBANK(chip), val); + ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip)); if (ret < 0) { dev_err(&chip->client->dev, "failed reading register\n"); return ret; @@ -793,6 +929,14 @@ static int pca953x_probe(struct i2c_client *client, } } + i2c_set_clientdata(client, chip); + + chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap); + if (IS_ERR(chip->regmap)) { + ret = PTR_ERR(chip->regmap); + goto err_exit; + } + mutex_init(&chip->i2c_lock); /* * In case we have an i2c-mux controlled by a GPIO provided by an @@ -843,7 +987,6 @@ static int pca953x_probe(struct i2c_client *client, dev_warn(&client->dev, "setup failed, %d\n", ret); } - i2c_set_clientdata(client, chip); return 0; err_exit: From 0f25fda840a9420172dfa6a3f333066017b78a04 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:39:59 +0100 Subject: [PATCH 81/99] gpio: pca953x: Zap ad-hoc reg_direction cache Replace the ad-hoc reg_direction direction register caching with generic regcache cache. This reduces code duplication. Signed-off-by: Marek Vasut Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 55 +++++++++++++++++++++---------------- 1 file changed, 31 insertions(+), 24 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 389fa891f342..3e4733075187 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -142,7 +142,6 @@ static const struct pca953x_reg_config pca957x_regs = { struct pca953x_chip { unsigned gpio_start; u8 reg_output[MAX_BANK]; - u8 reg_direction[MAX_BANK]; struct mutex i2c_lock; struct regmap *regmap; @@ -387,18 +386,13 @@ static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val) static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); - u8 reg_val; + u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off, + true, false); + u8 bit = BIT(off % BANK_SZ); int ret; mutex_lock(&chip->i2c_lock); - reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); - - ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off); - if (ret) - goto exit; - - chip->reg_direction[off / BANK_SZ] = reg_val; -exit: + ret = regmap_write_bits(chip->regmap, dirreg, bit, bit); mutex_unlock(&chip->i2c_lock); return ret; } @@ -407,6 +401,9 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, unsigned off, int val) { struct pca953x_chip *chip = gpiochip_get_data(gc); + u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off, + true, false); + u8 bit = BIT(off % BANK_SZ); u8 reg_val; int ret; @@ -426,12 +423,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, chip->reg_output[off / BANK_SZ] = reg_val; /* then direction */ - reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); - ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off); - if (ret) - goto exit; - - chip->reg_direction[off / BANK_SZ] = reg_val; + ret = regmap_write_bits(chip->regmap, dirreg, bit, 0); exit: mutex_unlock(&chip->i2c_lock); return ret; @@ -483,16 +475,19 @@ exit: static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); + u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off, + true, false); + u8 bit = BIT(off % BANK_SZ); u32 reg_val; int ret; mutex_lock(&chip->i2c_lock); - ret = pca953x_read_single(chip, chip->regs->direction, ®_val, off); + ret = regmap_read(chip->regmap, dirreg, ®_val); mutex_unlock(&chip->i2c_lock); if (ret < 0) return ret; - return !!(reg_val & (1u << (off % BANK_SZ))); + return !!(reg_val & bit); } static void pca953x_gpio_set_multiple(struct gpio_chip *gc, @@ -580,6 +575,10 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) u8 new_irqs; int level, i; u8 invert_irq_mask[MAX_BANK]; + int reg_direction[MAX_BANK]; + + regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction, + NBANK(chip)); if (chip->driver_data & PCA_PCAL) { /* Enable latch on interrupt-enabled inputs */ @@ -595,7 +594,7 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) /* Look for any newly setup interrupt */ for (i = 0; i < NBANK(chip); i++) { new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i]; - new_irqs &= ~chip->reg_direction[i]; + new_irqs &= reg_direction[i]; while (new_irqs) { level = __ffs(new_irqs); @@ -660,6 +659,7 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) bool pending_seen = false; bool trigger_seen = false; u8 trigger[MAX_BANK]; + int reg_direction[MAX_BANK]; int ret, i; if (chip->driver_data & PCA_PCAL) { @@ -690,8 +690,10 @@ static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending) return false; /* Remove output pins from the equation */ + regmap_bulk_read(chip->regmap, chip->regs->direction, reg_direction, + NBANK(chip)); for (i = 0; i < NBANK(chip); i++) - cur_stat[i] &= chip->reg_direction[i]; + cur_stat[i] &= reg_direction[i]; memcpy(old_stat, chip->irq_stat, NBANK(chip)); @@ -745,6 +747,7 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) { struct i2c_client *client = chip->client; + int reg_direction[MAX_BANK]; int ret, i; if (client->irq && irq_base != -1 @@ -759,8 +762,10 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, * interrupt. We have to rely on the previous read for * this purpose. */ + regmap_bulk_read(chip->regmap, chip->regs->direction, + reg_direction, NBANK(chip)); for (i = 0; i < NBANK(chip); i++) - chip->irq_stat[i] &= chip->reg_direction[i]; + chip->irq_stat[i] &= reg_direction[i]; mutex_init(&chip->irq_lock); ret = devm_request_threaded_irq(&client->dev, @@ -817,9 +822,9 @@ static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) if (ret) goto out; - ret = pca953x_read_regs(chip, chip->regs->direction, - chip->reg_direction); - if (ret) + ret = regcache_sync_region(chip->regmap, chip->regs->direction, + chip->regs->direction + NBANK(chip)); + if (ret != 0) goto out; /* set platform specific polarity inversion */ @@ -937,6 +942,8 @@ static int pca953x_probe(struct i2c_client *client, goto err_exit; } + regcache_mark_dirty(chip->regmap); + mutex_init(&chip->i2c_lock); /* * In case we have an i2c-mux controlled by a GPIO provided by an From ec82d1eba346190171f9fa0f24e2e6eff5e5304c Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:40:00 +0100 Subject: [PATCH 82/99] gpio: pca953x: Zap ad-hoc reg_output cache Replace the ad-hoc reg_output output register caching with generic regcache cache. Drop pca953x_write_single() which is no longer used. This reduces code duplication. Signed-off-by: Marek Vasut Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 65 +++++++++---------------------------- 1 file changed, 15 insertions(+), 50 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 3e4733075187..ede20b3f2f20 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -141,7 +141,6 @@ static const struct pca953x_reg_config pca957x_regs = { struct pca953x_chip { unsigned gpio_start; - u8 reg_output[MAX_BANK]; struct mutex i2c_lock; struct regmap *regmap; @@ -340,21 +339,6 @@ static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, return 0; } -static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val, - int off) -{ - u8 regaddr = pca953x_recalc_addr(chip, reg, off, true, false); - int ret; - - ret = regmap_write(chip->regmap, regaddr, val); - if (ret < 0) { - dev_err(&chip->client->dev, "failed writing register\n"); - return ret; - } - - return 0; -} - static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true); @@ -403,25 +387,17 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, struct pca953x_chip *chip = gpiochip_get_data(gc); u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off, true, false); + u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off, + true, false); u8 bit = BIT(off % BANK_SZ); - u8 reg_val; int ret; mutex_lock(&chip->i2c_lock); /* set output level */ - if (val) - reg_val = chip->reg_output[off / BANK_SZ] - | (1u << (off % BANK_SZ)); - else - reg_val = chip->reg_output[off / BANK_SZ] - & ~(1u << (off % BANK_SZ)); - - ret = pca953x_write_single(chip, chip->regs->output, reg_val, off); + ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); if (ret) goto exit; - chip->reg_output[off / BANK_SZ] = reg_val; - /* then direction */ ret = regmap_write_bits(chip->regmap, dirreg, bit, 0); exit: @@ -452,23 +428,12 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) { struct pca953x_chip *chip = gpiochip_get_data(gc); - u8 reg_val; - int ret; + u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off, + true, false); + u8 bit = BIT(off % BANK_SZ); mutex_lock(&chip->i2c_lock); - if (val) - reg_val = chip->reg_output[off / BANK_SZ] - | (1u << (off % BANK_SZ)); - else - reg_val = chip->reg_output[off / BANK_SZ] - & ~(1u << (off % BANK_SZ)); - - ret = pca953x_write_single(chip, chip->regs->output, reg_val, off); - if (ret) - goto exit; - - chip->reg_output[off / BANK_SZ] = reg_val; -exit: + regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0); mutex_unlock(&chip->i2c_lock); } @@ -500,7 +465,10 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, int ret; mutex_lock(&chip->i2c_lock); - memcpy(reg_val, chip->reg_output, NBANK(chip)); + ret = pca953x_read_regs(chip, chip->regs->output, reg_val); + if (ret) + goto exit; + for (bank = 0; bank < NBANK(chip); bank++) { bank_mask = mask[bank / sizeof(*mask)] >> ((bank % sizeof(*mask)) * 8); @@ -512,11 +480,7 @@ static void pca953x_gpio_set_multiple(struct gpio_chip *gc, } } - ret = pca953x_write_regs(chip, chip->regs->output, reg_val); - if (ret) - goto exit; - - memcpy(chip->reg_output, reg_val, NBANK(chip)); + pca953x_write_regs(chip, chip->regs->output, reg_val); exit: mutex_unlock(&chip->i2c_lock); } @@ -818,8 +782,9 @@ static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert) int ret; u8 val[MAX_BANK]; - ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output); - if (ret) + ret = regcache_sync_region(chip->regmap, chip->regs->output, + chip->regs->output + NBANK(chip)); + if (ret != 0) goto out; ret = regcache_sync_region(chip->regmap, chip->regs->direction, From 87813cf30a89012d77012347284ad7dd71c7b0b9 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:40:01 +0100 Subject: [PATCH 83/99] gpio: pca953x: Zap single use of pca953x_read_single() Drop pca953x_write_single() which is used in one place. Signed-off-by: Marek Vasut Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index ede20b3f2f20..48a16a3e8ce9 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -324,21 +324,6 @@ static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off, return regaddr; } -static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val, - int off) -{ - u8 regaddr = pca953x_recalc_addr(chip, reg, off, false, false); - int ret; - - ret = regmap_read(chip->regmap, regaddr, val); - if (ret < 0) { - dev_err(&chip->client->dev, "failed reading register\n"); - return ret; - } - - return 0; -} - static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val) { u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true); @@ -408,11 +393,14 @@ exit: static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) { struct pca953x_chip *chip = gpiochip_get_data(gc); + u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off, + true, false); + u8 bit = BIT(off % BANK_SZ); u32 reg_val; int ret; mutex_lock(&chip->i2c_lock); - ret = pca953x_read_single(chip, chip->regs->input, ®_val, off); + ret = regmap_read(chip->regmap, inreg, ®_val); mutex_unlock(&chip->i2c_lock); if (ret < 0) { /* NOTE: diagnostic already emitted; that's all we should @@ -422,7 +410,7 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) return 0; } - return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0; + return !!(reg_val & bit); } static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) From b76574300504e56e2878ade185d5f47893512d25 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 12 Dec 2018 02:40:02 +0100 Subject: [PATCH 84/99] gpio: pca953x: Restore registers after suspend/resume cycle It is possible that the PCA953x is powered down during suspend. Use regmap cache to assure the registers in the PCA953x are in line with the driver state after resume. Signed-off-by: Marek Vasut Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/gpio-pca953x.c | 88 +++++++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c index 48a16a3e8ce9..905dc1916883 100644 --- a/drivers/gpio/gpio-pca953x.c +++ b/drivers/gpio/gpio-pca953x.c @@ -975,6 +975,91 @@ static int pca953x_remove(struct i2c_client *client) return ret; } +#ifdef CONFIG_PM_SLEEP +static int pca953x_regcache_sync(struct device *dev) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + int ret; + + /* + * The ordering between direction and output is important, + * sync these registers first and only then sync the rest. + */ + ret = regcache_sync_region(chip->regmap, chip->regs->direction, + chip->regs->direction + NBANK(chip)); + if (ret != 0) { + dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret); + return ret; + } + + ret = regcache_sync_region(chip->regmap, chip->regs->output, + chip->regs->output + NBANK(chip)); + if (ret != 0) { + dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret); + return ret; + } + +#ifdef CONFIG_GPIO_PCA953X_IRQ + if (chip->driver_data & PCA_PCAL) { + ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH, + PCAL953X_IN_LATCH + NBANK(chip)); + if (ret != 0) { + dev_err(dev, "Failed to sync INT latch registers: %d\n", + ret); + return ret; + } + + ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK, + PCAL953X_INT_MASK + NBANK(chip)); + if (ret != 0) { + dev_err(dev, "Failed to sync INT mask registers: %d\n", + ret); + return ret; + } + } +#endif + + return 0; +} + +static int pca953x_suspend(struct device *dev) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + + regcache_cache_only(chip->regmap, true); + + regulator_disable(chip->regulator); + + return 0; +} + +static int pca953x_resume(struct device *dev) +{ + struct pca953x_chip *chip = dev_get_drvdata(dev); + int ret; + + ret = regulator_enable(chip->regulator); + if (ret != 0) { + dev_err(dev, "Failed to enable regulator: %d\n", ret); + return 0; + } + + regcache_cache_only(chip->regmap, false); + regcache_mark_dirty(chip->regmap); + ret = pca953x_regcache_sync(dev); + if (ret) + return ret; + + ret = regcache_sync(chip->regmap); + if (ret != 0) { + dev_err(dev, "Failed to restore register map: %d\n", ret); + return ret; + } + + return 0; +} +#endif + /* convenience to stop overlong match-table lines */ #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int) #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int) @@ -1018,9 +1103,12 @@ static const struct of_device_id pca953x_dt_ids[] = { MODULE_DEVICE_TABLE(of, pca953x_dt_ids); +static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume); + static struct i2c_driver pca953x_driver = { .driver = { .name = "pca953x", + .pm = &pca953x_pm_ops, .of_match_table = pca953x_dt_ids, .acpi_match_table = ACPI_PTR(pca953x_acpi_ids), }, From c5510b8dafce5f3f5a039c9b262ebcae0092c462 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 6 Dec 2018 10:45:49 +0100 Subject: [PATCH 85/99] gpiolib: Fix return value of gpio_to_desc() stub if !GPIOLIB If CONFIG_GPOILIB is not set, the stub of gpio_to_desc() should return the same type of error as regular version: NULL. All the callers compare the return value of gpio_to_desc() against NULL, so returned ERR_PTR would be treated as non-error case leading to dereferencing of error value. Fixes: 79a9becda894 ("gpiolib: export descriptor-based GPIO interface") Signed-off-by: Krzysztof Kozlowski Signed-off-by: Linus Walleij --- include/linux/gpio/consumer.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h index ed070512b40e..3b01fbcafc94 100644 --- a/include/linux/gpio/consumer.h +++ b/include/linux/gpio/consumer.h @@ -505,7 +505,7 @@ static inline int gpiod_set_consumer_name(struct gpio_desc *desc, static inline struct gpio_desc *gpio_to_desc(unsigned gpio) { - return ERR_PTR(-EINVAL); + return NULL; } static inline int desc_to_gpio(const struct gpio_desc *desc) From 85af74c474b21940e88483fd48f6094145c89d97 Mon Sep 17 00:00:00 2001 From: Nicolas Saenz Julienne Date: Mon, 10 Dec 2018 17:50:05 +0100 Subject: [PATCH 86/99] gpio: raspberrypi-exp: decrease refcount on firmware dt node We're getting a reference RPi's firmware node in order to be able to communicate with it's driver. We should decrease the reference count on the dt node after being done with it. Fixes: a98d90e7d588 ("gpio: raspberrypi-exp: Driver for RPi3 GPIO expander via mailbox service") Signed-off-by: Nicolas Saenz Julienne Signed-off-by: Linus Walleij --- drivers/gpio/gpio-raspberrypi-exp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-raspberrypi-exp.c b/drivers/gpio/gpio-raspberrypi-exp.c index d6d36d537e37..b77ea16ffa03 100644 --- a/drivers/gpio/gpio-raspberrypi-exp.c +++ b/drivers/gpio/gpio-raspberrypi-exp.c @@ -206,6 +206,7 @@ static int rpi_exp_gpio_probe(struct platform_device *pdev) } fw = rpi_firmware_get(fw_node); + of_node_put(fw_node); if (!fw) return -EPROBE_DEFER; From 4bc16f9dd71a7a8590114e7d7e8812a0214d2994 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 16 Dec 2018 18:38:58 +0100 Subject: [PATCH 87/99] gpio: pca953x: Add regmap dependency for PCA953x driver Select REGMAP_I2C in Kconfig, since the driver now depends on regmap and this was missing, thus breaking build on various systems. Signed-off-by: Marek Vasut Cc: Linus Walleij Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- drivers/gpio/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index a1876c39a7b7..06e7f9d5b84a 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -850,6 +850,7 @@ config GPIO_MC9S08DZ60 config GPIO_PCA953X tristate "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports" + select REGMAP_I2C help Say yes here to provide access to several register-oriented SMBus I/O expanders, made mostly by NXP or TI. Compatible From d6543c0f3964f20cd6f585d4794d07b7b31207c0 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sat, 15 Dec 2018 12:50:59 +0100 Subject: [PATCH 88/99] ARM: omap1: Fix new user of gpiochip_request_own_desc() This fixes up a new user of gpiochip_request_own_desc() in the AMS Delta board that appeared after the patch that was applied recently. Fixes: 21abf103818a ("gpio: Pass a flag to gpiochip_request_own_desc()") Reviewed-by: Janusz Krzysztofik Acked-by: Tony Lindgren Signed-off-by: Linus Walleij --- arch/arm/mach-omap1/board-ams-delta.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index 6719e139eb62..b53ff6399d31 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -603,7 +603,7 @@ static void __init modem_assign_irq(struct gpio_chip *chip) struct gpio_desc *gpiod; gpiod = gpiochip_request_own_desc(chip, AMS_DELTA_GPIO_PIN_MODEM_IRQ, - "modem_irq"); + "modem_irq", 0); if (IS_ERR(gpiod)) { pr_err("%s: modem IRQ GPIO request failed (%ld)\n", __func__, PTR_ERR(gpiod)); From a0752e9c3097b2c4fccd618802938e0951038dfa Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 17 Dec 2018 14:11:08 +0100 Subject: [PATCH 89/99] memory: omap-gpmc: Get the header of the enum Commit 21abf103818a ("gpio: Pass a flag to gpiochip_request_own_desc()") started to pass an enum gpiod_flags but this file is not including the header file that defines that enum and the compiler spits: drivers/memory/omap-gpmc.c: In function 'gpmc_probe_generic_child': drivers/memory/omap-gpmc.c:2174:9: error: type of formal parameter 4 is incomplete 0); ^ Cc: Ladislav Michl Cc: Janusz Krzysztofik Reported-by: Stephen Rothwell Fixes: 21abf103818a ("gpio: Pass a flag to gpiochip_request_own_desc()") Acked-by: Tony Lindgren Signed-off-by: Linus Walleij --- drivers/memory/omap-gpmc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/memory/omap-gpmc.c b/drivers/memory/omap-gpmc.c index b9b4f7058b05..e1d91e64e008 100644 --- a/drivers/memory/omap-gpmc.c +++ b/drivers/memory/omap-gpmc.c @@ -21,6 +21,7 @@ #include #include #include +#include /* GPIO descriptor enum */ #include #include #include From 12d6dd06989171ba9486790116832a65c5316fb1 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Thu, 13 Dec 2018 20:18:14 +0000 Subject: [PATCH 90/99] dt-bindings: gpio: rcar: Add r8a774c0 (RZ/G2E) support Document Renesas' RZ/G2E (R8A774C0) GPIO blocks compatibility within the relevant dt-bindings. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven Reviewed-by: Simon Horman Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt index 2889bbcd7416..f3f2c468c1b6 100644 --- a/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt +++ b/Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt @@ -8,6 +8,7 @@ Required Properties: - "renesas,gpio-r8a7745": for R8A7745 (RZ/G1E) compatible GPIO controller. - "renesas,gpio-r8a77470": for R8A77470 (RZ/G1C) compatible GPIO controller. - "renesas,gpio-r8a774a1": for R8A774A1 (RZ/G2M) compatible GPIO controller. + - "renesas,gpio-r8a774c0": for R8A774C0 (RZ/G2E) compatible GPIO controller. - "renesas,gpio-r8a7778": for R8A7778 (R-Car M1) compatible GPIO controller. - "renesas,gpio-r8a7779": for R8A7779 (R-Car H1) compatible GPIO controller. - "renesas,gpio-r8a7790": for R8A7790 (R-Car H2) compatible GPIO controller. From 89a5e15bcba87df5120d4656e0ff33d4f7cd6152 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Mon, 17 Dec 2018 22:36:25 +0100 Subject: [PATCH 91/99] gpio/mmc/of: Respect polarity in the device tree The device tree bindings for the MMC card detect and write protect lines specify that these should be active low unless "cd-inverted" or "wp-inverted" has been specified. However that is not how the kernel code has worked. It has always respected the flags passed to the phandle in the device tree, but respected the "cd-inverted" and "wp-inverted" flags such that if those are set, the polarity will be the inverse of that specified in the device tree. Switch to behaving like the old code did and fix the regression. Fixes: 81c85ec15a19 ("gpio: OF: Parse MMC-specific CD and WP properties") Cc: Bartosz Golaszewski Cc: Guenter Roeck Reported-by: Guenter Roeck Signed-off-by: Linus Walleij --- drivers/gpio/gpiolib-of.c | 49 +++++++++++++-------------------------- 1 file changed, 16 insertions(+), 33 deletions(-) diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c index fa8044228f0e..a6e1891217e2 100644 --- a/drivers/gpio/gpiolib-of.c +++ b/drivers/gpio/gpiolib-of.c @@ -54,6 +54,7 @@ static struct gpio_desc *of_xlate_and_get_gpiod_flags(struct gpio_chip *chip, } static void of_gpio_flags_quirks(struct device_node *np, + const char *propname, enum of_gpio_flags *flags, int index) { @@ -61,39 +62,21 @@ static void of_gpio_flags_quirks(struct device_node *np, * Handle MMC "cd-inverted" and "wp-inverted" semantics. */ if (IS_ENABLED(CONFIG_MMC)) { - if (of_property_read_bool(np, "cd-gpios")) { - if (of_property_read_bool(np, "cd-inverted")) { - if (*flags & OF_GPIO_ACTIVE_LOW) { - /* "cd-inverted" takes precedence */ - *flags &= ~OF_GPIO_ACTIVE_LOW; - pr_warn("%s GPIO handle specifies CD active low - ignored\n", - of_node_full_name(np)); - } - } else { - /* - * Active low is the default according to the - * SDHCI specification. If the GPIO handle - * specifies the same thing - good. - */ - *flags |= OF_GPIO_ACTIVE_LOW; - } + /* + * Active low is the default according to the + * SDHCI specification and the device tree + * bindings. However the code in the current + * kernel was written such that the phandle + * flags were always respected, and "cd-inverted" + * would invert the flag from the device phandle. + */ + if (!strcmp(propname, "cd-gpios")) { + if (of_property_read_bool(np, "cd-inverted")) + *flags ^= OF_GPIO_ACTIVE_LOW; } - if (of_property_read_bool(np, "wp-gpios")) { - if (of_property_read_bool(np, "wp-inverted")) { - /* "wp-inverted" takes precedence */ - if (*flags & OF_GPIO_ACTIVE_LOW) { - *flags &= ~OF_GPIO_ACTIVE_LOW; - pr_warn("%s GPIO handle specifies WP active low - ignored\n", - of_node_full_name(np)); - } - } else { - /* - * Active low is the default according to the - * SDHCI specification. If the GPIO handle - * specifies the same thing - good. - */ - *flags |= OF_GPIO_ACTIVE_LOW; - } + if (!strcmp(propname, "wp-gpios")) { + if (of_property_read_bool(np, "wp-inverted")) + *flags ^= OF_GPIO_ACTIVE_LOW; } } /* @@ -213,7 +196,7 @@ struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np, goto out; if (flags) - of_gpio_flags_quirks(np, flags, index); + of_gpio_flags_quirks(np, propname, flags, index); pr_debug("%s: parsed '%s' property of node '%pOF[%d]' - status (%d)\n", __func__, propname, np, index, From 6bd925a8b779b262b007d638171c80398cfbc217 Mon Sep 17 00:00:00 2001 From: "Andrei.Stefanescu@microchip.com" Date: Wed, 12 Dec 2018 11:57:11 +0000 Subject: [PATCH 92/99] dt-bindings: arm: atmel: describe SECUMOD usage as a GPIO controller This patch describes the Security Module's usage as a GPIO controller for its PIOBU pins. These pins have the special property of maintaining their voltage during suspend-to-mem. Signed-off-by: Andrei Stefanescu Reviewed-by: Rob Herring Signed-off-by: Linus Walleij --- .../devicetree/bindings/arm/atmel-sysregs.txt | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index 4b96608ad692..14f319f694b7 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -158,14 +158,24 @@ Security Module (SECUMOD) The Security Module macrocell provides all necessary secure functions to avoid voltage, temperature, frequency and mechanical attacks on the chip. It also -embeds secure memories that can be scrambled +embeds secure memories that can be scrambled. + +The Security Module also offers the PIOBU pins which can be used as GPIO pins. +Note that they maintain their voltage during Backup/Self-refresh. required properties: - compatible: Should be "atmel,-secumod", "syscon". can be "sama5d2". - reg: Should contain registers location and length +- gpio-controller: Marks the port as GPIO controller. +- #gpio-cells: There are 2. The pin number is the + first, the second represents additional + parameters such as GPIO_ACTIVE_HIGH/LOW. + secumod@fc040000 { compatible = "atmel,sama5d2-secumod", "syscon"; reg = <0xfc040000 0x100>; + gpio-controller; + #gpio-cells = <2>; }; From fb0b35d307b7109d245f45be780d15fb368f94c5 Mon Sep 17 00:00:00 2001 From: "Andrei.Stefanescu@microchip.com" Date: Wed, 12 Dec 2018 11:57:15 +0000 Subject: [PATCH 93/99] gpio: add driver for SAMA5D2 PIOBU pins PIOBU pins do not lose their voltage during Backup/Self-refresh. This patch adds a simple GPIO controller for them and a maintainer for the driver. This driver adds support for using the pins as GPIO offering the possibility to read/set the voltage. Signed-off-by: Andrei Stefanescu Signed-off-by: Linus Walleij --- MAINTAINERS | 6 + drivers/gpio/Kconfig | 11 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-sama5d2-piobu.c | 253 ++++++++++++++++++++++++++++++ 4 files changed, 271 insertions(+) create mode 100644 drivers/gpio/gpio-sama5d2-piobu.c diff --git a/MAINTAINERS b/MAINTAINERS index 65828b79ae49..79979ca0edd4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -9768,6 +9768,12 @@ M: Nicolas Ferre S: Supported F: drivers/power/reset/at91-sama5d2_shdwc.c +MICROCHIP SAMA5D2-COMPATIBLE PIOBU GPIO +M: Andrei Stefanescu +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +L: linux-gpio@vger.kernel.org +F: drivers/gpio/gpio-sama5d2-piobu.c + MICROCHIP SPI DRIVER M: Nicolas Ferre S: Supported diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 06e7f9d5b84a..f47994708809 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -430,6 +430,17 @@ config GPIO_REG A 32-bit single register GPIO fixed in/out implementation. This can be used to represent any register as a set of GPIO signals. +config GPIO_SAMA5D2_PIOBU + tristate "SAMA5D2 PIOBU GPIO support" + depends on MFD_SYSCON + select GPIO_SYSCON + help + Say yes here to use the PIOBU pins as GPIOs. + + PIOBU pins on the SAMA5D2 can be used as GPIOs. + The difference from regular GPIOs is that they + maintain their value during backup/self-refresh. + config GPIO_SIOX tristate "SIOX GPIO support" depends on SIOX diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 671c4477c951..f18d34590722 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -108,6 +108,7 @@ obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o obj-$(CONFIG_GPIO_REG) += gpio-reg.o obj-$(CONFIG_ARCH_SA1100) += gpio-sa1100.o +obj-$(CONFIG_GPIO_SAMA5D2_PIOBU) += gpio-sama5d2-piobu.o obj-$(CONFIG_GPIO_SCH) += gpio-sch.o obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o obj-$(CONFIG_GPIO_SNPS_CREG) += gpio-creg-snps.o diff --git a/drivers/gpio/gpio-sama5d2-piobu.c b/drivers/gpio/gpio-sama5d2-piobu.c new file mode 100644 index 000000000000..03a000659fa1 --- /dev/null +++ b/drivers/gpio/gpio-sama5d2-piobu.c @@ -0,0 +1,253 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SAMA5D2 PIOBU GPIO controller + * + * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries + * + * Author: Andrei Stefanescu + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PIOBU_NUM 8 +#define PIOBU_REG_SIZE 4 + +/* + * backup mode protection register for tamper detection + * normal mode protection register for tamper detection + * wakeup signal generation + */ +#define PIOBU_BMPR 0x7C +#define PIOBU_NMPR 0x80 +#define PIOBU_WKPR 0x90 + +#define PIOBU_BASE 0x18 /* PIOBU offset from SECUMOD base register address. */ + +#define PIOBU_DET_OFFSET 16 + +/* In the datasheet this bit is called OUTPUT */ +#define PIOBU_DIRECTION BIT(8) +#define PIOBU_OUT BIT(8) +#define PIOBU_IN 0 + +#define PIOBU_SOD BIT(9) +#define PIOBU_PDS BIT(10) + +#define PIOBU_HIGH BIT(9) +#define PIOBU_LOW 0 + +struct sama5d2_piobu { + struct gpio_chip chip; + struct regmap *regmap; +}; + +/** + * sama5d2_piobu_setup_pin() - prepares a pin for set_direction call + * + * Do not consider pin for tamper detection (normal and backup modes) + * Do not consider pin as tamper wakeup interrupt source + */ +static int sama5d2_piobu_setup_pin(struct gpio_chip *chip, unsigned int pin) +{ + int ret; + struct sama5d2_piobu *piobu = container_of(chip, struct sama5d2_piobu, + chip); + unsigned int mask = BIT(PIOBU_DET_OFFSET + pin); + + ret = regmap_update_bits(piobu->regmap, PIOBU_BMPR, mask, 0); + if (ret) + return ret; + + ret = regmap_update_bits(piobu->regmap, PIOBU_NMPR, mask, 0); + if (ret) + return ret; + + return regmap_update_bits(piobu->regmap, PIOBU_WKPR, mask, 0); +} + +/** + * sama5d2_piobu_write_value() - writes value & mask at the pin's PIOBU register + */ +static int sama5d2_piobu_write_value(struct gpio_chip *chip, unsigned int pin, + unsigned int mask, unsigned int value) +{ + int reg; + struct sama5d2_piobu *piobu = container_of(chip, struct sama5d2_piobu, + chip); + + reg = PIOBU_BASE + pin * PIOBU_REG_SIZE; + + return regmap_update_bits(piobu->regmap, reg, mask, value); +} + +/** + * sama5d2_piobu_read_value() - read the value with masking from the pin's PIOBU + * register + */ +static int sama5d2_piobu_read_value(struct gpio_chip *chip, unsigned int pin, + unsigned int mask) +{ + struct sama5d2_piobu *piobu = container_of(chip, struct sama5d2_piobu, + chip); + unsigned int val, reg; + int ret; + + reg = PIOBU_BASE + pin * PIOBU_REG_SIZE; + ret = regmap_read(piobu->regmap, reg, &val); + if (ret < 0) + return ret; + + return val & mask; +} + +/** + * sama5d2_piobu_set_direction() - mark pin as input or output + */ +static int sama5d2_piobu_set_direction(struct gpio_chip *chip, + unsigned int direction, + unsigned int pin) +{ + return sama5d2_piobu_write_value(chip, pin, PIOBU_DIRECTION, direction); +} + +/** + * sama5d2_piobu_get_direction() - gpiochip get_direction + */ +static int sama5d2_piobu_get_direction(struct gpio_chip *chip, + unsigned int pin) +{ + int ret = sama5d2_piobu_read_value(chip, pin, PIOBU_DIRECTION); + + if (ret < 0) + return ret; + + return (ret == PIOBU_IN) ? 1 : 0; +} + +/** + * sama5d2_piobu_direction_input() - gpiochip direction_input + */ +static int sama5d2_piobu_direction_input(struct gpio_chip *chip, + unsigned int pin) +{ + return sama5d2_piobu_set_direction(chip, PIOBU_IN, pin); +} + +/** + * sama5d2_piobu_direction_output() - gpiochip direction_output + */ +static int sama5d2_piobu_direction_output(struct gpio_chip *chip, + unsigned int pin, int value) +{ + return sama5d2_piobu_set_direction(chip, PIOBU_OUT, pin); +} + +/** + * sama5d2_piobu_get() - gpiochip get + */ +static int sama5d2_piobu_get(struct gpio_chip *chip, unsigned int pin) +{ + /* if pin is input, read value from PDS else read from SOD */ + int ret = sama5d2_piobu_get_direction(chip, pin); + + if (ret == 1) + ret = sama5d2_piobu_read_value(chip, pin, PIOBU_PDS); + else if (!ret) + ret = sama5d2_piobu_read_value(chip, pin, PIOBU_SOD); + + if (ret < 0) + return ret; + + return !!ret; +} + +/** + * sama5d2_piobu_set() - gpiochip set + */ +static void sama5d2_piobu_set(struct gpio_chip *chip, unsigned int pin, + int value) +{ + if (!value) + value = PIOBU_LOW; + else + value = PIOBU_HIGH; + + sama5d2_piobu_write_value(chip, pin, PIOBU_SOD, value); +} + +static int sama5d2_piobu_probe(struct platform_device *pdev) +{ + struct sama5d2_piobu *piobu; + int ret, i; + + piobu = devm_kzalloc(&pdev->dev, sizeof(*piobu), GFP_KERNEL); + if (!piobu) + return -ENOMEM; + + platform_set_drvdata(pdev, piobu); + piobu->chip.label = pdev->name; + piobu->chip.parent = &pdev->dev; + piobu->chip.of_node = pdev->dev.of_node; + piobu->chip.owner = THIS_MODULE, + piobu->chip.get_direction = sama5d2_piobu_get_direction, + piobu->chip.direction_input = sama5d2_piobu_direction_input, + piobu->chip.direction_output = sama5d2_piobu_direction_output, + piobu->chip.get = sama5d2_piobu_get, + piobu->chip.set = sama5d2_piobu_set, + piobu->chip.base = -1, + piobu->chip.ngpio = PIOBU_NUM, + piobu->chip.can_sleep = 0, + + piobu->regmap = syscon_node_to_regmap(pdev->dev.of_node); + if (IS_ERR(piobu->regmap)) { + dev_err(&pdev->dev, "Failed to get syscon regmap %ld\n", + PTR_ERR(piobu->regmap)); + return PTR_ERR(piobu->regmap); + } + + ret = devm_gpiochip_add_data(&pdev->dev, &piobu->chip, piobu); + if (ret) { + dev_err(&pdev->dev, "Failed to add gpiochip %d\n", ret); + return ret; + } + + for (i = 0; i < PIOBU_NUM; ++i) { + ret = sama5d2_piobu_setup_pin(&piobu->chip, i); + if (ret) { + dev_err(&pdev->dev, "Failed to setup pin: %d %d\n", + i, ret); + return ret; + } + } + + return 0; +} + +static const struct of_device_id sama5d2_piobu_ids[] = { + { .compatible = "atmel,sama5d2-secumod" }, + {}, +}; +MODULE_DEVICE_TABLE(of, sama5d2_piobu_ids); + +static struct platform_driver sama5d2_piobu_driver = { + .driver = { + .name = "sama5d2-piobu", + .of_match_table = of_match_ptr(sama5d2_piobu_ids) + }, + .probe = sama5d2_piobu_probe, +}; + +module_platform_driver(sama5d2_piobu_driver); + +MODULE_VERSION("1.0"); +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("SAMA5D2 PIOBU controller driver"); +MODULE_AUTHOR("Andrei Stefanescu "); From 533918b6f6ae7566b703adf0346dd15f2a60fe77 Mon Sep 17 00:00:00 2001 From: Tao Ren Date: Wed, 12 Dec 2018 13:53:05 -0800 Subject: [PATCH 94/99] gpio: aspeed: remove duplicated statement Remove duplicated assignment statement from aspeed_gpio_probe() function. Signed-off-by: Tao Ren Acked-by: Joel Stanley Signed-off-by: Linus Walleij --- drivers/gpio/gpio-aspeed.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index 2342e154029b..854bce4fb9e7 100644 --- a/drivers/gpio/gpio-aspeed.c +++ b/drivers/gpio/gpio-aspeed.c @@ -1185,7 +1185,6 @@ static int __init aspeed_gpio_probe(struct platform_device *pdev) gpio->chip.parent = &pdev->dev; gpio->chip.ngpio = gpio->config->nr_gpios; - gpio->chip.parent = &pdev->dev; gpio->chip.direction_input = aspeed_gpio_dir_in; gpio->chip.direction_output = aspeed_gpio_dir_out; gpio->chip.get_direction = aspeed_gpio_get_direction; From f0df462f3ae1d10131f8ff7daa016ce1a8686727 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Tue, 18 Dec 2018 09:47:57 +0100 Subject: [PATCH 95/99] gpio: mxs: read pin level directly instead of using .get MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Calling readl directly instead of going through another function that results in the same result to remove some overhead. I didn't try to measure the performance gain, but IMHO there is little benefit from abstracting a GPIO register access in the GPIO driver. Signed-off-by: Uwe Kleine-König Signed-off-by: Linus Walleij --- drivers/gpio/gpio-mxs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c index ea874fd033a5..5e5437a2c607 100644 --- a/drivers/gpio/gpio-mxs.c +++ b/drivers/gpio/gpio-mxs.c @@ -84,7 +84,7 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) port->both_edges &= ~pin_mask; switch (type) { case IRQ_TYPE_EDGE_BOTH: - val = port->gc.get(&port->gc, d->hwirq); + val = readl(port->base + PINCTRL_DIN(port)) & pin_mask; if (val) edge = GPIO_INT_FALL_EDGE; else From 6c905f91d8ae103cc0767267509a456f961a279d Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Tue, 18 Dec 2018 12:28:02 +0000 Subject: [PATCH 96/99] gpiolib-acpi: remove unused variable 'err', cleans up build warning MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Variable err is defined but never used. Remove it. Cleans up warning: warning: unused variable ‘err’ [-Wunused-variable] Signed-off-by: Colin Ian King Acked-by: Mika Westerberg Signed-off-by: Linus Walleij --- drivers/gpio/gpiolib-acpi.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c index 722a9befa8a9..d7ac8b9ab7c9 100644 --- a/drivers/gpio/gpiolib-acpi.c +++ b/drivers/gpio/gpiolib-acpi.c @@ -882,7 +882,6 @@ acpi_gpio_adr_space_handler(u32 function, acpi_physical_address address, if (!found) { enum gpiod_flags flags = acpi_gpio_to_gpiod_flags(agpio); const char *label = "ACPI:OpRegion"; - int err; desc = gpiochip_request_own_desc(chip, pin, label, flags); From e4b194aa0bf522dad9ecf0568eb0fdd598a2713b Mon Sep 17 00:00:00 2001 From: Jan Kotas Date: Tue, 18 Dec 2018 16:10:41 +0000 Subject: [PATCH 97/99] dt-bindings: gpio: Add bindings for Cadence GPIO This patch adds a DT binding documentation for Cadence GPIO controller. Signed-off-by: Jan Kotas Reviewed-by: Rob Herring [Removed interrupt-parent] Signed-off-by: Linus Walleij --- .../devicetree/bindings/gpio/cdns,gpio.txt | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/cdns,gpio.txt diff --git a/Documentation/devicetree/bindings/gpio/cdns,gpio.txt b/Documentation/devicetree/bindings/gpio/cdns,gpio.txt new file mode 100644 index 000000000000..706ef00f5c64 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/cdns,gpio.txt @@ -0,0 +1,43 @@ +Cadence GPIO controller bindings + +Required properties: +- compatible: should be "cdns,gpio-r1p02". +- reg: the register base address and size. +- #gpio-cells: should be 2. + * first cell is the GPIO number. + * second cell specifies the GPIO flags, as defined in + . Only the GPIO_ACTIVE_HIGH + and GPIO_ACTIVE_LOW flags are supported. +- gpio-controller: marks the device as a GPIO controller. +- clocks: should contain one entry referencing the peripheral clock driving + the GPIO controller. + +Optional properties: +- ngpios: integer number of gpio lines supported by this controller, up to 32. +- interrupts: interrupt specifier for the controllers interrupt. +- interrupt-controller: marks the device as an interrupt controller. When + defined, interrupts, interrupt-parent and #interrupt-cells + are required. +- interrupt-cells: should be 2. + * first cell is the GPIO number you want to use as an IRQ source. + * second cell specifies the IRQ type, as defined in + . + Currently only level sensitive IRQs are supported. + + +Example: + gpio0: gpio-controller@fd060000 { + compatible = "cdns,gpio-r1p02"; + reg =<0xfd060000 0x1000>; + + clocks = <&gpio_clk>; + + interrupt-parent = <&gic>; + interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; From 72ab2f76319e15f7ad1f9d5f529df47099d4d271 Mon Sep 17 00:00:00 2001 From: Jan Kotas Date: Tue, 18 Dec 2018 16:10:42 +0000 Subject: [PATCH 98/99] gpio: Add Cadence GPIO driver This patch adds a driver for Cadence GPIO controller. It can be enabled with GPIO_CADENCE Kconfig option. It uses generic GPIO infrastructure and works as an interrupt controller. At the moment it only supports level sensitive irqs. Signed-off-by: Jan Kotas Signed-off-by: Linus Walleij --- drivers/gpio/Kconfig | 8 + drivers/gpio/Makefile | 1 + drivers/gpio/gpio-cadence.c | 291 ++++++++++++++++++++++++++++++++++++ 3 files changed, 300 insertions(+) create mode 100644 drivers/gpio/gpio-cadence.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index f47994708809..7b3e4e19a799 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -160,6 +160,14 @@ config GPIO_BRCMSTB help Say yes here to enable GPIO support for Broadcom STB (BCM7XXX) SoCs. +config GPIO_CADENCE + tristate "Cadence GPIO support" + depends on OF_GPIO + select GPIO_GENERIC + select GPIOLIB_IRQCHIP + help + Say yes here to enable support for Cadence GPIO controller. + config GPIO_CLPS711X tristate "CLPS711X GPIO support" depends on ARCH_CLPS711X || COMPILE_TEST diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index f18d34590722..37628f8dbf70 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o +obj-$(CONFIG_GPIO_CADENCE) += gpio-cadence.o obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o obj-$(CONFIG_GPIO_CS5535) += gpio-cs5535.o obj-$(CONFIG_GPIO_CRYSTAL_COVE) += gpio-crystalcove.o diff --git a/drivers/gpio/gpio-cadence.c b/drivers/gpio/gpio-cadence.c new file mode 100644 index 000000000000..aec8d5df9f30 --- /dev/null +++ b/drivers/gpio/gpio-cadence.c @@ -0,0 +1,291 @@ +// SPDX-License-Identifier: GPL-2.0 + +/* + * Copyright 2017-2018 Cadence + * + * Authors: + * Jan Kotas + * Boris Brezillon + */ + +#include +#include +#include +#include +#include +#include +#include + +#define CDNS_GPIO_BYPASS_MODE 0x00 +#define CDNS_GPIO_DIRECTION_MODE 0x04 +#define CDNS_GPIO_OUTPUT_EN 0x08 +#define CDNS_GPIO_OUTPUT_VALUE 0x0c +#define CDNS_GPIO_INPUT_VALUE 0x10 +#define CDNS_GPIO_IRQ_MASK 0x14 +#define CDNS_GPIO_IRQ_EN 0x18 +#define CDNS_GPIO_IRQ_DIS 0x1c +#define CDNS_GPIO_IRQ_STATUS 0x20 +#define CDNS_GPIO_IRQ_TYPE 0x24 +#define CDNS_GPIO_IRQ_VALUE 0x28 +#define CDNS_GPIO_IRQ_ANY_EDGE 0x2c + +struct cdns_gpio_chip { + struct gpio_chip gc; + struct clk *pclk; + void __iomem *regs; + u32 bypass_orig; +}; + +static int cdns_gpio_request(struct gpio_chip *chip, unsigned int offset) +{ + struct cdns_gpio_chip *cgpio = gpiochip_get_data(chip); + unsigned long flags; + + spin_lock_irqsave(&chip->bgpio_lock, flags); + + iowrite32(ioread32(cgpio->regs + CDNS_GPIO_BYPASS_MODE) & ~BIT(offset), + cgpio->regs + CDNS_GPIO_BYPASS_MODE); + + spin_unlock_irqrestore(&chip->bgpio_lock, flags); + return 0; +} + +static void cdns_gpio_free(struct gpio_chip *chip, unsigned int offset) +{ + struct cdns_gpio_chip *cgpio = gpiochip_get_data(chip); + unsigned long flags; + + spin_lock_irqsave(&chip->bgpio_lock, flags); + + iowrite32(ioread32(cgpio->regs + CDNS_GPIO_BYPASS_MODE) | + (BIT(offset) & cgpio->bypass_orig), + cgpio->regs + CDNS_GPIO_BYPASS_MODE); + + spin_unlock_irqrestore(&chip->bgpio_lock, flags); +} + +static void cdns_gpio_irq_mask(struct irq_data *d) +{ + struct gpio_chip *chip = irq_data_get_irq_chip_data(d); + struct cdns_gpio_chip *cgpio = gpiochip_get_data(chip); + + iowrite32(BIT(d->hwirq), cgpio->regs + CDNS_GPIO_IRQ_DIS); +} + +static void cdns_gpio_irq_unmask(struct irq_data *d) +{ + struct gpio_chip *chip = irq_data_get_irq_chip_data(d); + struct cdns_gpio_chip *cgpio = gpiochip_get_data(chip); + + iowrite32(BIT(d->hwirq), cgpio->regs + CDNS_GPIO_IRQ_EN); +} + +static int cdns_gpio_irq_set_type(struct irq_data *d, unsigned int type) +{ + struct gpio_chip *chip = irq_data_get_irq_chip_data(d); + struct cdns_gpio_chip *cgpio = gpiochip_get_data(chip); + unsigned long flags; + u32 int_value; + u32 int_type; + u32 mask = BIT(d->hwirq); + int ret = 0; + + spin_lock_irqsave(&chip->bgpio_lock, flags); + + int_value = ioread32(cgpio->regs + CDNS_GPIO_IRQ_VALUE) & ~mask; + int_type = ioread32(cgpio->regs + CDNS_GPIO_IRQ_TYPE) & ~mask; + + /* + * The GPIO controller doesn't have an ACK register. + * All interrupt statuses are cleared on a status register read. + * Don't support edge interrupts for now. + */ + + if (type == IRQ_TYPE_LEVEL_HIGH) { + int_type |= mask; + int_value |= mask; + } else if (type == IRQ_TYPE_LEVEL_LOW) { + int_type |= mask; + } else { + ret = -EINVAL; + goto err_irq_type; + } + + iowrite32(int_value, cgpio->regs + CDNS_GPIO_IRQ_VALUE); + iowrite32(int_type, cgpio->regs + CDNS_GPIO_IRQ_TYPE); + +err_irq_type: + spin_unlock_irqrestore(&chip->bgpio_lock, flags); + return ret; +} + +static void cdns_gpio_irq_handler(struct irq_desc *desc) +{ + struct gpio_chip *chip = irq_desc_get_handler_data(desc); + struct cdns_gpio_chip *cgpio = gpiochip_get_data(chip); + struct irq_chip *irqchip = irq_desc_get_chip(desc); + unsigned long status; + int hwirq; + + chained_irq_enter(irqchip, desc); + + status = ioread32(cgpio->regs + CDNS_GPIO_IRQ_STATUS) & + ~ioread32(cgpio->regs + CDNS_GPIO_IRQ_MASK); + + for_each_set_bit(hwirq, &status, chip->ngpio) + generic_handle_irq(irq_find_mapping(chip->irq.domain, hwirq)); + + chained_irq_exit(irqchip, desc); +} + +static struct irq_chip cdns_gpio_irqchip = { + .name = "cdns-gpio", + .irq_mask = cdns_gpio_irq_mask, + .irq_unmask = cdns_gpio_irq_unmask, + .irq_set_type = cdns_gpio_irq_set_type +}; + +static int cdns_gpio_probe(struct platform_device *pdev) +{ + struct cdns_gpio_chip *cgpio; + struct resource *res; + int ret, irq; + u32 dir_prev; + u32 num_gpios = 32; + + cgpio = devm_kzalloc(&pdev->dev, sizeof(*cgpio), GFP_KERNEL); + if (!cgpio) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + cgpio->regs = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(cgpio->regs)) + return PTR_ERR(cgpio->regs); + + of_property_read_u32(pdev->dev.of_node, "ngpios", &num_gpios); + + if (num_gpios > 32) { + dev_err(&pdev->dev, "ngpios must be less or equal 32\n"); + return -EINVAL; + } + + /* + * Set all pins as inputs by default, otherwise: + * gpiochip_lock_as_irq: + * tried to flag a GPIO set as output for IRQ + * Generic GPIO driver stores the direction value internally, + * so it needs to be changed before bgpio_init() is called. + */ + dir_prev = ioread32(cgpio->regs + CDNS_GPIO_DIRECTION_MODE); + iowrite32(GENMASK(num_gpios - 1, 0), + cgpio->regs + CDNS_GPIO_DIRECTION_MODE); + + ret = bgpio_init(&cgpio->gc, &pdev->dev, 4, + cgpio->regs + CDNS_GPIO_INPUT_VALUE, + cgpio->regs + CDNS_GPIO_OUTPUT_VALUE, + NULL, + NULL, + cgpio->regs + CDNS_GPIO_DIRECTION_MODE, + BGPIOF_READ_OUTPUT_REG_SET); + if (ret) { + dev_err(&pdev->dev, "Failed to register generic gpio, %d\n", + ret); + goto err_revert_dir; + } + + cgpio->gc.label = dev_name(&pdev->dev); + cgpio->gc.ngpio = num_gpios; + cgpio->gc.parent = &pdev->dev; + cgpio->gc.base = -1; + cgpio->gc.owner = THIS_MODULE; + cgpio->gc.request = cdns_gpio_request; + cgpio->gc.free = cdns_gpio_free; + + cgpio->pclk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(cgpio->pclk)) { + ret = PTR_ERR(cgpio->pclk); + dev_err(&pdev->dev, + "Failed to retrieve peripheral clock, %d\n", ret); + goto err_revert_dir; + } + + ret = clk_prepare_enable(cgpio->pclk); + if (ret) { + dev_err(&pdev->dev, + "Failed to enable the peripheral clock, %d\n", ret); + goto err_revert_dir; + } + + ret = devm_gpiochip_add_data(&pdev->dev, &cgpio->gc, cgpio); + if (ret < 0) { + dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret); + goto err_disable_clk; + } + + /* + * irq_chip support + */ + irq = platform_get_irq(pdev, 0); + if (irq >= 0) { + ret = gpiochip_irqchip_add(&cgpio->gc, &cdns_gpio_irqchip, + 0, handle_level_irq, + IRQ_TYPE_NONE); + if (ret) { + dev_err(&pdev->dev, "Could not add irqchip, %d\n", + ret); + goto err_disable_clk; + } + gpiochip_set_chained_irqchip(&cgpio->gc, &cdns_gpio_irqchip, + irq, cdns_gpio_irq_handler); + } + + cgpio->bypass_orig = ioread32(cgpio->regs + CDNS_GPIO_BYPASS_MODE); + + /* + * Enable gpio outputs, ignored for input direction + */ + iowrite32(GENMASK(num_gpios - 1, 0), + cgpio->regs + CDNS_GPIO_OUTPUT_EN); + iowrite32(0, cgpio->regs + CDNS_GPIO_BYPASS_MODE); + + platform_set_drvdata(pdev, cgpio); + return 0; + +err_disable_clk: + clk_disable_unprepare(cgpio->pclk); + +err_revert_dir: + iowrite32(dir_prev, cgpio->regs + CDNS_GPIO_DIRECTION_MODE); + + return ret; +} + +static int cdns_gpio_remove(struct platform_device *pdev) +{ + struct cdns_gpio_chip *cgpio = platform_get_drvdata(pdev); + + iowrite32(cgpio->bypass_orig, cgpio->regs + CDNS_GPIO_BYPASS_MODE); + clk_disable_unprepare(cgpio->pclk); + + return 0; +} + +static const struct of_device_id cdns_of_ids[] = { + { .compatible = "cdns,gpio-r1p02" }, + { /* sentinel */ }, +}; + +static struct platform_driver cdns_gpio_driver = { + .driver = { + .name = "cdns-gpio", + .of_match_table = cdns_of_ids, + }, + .probe = cdns_gpio_probe, + .remove = cdns_gpio_remove, +}; +module_platform_driver(cdns_gpio_driver); + +MODULE_AUTHOR("Jan Kotas "); +MODULE_DESCRIPTION("Cadence GPIO driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:cdns-gpio"); From a7c23f8d154f7919c5fcfceea6e0897be2d5ab71 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sat, 22 Dec 2018 11:04:55 +0100 Subject: [PATCH 99/99] gpio: sama5d2-piobu: Depend on OF_GPIO This driver clearly needs OF_GPIO so depend on it. Fixes a build error. Cc: Andrei Stefanescu Signed-off-by: Linus Walleij --- drivers/gpio/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 7b3e4e19a799..b5a2845347ec 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -441,6 +441,7 @@ config GPIO_REG config GPIO_SAMA5D2_PIOBU tristate "SAMA5D2 PIOBU GPIO support" depends on MFD_SYSCON + depends on OF_GPIO select GPIO_SYSCON help Say yes here to use the PIOBU pins as GPIOs.