irqchip/gicv3-its: Use NUMA aware memory allocation for ITS tables
The NUMA node information is visible to ITS driver but not being used other than handling hardware errata. ITS/GICR hardware accesses to the local NUMA node is usually quicker than the remote NUMA node. How slow the remote NUMA accesses are depends on the implementation details. This patch allocates memory for ITS management tables and command queue from the corresponding NUMA node using the appropriate NUMA aware functions. This change improves the performance of the ITS tables read latency on systems where it has more than one ITS block, and with the slower inter node accesses. Apache Web server benchmarking using ab tool on a HiSilicon D06 board with multiple numa mem nodes shows Time per request and Transfer rate improvements of ~3.6% with this patch. Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> Signed-off-by: Hanjun Guo <guohanjun@huawei.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Ganapatrao Kulkarni <gkulkarni@marvell.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -1737,6 +1737,7 @@ static int its_setup_baser(struct its_node *its, struct its_baser *baser,
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u64 type = GITS_BASER_TYPE(val);
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u64 baser_phys, tmp;
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u32 alloc_pages;
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struct page *page;
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void *base;
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retry_alloc_baser:
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@ -1749,10 +1750,11 @@ retry_alloc_baser:
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order = get_order(GITS_BASER_PAGES_MAX * psz);
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}
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base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
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if (!base)
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page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO, order);
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if (!page)
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return -ENOMEM;
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base = (void *)page_address(page);
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baser_phys = virt_to_phys(base);
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/* Check if the physical address of the memory is above 48bits */
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@ -2238,7 +2240,8 @@ static struct its_baser *its_get_baser(struct its_node *its, u32 type)
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return NULL;
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}
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static bool its_alloc_table_entry(struct its_baser *baser, u32 id)
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static bool its_alloc_table_entry(struct its_node *its,
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struct its_baser *baser, u32 id)
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{
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struct page *page;
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u32 esz, idx;
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@ -2258,7 +2261,8 @@ static bool its_alloc_table_entry(struct its_baser *baser, u32 id)
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/* Allocate memory for 2nd level table */
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if (!table[idx]) {
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page = alloc_pages(GFP_KERNEL | __GFP_ZERO, get_order(baser->psz));
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page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO,
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get_order(baser->psz));
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if (!page)
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return false;
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@ -2289,7 +2293,7 @@ static bool its_alloc_device_table(struct its_node *its, u32 dev_id)
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if (!baser)
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return (ilog2(dev_id) < its->device_ids);
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return its_alloc_table_entry(baser, dev_id);
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return its_alloc_table_entry(its, baser, dev_id);
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}
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static bool its_alloc_vpe_table(u32 vpe_id)
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@ -2313,7 +2317,7 @@ static bool its_alloc_vpe_table(u32 vpe_id)
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if (!baser)
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return false;
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if (!its_alloc_table_entry(baser, vpe_id))
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if (!its_alloc_table_entry(its, baser, vpe_id))
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return false;
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}
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@ -2347,7 +2351,7 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
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nr_ites = max(2, nvecs);
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sz = nr_ites * its->ite_size;
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sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
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itt = kzalloc(sz, GFP_KERNEL);
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itt = kzalloc_node(sz, GFP_KERNEL, its->numa_node);
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if (alloc_lpis) {
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lpi_map = its_lpi_alloc(nvecs, &lpi_base, &nr_lpis);
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if (lpi_map)
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@ -3488,6 +3492,7 @@ static int __init its_probe_one(struct resource *res,
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void __iomem *its_base;
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u32 val, ctlr;
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u64 baser, tmp, typer;
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struct page *page;
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int err;
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its_base = ioremap(res->start, resource_size(res));
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@ -3543,12 +3548,13 @@ static int __init its_probe_one(struct resource *res,
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its->numa_node = numa_node;
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its->cmd_base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
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page = alloc_pages_node(its->numa_node, GFP_KERNEL | __GFP_ZERO,
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get_order(ITS_CMD_QUEUE_SZ));
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if (!its->cmd_base) {
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if (!page) {
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err = -ENOMEM;
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goto out_free_its;
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}
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its->cmd_base = (void *)page_address(page);
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its->cmd_write = its->cmd_base;
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its->fwnode_handle = handle;
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its->get_msi_base = its_irq_get_msi_base;
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