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ARM: SoC multiplatform code changes for v4.5

Browse source 
This branch is the culmination of 5 years of effort to bring the ARMv6
 and ARMv7 platforms together such that they can all be enabled and
 boot the same kernel. It has been a tremendous amount of cleanup and
 refactoring by a huge number of people, and creation of several new
 (and major) subsystems to better abstract out all the platform details
 in an appropriate manner.
 
 The bulk of this branch is a large patchset from Arnd that brings several
 of the more minor and older platforms we have closer to multiplatform
 support.  Among these are MMP, S3C64xx, Orion5x, mv78xx0 and realview
 Much of this is moving around header files from old mach directories,
 but there are also some cleanup patches of debug_ll (lowlevel debug
 per-platform options) and other parts.
 
 Linus Walleij also has some patchs to clean up the older ARM Realview
 platforms by finally introducing DT support, and Rob Herring has some
 for ARM Versatile which is now DT-only. Both of these platforms are
 now multiplatform.
 
 Finally, a couple of patches from Russell for Dove PMU, and a fix from
 Valentin Rothberg for Exynos ADC, which were rebased on top of the
 series to avoid conflicts.
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Merge tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC multiplatform code updates from Arnd Bergmann:
 "This branch is the culmination of 5 years of effort to bring the ARMv6
  and ARMv7 platforms together such that they can all be enabled and
  boot the same kernel.  It has been a tremendous amount of cleanup and
  refactoring by a huge number of people, and creation of several new
  (and major) subsystems to better abstract out all the platform details
  in an appropriate manner.

  The bulk of this branch is a large patchset from Arnd that brings
  several of the more minor and older platforms we have closer to
  multiplatform support.  Among these are MMP, S3C64xx, Orion5x, mv78xx0
  and realview Much of this is moving around header files from old mach
  directories, but there are also some cleanup patches of debug_ll
  (lowlevel debug per-platform options) and other parts.

  Linus Walleij also has some patchs to clean up the older ARM Realview
  platforms by finally introducing DT support, and Rob Herring has some
  for ARM Versatile which is now DT-only.  Both of these platforms are
  now multiplatform.

  Finally, a couple of patches from Russell for Dove PMU, and a fix from
  Valentin Rothberg for Exynos ADC, which were rebased on top of the
  series to avoid conflicts"

* tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (75 commits)
  ARM: realview: don't select SMP_ON_UP for UP builds
  ARM: s3c: simplify s3c_irqwake_{e,}intallow definition
  ARM: s3c64xx: fix pm-debug compilation
  iio: exynos-adc: fix irqf_oneshot.cocci warnings
  ARM: realview: build realview-dt SMP support only when used
  ARM: realview: select apropriate targets
  ARM: realview: clean up header files
  ARM: realview: make all header files local
  ARM: no longer make CPU targets visible separately
  ARM: integrator: use explicit core module options
  ARM: realview: enable multiplatform
  ARM: make default platform work for NOMMU
  ARM: debug-ll: move DEBUG_LL_UART_EFM32 to correct Kconfig location
  ARM: defconfig: use correct debug_ll settings
  ARM: versatile: convert to multi-platform
  ARM: versatile: merge mach code into a single file
  ARM: versatile: switch to DT only booting and remove legacy code
  ARM: versatile: add DT based PCI detection
  ARM: pxa: mark ezx structures as __maybe_unused
  ARM: pxa: mark raumfeld init functions as __maybe_unused
  ...
This commit is contained in:
Linus Torvalds 2016-01-20 18:03:56 -08:00
parent 5083c54264 2cb58c0166
commit 6b5a12dbca
415 changed files with 2369 additions and 4001 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

26
Documentation/arm/pxa/mfp.txt
View file

@ -49,7 +49,7 @@ to this new MFP mechanism, here are several key points:
internal controllers like PWM, SSP and UART, with 128 internal signals
which can be routed to external through one or more MFPs (e.g. GPIO<0>
can be routed through either MFP_PIN_GPIO0 as well as MFP_PIN_GPIO0_2,
see arch/arm/mach-pxa/mach/include/mfp-pxa300.h)
see arch/arm/mach-pxa/mfp-pxa300.h)
2. Alternate function configuration is removed from this GPIO controller,
the remaining functions are pure GPIO-specific, i.e.
@ -76,11 +76,11 @@ For board code writers, here are some guidelines:
1. include ONE of the following header files in your <board>.c:
- #include <mach/mfp-pxa25x.h>
- #include <mach/mfp-pxa27x.h>
- #include <mach/mfp-pxa300.h>
- #include <mach/mfp-pxa320.h>
- #include <mach/mfp-pxa930.h>
- #include "mfp-pxa25x.h"
- #include "mfp-pxa27x.h"
- #include "mfp-pxa300.h"
- #include "mfp-pxa320.h"
- #include "mfp-pxa930.h"
NOTE: only one file in your <board>.c, depending on the processors used,
because pin configuration definitions may conflict in these file (i.e.
@ -203,20 +203,20 @@ make them effective there-after.
1. Unified pin definitions - enum constants for all configurable pins
2. processor-neutral bit definitions for a possible MFP configuration
- arch/arm/mach-pxa/include/mach/mfp-pxa3xx.h
- arch/arm/mach-pxa/mfp-pxa3xx.h
for PXA3xx specific MFPR register bit definitions and PXA3xx common pin
configurations
- arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
- arch/arm/mach-pxa/mfp-pxa2xx.h
for PXA2xx specific definitions and PXA25x/PXA27x common pin configurations
- arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
arch/arm/mach-pxa/include/mach/mfp-pxa300.h
arch/arm/mach-pxa/include/mach/mfp-pxa320.h
arch/arm/mach-pxa/include/mach/mfp-pxa930.h
- arch/arm/mach-pxa/mfp-pxa25x.h
arch/arm/mach-pxa/mfp-pxa27x.h
arch/arm/mach-pxa/mfp-pxa300.h
arch/arm/mach-pxa/mfp-pxa320.h
arch/arm/mach-pxa/mfp-pxa930.h
for processor specific definitions

1
Documentation/devicetree/bindings/arm/cpus.txt
View file

@ -191,6 +191,7 @@ nodes to be present and contain the properties described below.
"allwinner,sun6i-a31"
"allwinner,sun8i-a23"
"arm,psci"
"arm,realview-smp"
"brcm,brahma-b15"
"marvell,armada-375-smp"
"marvell,armada-380-smp"

3
Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt
View file

@ -47,6 +47,9 @@ Required properties:
- samsung,syscon-phandle Contains the PMU system controller node
(To access the ADC_PHY register on Exynos5250/5420/5800/3250)
Optional properties:
- has-touchscreen: If present, indicates that a touchscreen is
connected an usable.
Note: child nodes can be added for auto probing from device tree.

107
arch/arm/Kconfig
View file

@ -240,7 +240,6 @@ config ARM_PATCH_PHYS_VIRT
bool "Patch physical to virtual translations at runtime" if EMBEDDED
default y
depends on !XIP_KERNEL && MMU
depends on !ARCH_REALVIEW || !SPARSEMEM
help
Patch phys-to-virt and virt-to-phys translation functions at
boot and module load time according to the position of the
@ -321,7 +320,7 @@ config ARCH_MMAP_RND_BITS_MAX
#
choice
prompt "ARM system type"
default ARCH_VERSATILE if !MMU
default ARM_SINGLE_ARMV7M if !MMU
default ARCH_MULTIPLATFORM if MMU
config ARCH_MULTIPLATFORM
@ -353,38 +352,6 @@ config ARM_SINGLE_ARMV7M
select SPARSE_IRQ
select USE_OF
config ARCH_REALVIEW
bool "ARM Ltd. RealView family"
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_AMBA
select ARM_TIMER_SP804
select COMMON_CLK
select COMMON_CLK_VERSATILE
select GENERIC_CLOCKEVENTS
select GPIO_PL061 if GPIOLIB
select ICST
select NEED_MACH_MEMORY_H
select PLAT_VERSATILE
select PLAT_VERSATILE_SCHED_CLOCK
help
This enables support for ARM Ltd RealView boards.
config ARCH_VERSATILE
bool "ARM Ltd. Versatile family"
select ARCH_WANT_OPTIONAL_GPIOLIB
select ARM_AMBA
select ARM_TIMER_SP804
select ARM_VIC
select CLKDEV_LOOKUP
select GENERIC_CLOCKEVENTS
select HAVE_MACH_CLKDEV
select ICST
select PLAT_VERSATILE
select PLAT_VERSATILE_CLOCK
select PLAT_VERSATILE_SCHED_CLOCK
select VERSATILE_FPGA_IRQ
help
This enables support for ARM Ltd Versatile board.
config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
@ -519,56 +486,16 @@ config ARCH_DOVE
select CPU_PJ4
select GENERIC_CLOCKEVENTS
select MIGHT_HAVE_PCI
select MULTI_IRQ_HANDLER
select MVEBU_MBUS
select PINCTRL
select PINCTRL_DOVE
select PLAT_ORION_LEGACY
select SPARSE_IRQ
select PM_GENERIC_DOMAINS if PM
help
Support for the Marvell Dove SoC 88AP510
config ARCH_MV78XX0
bool "Marvell MV78xx0"
select ARCH_REQUIRE_GPIOLIB
select CPU_FEROCEON
select GENERIC_CLOCKEVENTS
select MVEBU_MBUS
select PCI
select PLAT_ORION_LEGACY
help
Support for the following Marvell MV78xx0 series SoCs:
MV781x0, MV782x0.
config ARCH_ORION5X
bool "Marvell Orion"
depends on MMU
select ARCH_REQUIRE_GPIOLIB
select CPU_FEROCEON
select GENERIC_CLOCKEVENTS
select MVEBU_MBUS
select PCI
select PLAT_ORION_LEGACY
select MULTI_IRQ_HANDLER
help
Support for the following Marvell Orion 5x series SoCs:
Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
Orion-2 (5281), Orion-1-90 (6183).
config ARCH_MMP
bool "Marvell PXA168/910/MMP2"
depends on MMU
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select GENERIC_ALLOCATOR
select GENERIC_CLOCKEVENTS
select GPIO_PXA
select IRQ_DOMAIN
select MULTI_IRQ_HANDLER
select PINCTRL
select PLAT_PXA
select SPARSE_IRQ
help
Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
config ARCH_KS8695
bool "Micrel/Kendin KS8695"
select ARCH_REQUIRE_GPIOLIB
@ -692,32 +619,6 @@ config ARCH_S3C24XX
(<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
Samsung SMDK2410 development board (and derivatives).
config ARCH_S3C64XX
bool "Samsung S3C64XX"
select ARCH_REQUIRE_GPIOLIB
select ARM_AMBA
select ARM_VIC
select ATAGS
select CLKDEV_LOOKUP
select CLKSRC_SAMSUNG_PWM
select COMMON_CLK_SAMSUNG
select CPU_V6K
select GENERIC_CLOCKEVENTS
select GPIO_SAMSUNG
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select HAVE_TCM
select NO_IOPORT_MAP
select PLAT_SAMSUNG
select PM_GENERIC_DOMAINS if PM
select S3C_DEV_NAND
select S3C_GPIO_TRACK
select SAMSUNG_ATAGS
select SAMSUNG_WAKEMASK
select SAMSUNG_WDT_RESET
help
Samsung S3C64XX series based systems
config ARCH_DAVINCI
bool "TI DaVinci"
select ARCH_HAS_HOLES_MEMORYMODEL

391
arch/arm/Kconfig.debug
View file

@ -218,23 +218,6 @@ choice
Say Y here if you want the debug print routines to direct
their output to UART0 serial port on DaVinci DMx devices.
config DEBUG_ZYNQ_UART0
bool "Kernel low-level debugging on Xilinx Zynq using UART0"
depends on ARCH_ZYNQ
help
Say Y here if you want the debug print routines to direct
their output to UART0 on the Zynq platform.
config DEBUG_ZYNQ_UART1
bool "Kernel low-level debugging on Xilinx Zynq using UART1"
depends on ARCH_ZYNQ
help
Say Y here if you want the debug print routines to direct
their output to UART1 on the Zynq platform.
If you have a ZC702 board and want early boot messages to
appear on the USB serial adaptor, select this option.
config DEBUG_DC21285_PORT
bool "Kernel low-level debugging messages via footbridge serial port"
depends on FOOTBRIDGE
@ -249,13 +232,30 @@ choice
Say Y here if you want the debug print routines to direct
their output to the UA0 serial port in the CX92755.
config DEBUG_EP93XX
bool "Kernel low-level debugging messages via ep93xx UART"
depends on ARCH_EP93XX
select DEBUG_UART_PL01X
help
Say Y here if you want kernel low-level debugging support
on Cirrus Logic EP93xx based platforms.
config DEBUG_FOOTBRIDGE_COM1
bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
depends on FOOTBRIDGE
select DEBUG_UART_8250
help
Say Y here if you want the debug print routines to direct
their output to the 8250 at PCI COM1.
config DEBUG_GEMINI
bool "Kernel low-level debugging messages via Cortina Systems Gemini UART"
depends on ARCH_GEMINI
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
on Cortina Gemini based platforms.
config DEBUG_HI3620_UART
bool "Hisilicon HI3620 Debug UART"
depends on ARCH_HI3xxx
@ -411,6 +411,14 @@ choice
Say Y here if you want kernel low-level debugging support
on i.MX7D.
config DEBUG_INTEGRATOR
bool "Kernel low-level debugging messages via ARM Integrator UART"
depends on ARCH_INTEGRATOR
select DEBUG_UART_PL01X
help
Say Y here if you want kernel low-level debugging support
on ARM Integrator platforms.
config DEBUG_KEYSTONE_UART0
bool "Kernel low-level debugging on KEYSTONE2 using UART0"
depends on ARCH_KEYSTONE
@ -442,6 +450,14 @@ choice
Say Y here if you want kernel low-level debugging support
on NXP LPC18xx/43xx UART0.
config DEBUG_LPC32XX
bool "Kernel low-level debugging messages via NXP LPC32xx UART"
depends on ARCH_LPC32XX
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
on NXP LPC32xx based platforms.
config DEBUG_MESON_UARTAO
bool "Kernel low-level debugging via Meson6 UARTAO"
depends on ARCH_MESON
@ -465,26 +481,10 @@ choice
Say Y here if you want kernel low-level debugging support
on MMP UART3.
config DEBUG_QCOM_UARTDM
bool "Kernel low-level debugging messages via QCOM UARTDM"
depends on ARCH_QCOM
help
Say Y here if you want the debug print routines to direct
their output to the serial port on Qualcomm devices.
ARCH DEBUG_UART_PHYS DEBUG_UART_VIRT
APQ8064 0x16640000 0xf0040000
APQ8084 0xf995e000 0xfa75e000
MSM8X60 0x19c40000 0xf0040000
MSM8960 0x16440000 0xf0040000
MSM8974 0xf991e000 0xfa71e000
Please adjust DEBUG_UART_PHYS and DEBUG_UART_BASE configuration
options based on your needs.
config DEBUG_MVEBU_UART0
bool "Kernel low-level debugging messages via MVEBU UART0 (old bootloaders)"
depends on ARCH_MVEBU
depends on ARCH_MVEBU && CPU_V7
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
@ -497,17 +497,23 @@ choice
Plathome OpenBlocks AX3, when using the original
bootloader.
This option will not work on older Marvell platforms
(Kirkwood, Dove, MV78xx0, Orion5x), which should pick
the "new bootloader" variant.
If the wrong DEBUG_MVEBU_UART* option is selected,
when u-boot hands over to the kernel, the system
silently crashes, with no serial output at all.
config DEBUG_MVEBU_UART0_ALTERNATE
bool "Kernel low-level debugging messages via MVEBU UART0 (new bootloaders)"
depends on ARCH_MVEBU
depends on ARCH_MVEBU || ARCH_DOVE || ARCH_MV78XX0 || ARCH_ORION5X
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
on MVEBU based platforms on UART0.
on MVEBU based platforms on UART0. (Armada XP, Armada 3xx,
Kirkwood, Dove, MV78xx0, Orion5x).
This option should be used with the new bootloaders
that remap the internal registers at 0xf1000000.
@ -522,21 +528,41 @@ choice
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
on MVEBU based platforms on UART1.
on MVEBU based platforms on UART1. (Armada XP, Armada 3xx,
Kirkwood, Dove, MV78xx0, Orion5x).
This option should be used with the new bootloaders
that remap the internal registers at 0xf1000000.
All of the older (pre Armada XP/370) platforms also use
this address, regardless of the boot loader version.
If the wrong DEBUG_MVEBU_UART* option is selected,
when u-boot hands over to the kernel, the system
silently crashes, with no serial output at all.
config DEBUG_VF_UART
bool "Vybrid UART"
depends on SOC_VF610
config DEBUG_MT6589_UART0
bool "Mediatek mt6589 UART0"
depends on ARCH_MEDIATEK
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
on Vybrid based platforms.
for Mediatek mt6589 based platforms on UART0.
config DEBUG_MT8127_UART0
bool "Mediatek mt8127/mt6592 UART0"
depends on ARCH_MEDIATEK
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
for Mediatek mt8127 based platforms on UART0.
config DEBUG_MT8135_UART3
bool "Mediatek mt8135 UART3"
depends on ARCH_MEDIATEK
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
for Mediatek mt8135 based platforms on UART3.
config DEBUG_NETX_UART
bool "Kernel low-level debugging messages via NetX UART"
@ -700,6 +726,23 @@ choice
Say Y here if you want kernel low-level debugging support
on PXA UART1.
config DEBUG_QCOM_UARTDM
bool "Kernel low-level debugging messages via QCOM UARTDM"
depends on ARCH_QCOM
help
Say Y here if you want the debug print routines to direct
their output to the serial port on Qualcomm devices.
ARCH DEBUG_UART_PHYS DEBUG_UART_VIRT
APQ8064 0x16640000 0xf0040000
APQ8084 0xf995e000 0xfa75e000
MSM8X60 0x19c40000 0xf0040000
MSM8960 0x16440000 0xf0040000
MSM8974 0xf991e000 0xfa71e000
Please adjust DEBUG_UART_PHYS and DEBUG_UART_BASE configuration
options based on your needs.
config DEBUG_REALVIEW_STD_PORT
bool "RealView Default UART"
depends on ARCH_REALVIEW
@ -843,6 +886,7 @@ choice
depends on PLAT_SAMSUNG
select DEBUG_EXYNOS_UART if ARCH_EXYNOS
select DEBUG_S3C24XX_UART if ARCH_S3C24XX
select DEBUG_S3C64XX_UART if ARCH_S3C64XX
select DEBUG_S5PV210_UART if ARCH_S5PV210
bool "Use Samsung S3C UART 0 for low-level debug"
help
@ -854,6 +898,7 @@ choice
depends on PLAT_SAMSUNG
select DEBUG_EXYNOS_UART if ARCH_EXYNOS
select DEBUG_S3C24XX_UART if ARCH_S3C24XX
select DEBUG_S3C64XX_UART if ARCH_S3C64XX
select DEBUG_S5PV210_UART if ARCH_S5PV210
bool "Use Samsung S3C UART 1 for low-level debug"
help
@ -865,6 +910,7 @@ choice
depends on PLAT_SAMSUNG
select DEBUG_EXYNOS_UART if ARCH_EXYNOS
select DEBUG_S3C24XX_UART if ARCH_S3C24XX
select DEBUG_S3C64XX_UART if ARCH_S3C64XX
select DEBUG_S5PV210_UART if ARCH_S5PV210
bool "Use Samsung S3C UART 2 for low-level debug"
help
@ -875,6 +921,7 @@ choice
config DEBUG_S3C_UART3
depends on PLAT_SAMSUNG && (ARCH_EXYNOS || ARCH_S5PV210)
select DEBUG_EXYNOS_UART if ARCH_EXYNOS
select DEBUG_S3C64XX_UART if ARCH_S3C64XX
select DEBUG_S5PV210_UART if ARCH_S5PV210
bool "Use Samsung S3C UART 3 for low-level debug"
help
@ -966,6 +1013,70 @@ choice
Say Y here if you want kernel low-level debugging support
on Allwinner A31/A23 based platforms on the R_UART.
config DEBUG_SIRFPRIMA2_UART1
bool "Kernel low-level debugging messages via SiRFprimaII UART1"
depends on ARCH_PRIMA2
select DEBUG_SIRFSOC_UART
help
Say Y here if you want the debug print routines to direct
their output to the uart1 port on SiRFprimaII devices.
config DEBUG_SIRFATLAS7_UART0
bool "Kernel low-level debugging messages via SiRFatlas7 UART0"
depends on ARCH_ATLAS7
select DEBUG_SIRFSOC_UART
help
Say Y here if you want the debug print routines to direct
their output to the uart0 port on SiRFATLAS7 devices.The uart0
is used on SiRFATLAS7 as a extra debug port.sometimes an extra
debug port can be very useful.
config DEBUG_SIRFATLAS7_UART1
bool "Kernel low-level debugging messages via SiRFatlas7 UART1"
depends on ARCH_ATLAS7
select DEBUG_SIRFSOC_UART
help
Say Y here if you want the debug print routines to direct
their output to the uart1 port on SiRFATLAS7 devices.
config DEBUG_SPEAR3XX
bool "Kernel low-level debugging messages via ST SPEAr 3xx/6xx UART"
depends on ARCH_SPEAR3XX || ARCH_SPEAR6XX
select DEBUG_UART_PL01X
help
Say Y here if you want kernel low-level debugging support
on ST SPEAr based platforms.
config DEBUG_SPEAR13XX
bool "Kernel low-level debugging messages via ST SPEAr 13xx UART"
depends on ARCH_SPEAR13XX
select DEBUG_UART_PL01X
help
Say Y here if you want kernel low-level debugging support
on ST SPEAr13xx based platforms.
config STIH41X_DEBUG_ASC2
bool "Use StiH415/416 ASC2 UART for low-level debug"
depends on ARCH_STI
select DEBUG_STI_UART
help
Say Y here if you want kernel low-level debugging support
on STiH415/416 based platforms like b2000, which has
default UART wired up to ASC2.
If unsure, say N.
config STIH41X_DEBUG_SBC_ASC1
bool "Use StiH415/416 SBC ASC1 UART for low-level debug"
depends on ARCH_STI
select DEBUG_STI_UART
help
Say Y here if you want kernel low-level debugging support
on STiH415/416 based platforms like b2020. which has
default UART wired up to SBC ASC1.
If unsure, say N.
config TEGRA_DEBUG_UART_AUTO_ODMDATA
bool "Kernel low-level debugging messages via Tegra UART via ODMDATA"
depends on ARCH_TEGRA
@ -1018,54 +1129,6 @@ choice
Say Y here if you want kernel low-level debugging support
on Tegra based platforms.
config DEBUG_SIRFPRIMA2_UART1
bool "Kernel low-level debugging messages via SiRFprimaII UART1"
depends on ARCH_PRIMA2
select DEBUG_SIRFSOC_UART
help
Say Y here if you want the debug print routines to direct
their output to the uart1 port on SiRFprimaII devices.
config DEBUG_SIRFATLAS7_UART0
bool "Kernel low-level debugging messages via SiRFatlas7 UART0"
depends on ARCH_ATLAS7
select DEBUG_SIRFSOC_UART
help
Say Y here if you want the debug print routines to direct
their output to the uart0 port on SiRFATLAS7 devices.The uart0
is used on SiRFATLAS7 as a extra debug port.sometimes an extra
debug port can be very useful.
config DEBUG_SIRFATLAS7_UART1
bool "Kernel low-level debugging messages via SiRFatlas7 UART1"
depends on ARCH_ATLAS7
select DEBUG_SIRFSOC_UART
help
Say Y here if you want the debug print routines to direct
their output to the uart1 port on SiRFATLAS7 devices.
config STIH41X_DEBUG_ASC2
bool "Use StiH415/416 ASC2 UART for low-level debug"
depends on ARCH_STI
select DEBUG_STI_UART
help
Say Y here if you want kernel low-level debugging support
on STiH415/416 based platforms like b2000, which has
default UART wired up to ASC2.
If unsure, say N.
config STIH41X_DEBUG_SBC_ASC1
bool "Use StiH415/416 SBC ASC1 UART for low-level debug"
depends on ARCH_STI
select DEBUG_STI_UART
help
Say Y here if you want kernel low-level debugging support
on STiH415/416 based platforms like b2020. which has
default UART wired up to SBC ASC1.
If unsure, say N.
config DEBUG_U300_UART
bool "Kernel low-level debugging messages via U300 UART0"
depends on ARCH_U300
@ -1081,29 +1144,13 @@ choice
Say Y here if you want kernel low-level debugging support
on Ux500 based platforms.
config DEBUG_MT6589_UART0
bool "Mediatek mt6589 UART0"
depends on ARCH_MEDIATEK
select DEBUG_UART_8250
config DEBUG_VERSATILE
bool "Kernel low-level debugging messages via ARM Versatile UART"
depends on ARCH_VERSATILE
select DEBUG_UART_PL01X
help
Say Y here if you want kernel low-level debugging support
for Mediatek mt6589 based platforms on UART0.
config DEBUG_MT8127_UART0
bool "Mediatek mt8127/mt6592 UART0"
depends on ARCH_MEDIATEK
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
for Mediatek mt8127 based platforms on UART0.
config DEBUG_MT8135_UART3
bool "Mediatek mt8135 UART3"
depends on ARCH_MEDIATEK
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
for Mediatek mt8135 based platforms on UART3.
on ARM Versatile platforms.
config DEBUG_VEXPRESS_UART0_DETECT
bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
@ -1141,6 +1188,13 @@ choice
This option selects UART0 at 0xb0090000. This is appropriate for
Cortex-R series tiles and SMMs, such as Cortex-R5 and Cortex-R7
config DEBUG_VF_UART
bool "Vybrid UART"
depends on SOC_VF610
help
Say Y here if you want kernel low-level debugging support
on Vybrid based platforms.
config DEBUG_VT8500_UART0
bool "Use UART0 on VIA/Wondermedia SoCs"
depends on ARCH_VT8500
@ -1148,6 +1202,35 @@ choice
This option selects UART0 on VIA/Wondermedia System-on-a-chip
devices, including VT8500, WM8505, WM8650 and WM8850.
config DEBUG_ZTE_ZX
bool "Use ZTE ZX UART"
select DEBUG_UART_PL01X
depends on ARCH_ZX
help
Say Y here if you are enabling ZTE ZX296702 SOC and need
debug uart support.
This option is preferred over the platform specific
options; the platform specific options are deprecated
and will be soon removed.
config DEBUG_ZYNQ_UART0
bool "Kernel low-level debugging on Xilinx Zynq using UART0"
depends on ARCH_ZYNQ
help
Say Y here if you want the debug print routines to direct
their output to UART0 on the Zynq platform.
config DEBUG_ZYNQ_UART1
bool "Kernel low-level debugging on Xilinx Zynq using UART1"
depends on ARCH_ZYNQ
help
Say Y here if you want the debug print routines to direct
their output to UART1 on the Zynq platform.
If you have a ZC702 board and want early boot messages to
appear on the USB serial adaptor, select this option.
config DEBUG_ICEDCC
bool "Kernel low-level debugging via EmbeddedICE DCC channel"
help
@ -1175,18 +1258,6 @@ choice
For more details about semihosting, please see
chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd.
config DEBUG_ZTE_ZX
bool "Use ZTE ZX UART"
select DEBUG_UART_PL01X
depends on ARCH_ZX
help
Say Y here if you are enabling ZTE ZX296702 SOC and need
debug uart support.
This option is preferred over the platform specific
options; the platform specific options are deprecated
and will be soon removed.
config DEBUG_LL_UART_8250
bool "Kernel low-level debugging via 8250 UART"
help
@ -1239,6 +1310,9 @@ config DEBUG_S3C2410_UART
config DEBUG_S3C24XX_UART
bool
config DEBUG_S3C64XX_UART
bool
config DEBUG_S5PV210_UART
bool
@ -1294,6 +1368,7 @@ config DEBUG_LL_INCLUDE
default "debug/at91.S" if DEBUG_AT91_UART
default "debug/asm9260.S" if DEBUG_ASM9260_UART
default "debug/clps711x.S" if DEBUG_CLPS711X_UART1 || DEBUG_CLPS711X_UART2
default "debug/dc21285.S" if DEBUG_DC21285_PORT
default "debug/meson.S" if DEBUG_MESON_UARTAO
default "debug/pl01x.S" if DEBUG_LL_UART_PL01X || DEBUG_UART_PL01X
default "debug/exynos.S" if DEBUG_EXYNOS_UART
@ -1324,7 +1399,7 @@ config DEBUG_LL_INCLUDE
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA0
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA1
default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4
default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART
default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART || DEBUG_S3C64XX_UART
default "debug/s5pv210.S" if DEBUG_S5PV210_UART
default "debug/sirf.S" if DEBUG_SIRFSOC_UART
default "debug/sti.S" if DEBUG_STI_UART
@ -1344,11 +1419,9 @@ config DEBUG_UART_PL01X
# Compatibility options for 8250
config DEBUG_UART_8250
def_bool ARCH_DOVE || ARCH_EBSA110 || \
(FOOTBRIDGE && !DEBUG_DC21285_PORT) || \
ARCH_GEMINI || ARCH_IOP13XX || ARCH_IOP32X || \
ARCH_IOP33X || ARCH_IXP4XX || \
ARCH_LPC32XX || ARCH_MV78XX0 || ARCH_ORION5X || ARCH_RPC
def_bool ARCH_EBSA110 || \
ARCH_IOP13XX || ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX || \
ARCH_RPC
# Compatibility options for BCM63xx
config DEBUG_UART_BCM63XX
@ -1373,12 +1446,12 @@ config DEBUG_UART_PHYS
default 0x1010c000 if DEBUG_REALVIEW_PB1176_PORT
default 0x10124000 if DEBUG_RK3X_UART0
default 0x10126000 if DEBUG_RK3X_UART1
default 0x101f1000 if ARCH_VERSATILE
default 0x101f1000 if DEBUG_VERSATILE
default 0x101fb000 if DEBUG_NOMADIK_UART
default 0x11002000 if DEBUG_MT8127_UART0
default 0x11006000 if DEBUG_MT6589_UART0
default 0x11009000 if DEBUG_MT8135_UART3
default 0x16000000 if ARCH_INTEGRATOR
default 0x16000000 if DEBUG_INTEGRATOR
default 0x18000300 if DEBUG_BCM_5301X
default 0x18010000 if DEBUG_SIRFATLAS7_UART0
default 0x18020000 if DEBUG_SIRFATLAS7_UART1
@ -1391,9 +1464,9 @@ config DEBUG_UART_PHYS
default 0x3e000000 if DEBUG_BCM_KONA_UART
default 0x4000e400 if DEBUG_LL_UART_EFM32
default 0x40081000 if DEBUG_LPC18XX_UART0
default 0x40090000 if ARCH_LPC32XX
default 0x40090000 if DEBUG_LPC32XX
default 0x40100000 if DEBUG_PXA_UART1
default 0x42000000 if ARCH_GEMINI
default 0x42000000 if DEBUG_GEMINI
default 0x50000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
DEBUG_S3C2410_UART0)
default 0x50004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \
@ -1401,24 +1474,28 @@ config DEBUG_UART_PHYS
default 0x50008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \
DEBUG_S3C2410_UART2)
default 0x78000000 if DEBUG_CNS3XXX
default 0x7c0003f8 if FOOTBRIDGE
default 0x7c0003f8 if DEBUG_FOOTBRIDGE_COM1
default 0x7f005000 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART0
default 0x7f005400 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART1
default 0x7f005800 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART2
default 0x7f005c00 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART3
default 0x80010000 if DEBUG_ASM9260_UART
default 0x80070000 if DEBUG_IMX23_UART
default 0x80074000 if DEBUG_IMX28_UART
default 0x80230000 if DEBUG_PICOXCELL_UART
default 0x808c0000 if ARCH_EP93XX
default 0x808c0000 if DEBUG_EP93XX || ARCH_EP93XX
default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
default 0xb0060000 if DEBUG_SIRFPRIMA2_UART1
default 0xb0090000 if DEBUG_VEXPRESS_UART0_CRX
default 0xc0013000 if DEBUG_U300_UART
default 0xc8000000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
default 0xc8000003 if ARCH_IXP4XX && CPU_BIG_ENDIAN
default 0xd0000000 if ARCH_SPEAR3XX || ARCH_SPEAR6XX
default 0xd0000000 if DEBUG_SPEAR3XX
default 0xd0012000 if DEBUG_MVEBU_UART0
default 0xc81004c0 if DEBUG_MESON_UARTAO
default 0xd4017000 if DEBUG_MMP_UART2
default 0xd4018000 if DEBUG_MMP_UART3
default 0xe0000000 if ARCH_SPEAR13XX
default 0xe0000000 if DEBUG_SPEAR13XX
default 0xe4007000 if DEBUG_HIP04_UART
default 0xe6c40000 if DEBUG_RMOBILE_SCIFA0
default 0xe6c50000 if DEBUG_RMOBILE_SCIFA1
@ -1430,8 +1507,6 @@ config DEBUG_UART_PHYS
default 0xf040ab00 if DEBUG_BRCMSTB_UART
default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE
default 0xf1012100 if DEBUG_MVEBU_UART1_ALTERNATE
default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \
ARCH_ORION5X
default 0xf7fc9000 if DEBUG_BERLIN_UART
default 0xf8b00000 if DEBUG_HIX5HD2_UART
default 0xf991e000 if DEBUG_QCOM_UARTDM
@ -1460,6 +1535,7 @@ config DEBUG_UART_PHYS
DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF2 || \
DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \
DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \
DEBUG_S3C64XX_UART || \
DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART || \
DEBUG_SIRFSOC_UART || DEBUG_DIGICOLOR_UA0 || \
DEBUG_AT91_UART
@ -1476,17 +1552,22 @@ config DEBUG_UART_VIRT
default 0xf1002000 if DEBUG_MT8127_UART0
default 0xf1006000 if DEBUG_MT6589_UART0
default 0xf1009000 if DEBUG_MT8135_UART3
default 0xf11f1000 if ARCH_VERSATILE
default 0xf1600000 if ARCH_INTEGRATOR
default 0xf11f1000 if DEBUG_VERSATILE
default 0xf1600000 if DEBUG_INTEGRATOR
default 0xf1c28000 if DEBUG_SUNXI_UART0
default 0xf1c28400 if DEBUG_SUNXI_UART1
default 0xf1f02800 if DEBUG_SUNXI_R_UART
default 0xf31004c0 if DEBUG_MESON_UARTAO
default 0xf4090000 if DEBUG_LPC32XX
default 0xf4200000 if DEBUG_GEMINI
default 0xf6200000 if DEBUG_PXA_UART1
default 0xf4090000 if ARCH_LPC32XX
default 0xf4200000 if ARCH_GEMINI
default 0xf7000000 if DEBUG_SUN9I_UART0
default 0xf7000000 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART0
default 0xf7000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
DEBUG_S3C2410_UART0)
default 0xf7000400 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART1
default 0xf7000800 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART2
default 0xf7000c00 if DEBUG_S3C64XX_UART && DEBUG_S3C_UART3
default 0xf7004000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART1 || \
DEBUG_S3C2410_UART1)
default 0xf7008000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART2 || \
@ -1502,13 +1583,11 @@ config DEBUG_UART_VIRT
default 0xfc40ab00 if DEBUG_BRCMSTB_UART
default 0xfc705000 if DEBUG_ZTE_ZX
default 0xfcfe8600 if DEBUG_UART_BCM63XX
default 0xfd000000 if ARCH_SPEAR3XX || ARCH_SPEAR6XX
default 0xfd000000 if ARCH_SPEAR13XX
default 0xfd012000 if ARCH_MV78XX0
default 0xfd000000 if DEBUG_SPEAR3XX || DEBUG_SPEAR13XX
default 0xfd012000 if DEBUG_MVEBU_UART0_ALTERNATE && ARCH_MV78XX0
default 0xfd883000 if DEBUG_ALPINE_UART0
default 0xfde12000 if ARCH_DOVE
default 0xfe012000 if ARCH_ORION5X
default 0xf31004c0 if DEBUG_MESON_UARTAO
default 0xfde12000 if DEBUG_MVEBU_UART0_ALTERNATE && ARCH_DOVE
default 0xfe012000 if DEBUG_MVEBU_UART0_ALTERNATE && ARCH_ORION5X
default 0xfe017000 if DEBUG_MMP_UART2
default 0xfe018000 if DEBUG_MMP_UART3
default 0xfe100000 if DEBUG_IMX23_UART || DEBUG_IMX28_UART
@ -1522,7 +1601,7 @@ config DEBUG_UART_VIRT
default 0xfeb31000 if DEBUG_KEYSTONE_UART1
default 0xfec02000 if DEBUG_SOCFPGA_UART0
default 0xfec02100 if DEBUG_SOCFPGA_UART1
default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE
default 0xfec12000 if (DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE) && ARCH_MVEBU
default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE
default 0xfec10000 if DEBUG_SIRFATLAS7_UART0
default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0
@ -1534,8 +1613,8 @@ config DEBUG_UART_VIRT
default 0xfed60000 if DEBUG_RK29_UART0
default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
default 0xfedc0000 if ARCH_EP93XX
default 0xfee003f8 if FOOTBRIDGE
default 0xfedc0000 if DEBUG_EP93XX
default 0xfee003f8 if DEBUG_FOOTBRIDGE_COM1
default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART || DEBUG_NSPIRE_CX_UART
default 0xfee82340 if ARCH_IOP13XX
default 0xfef00000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
@ -1552,13 +1631,14 @@ config DEBUG_UART_VIRT
DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \
DEBUG_NETX_UART || \
DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \
DEBUG_S3C64XX_UART || \
DEBUG_UART_BCM63XX || DEBUG_ASM9260_UART || \
DEBUG_SIRFSOC_UART || DEBUG_DIGICOLOR_UA0
config DEBUG_UART_8250_SHIFT
int "Register offset shift for the 8250 debug UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
default 0 if FOOTBRIDGE || ARCH_IOP32X || DEBUG_BCM_5301X || \
default 0 if DEBUG_FOOTBRIDGE_COM1 || ARCH_IOP32X || DEBUG_BCM_5301X || \
DEBUG_OMAP7XXUART1 || DEBUG_OMAP7XXUART2 || DEBUG_OMAP7XXUART3
default 2
@ -1566,8 +1646,9 @@ config DEBUG_UART_8250_WORD
bool "Use 32-bit accesses for 8250 UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
depends on DEBUG_UART_8250_SHIFT >= 2
default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART0 || \
DEBUG_SOCFPGA_UART1 || ARCH_KEYSTONE || \
default y if DEBUG_PICOXCELL_UART || \
DEBUG_SOCFPGA_UART0 || DEBUG_SOCFPGA_UART1 || \
DEBUG_KEYSTONE_UART0 || DEBUG_KEYSTONE_UART1 || \
DEBUG_ALPINE_UART0 || \
DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \
DEBUG_DAVINCI_DA8XX_UART2 || \
@ -1577,7 +1658,7 @@ config DEBUG_UART_8250_WORD
config DEBUG_UART_8250_FLOW_CONTROL
bool "Enable flow control for 8250 UART"
depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250
default y if ARCH_EBSA110 || FOOTBRIDGE || ARCH_GEMINI || ARCH_RPC
default y if ARCH_EBSA110 || DEBUG_FOOTBRIDGE_COM1 || DEBUG_GEMINI || ARCH_RPC
config DEBUG_UNCOMPRESS
bool

1
arch/arm/configs/ep93xx_defconfig
View file

@ -132,6 +132,5 @@ CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_MUTEXES=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_LL_UART_PL01X=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_LIBCRC32C=y

1
arch/arm/configs/lpc32xx_defconfig
View file

@ -204,7 +204,6 @@ CONFIG_DEBUG_INFO=y
# CONFIG_FTRACE is not set
# CONFIG_ARM_UNWIND is not set
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_LL_UART_8250=y
CONFIG_EARLY_PRINTK=y
CONFIG_CRYPTO_ANSI_CPRNG=y
# CONFIG_CRYPTO_HW is not set

3
arch/arm/configs/multi_v7_defconfig
View file

@ -11,6 +11,9 @@ CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_CMDLINE_PARTITION=y
CONFIG_ARCH_MULTI_V7=y
# CONFIG_ARCH_MULTI_V5 is not set
# CONFIG_ARCH_MULTI_V4 is not set
CONFIG_ARCH_VIRT=y
CONFIG_ARCH_ALPINE=y
CONFIG_ARCH_MVEBU=y

4
arch/arm/configs/mv78xx0_defconfig
View file

@ -11,6 +11,9 @@ CONFIG_KPROBES=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_MULTI_V5=y
# CONFIG_ARCH_MULTI_V6 is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MV78XX0=y
CONFIG_MACH_DB78X00_BP=y
CONFIG_MACH_RD78X00_MASA=y
@ -132,7 +135,6 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_LL_UART_8250=y
CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_PCBC=m

4
arch/arm/configs/orion5x_defconfig
View file

@ -13,6 +13,9 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
CONFIG_BSD_DISKLABEL=y
CONFIG_ARCH_MULTI_V5=y
# CONFIG_ARCH_MULTI_V6 is not set
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_ORION5X=y
CONFIG_ARCH_ORION5X_DT=y
CONFIG_MACH_DB88F5281=y
@ -159,7 +162,6 @@ CONFIG_LATENCYTOP=y
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_LL_UART_8250=y
CONFIG_CRYPTO_CBC=m
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_PCBC=m

9
arch/arm/configs/realview-smp_defconfig
View file

@ -8,10 +8,19 @@ CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MULTI_V6=y
CONFIG_ARCH_REALVIEW=y
CONFIG_REALVIEW_DT=y
CONFIG_MACH_REALVIEW_EB=y
CONFIG_REALVIEW_EB_ARM1136=y
CONFIG_REALVIEW_EB_ARM1176=y
CONFIG_REALVIEW_EB_A9MP=y
CONFIG_REALVIEW_EB_ARM11MP=y
CONFIG_REALVIEW_EB_ARM11MP_REVB=y
CONFIG_MACH_REALVIEW_PB11MP=y
CONFIG_MACH_REALVIEW_PB1176=y
CONFIG_MACH_REALVIEW_PBA8=y
CONFIG_MACH_REALVIEW_PBX=y
CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
CONFIG_AEABI=y

8
arch/arm/configs/realview_defconfig
View file

@ -8,11 +8,19 @@ CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MULTI_V6=y
CONFIG_ARCH_REALVIEW=y
CONFIG_REALVIEW_DT=y
CONFIG_MACH_REALVIEW_EB=y
CONFIG_REALVIEW_EB_ARM1136=y
CONFIG_REALVIEW_EB_ARM1176=y
CONFIG_REALVIEW_EB_A9MP=y
CONFIG_REALVIEW_EB_ARM11MP=y
CONFIG_REALVIEW_EB_ARM11MP_REVB=y
CONFIG_MACH_REALVIEW_PB11MP=y
CONFIG_MACH_REALVIEW_PB1176=y
CONFIG_MACH_REALVIEW_PBA8=y
CONFIG_MACH_REALVIEW_PBX=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0

2
arch/arm/configs/s3c6400_defconfig
View file

@ -5,6 +5,8 @@ CONFIG_KALLSYMS_ALL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_MULTI_V6=y
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_S3C64XX=y
CONFIG_S3C_BOOT_ERROR_RESET=y
CONFIG_MACH_SMDK6400=y

3
arch/arm/configs/versatile_defconfig
View file

@ -6,8 +6,8 @@ CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_VERSATILE=y
CONFIG_MACH_VERSATILE_AB=y
CONFIG_AEABI=y
CONFIG_OABI_COMPAT=y
CONFIG_ZBOOT_ROM_TEXT=0x0
@ -82,6 +82,5 @@ CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_LL_UART_PL01X=y
CONFIG_FONTS=y
CONFIG_FONT_ACORN_8x8=y

22
arch/arm/include/asm/cputype.h
View file

@ -228,10 +228,26 @@ static inline int cpu_is_xsc3(void)
}
#endif
#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3)
#define cpu_is_xscale() 0
#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3) && \
!defined(CONFIG_CPU_MOHAWK)
#define cpu_is_xscale_family() 0
#else
#define cpu_is_xscale() 1
static inline int cpu_is_xscale_family(void)
{
unsigned int id;
id = read_cpuid_id() & 0xffffe000;
switch (id) {
case 0x69052000: /* Intel XScale 1 */
case 0x69054000: /* Intel XScale 2 */
case 0x69056000: /* Intel XScale 3 */
case 0x56056000: /* Marvell XScale 3 */
case 0x56158000: /* Marvell Mohawk */
return 1;
}
return 0;
}
#endif
/*

0
arch/arm/mach-footbridge/include/mach/debug-macro.S → arch/arm/include/debug/dc21285.S
View file

2
arch/arm/kernel/devtree.c
View file

@ -211,7 +211,7 @@ const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
{
const struct machine_desc *mdesc, *mdesc_best = NULL;
#ifdef CONFIG_ARCH_MULTIPLATFORM
#if defined(CONFIG_ARCH_MULTIPLATFORM) || defined(CONFIG_ARM_SINGLE_ARMV7M)
DT_MACHINE_START(GENERIC_DT, "Generic DT based system")
MACHINE_END

7
arch/arm/kernel/xscale-cp0.c
View file

@ -15,6 +15,9 @@
#include <linux/init.h>
#include <linux/io.h>
#include <asm/thread_notify.h>
#include <asm/cputype.h>
asm(" .arch armv5te\n");
static inline void dsp_save_state(u32 *state)
{
@ -152,6 +155,10 @@ static int __init xscale_cp0_init(void)
{
u32 cp_access;
/* do not attempt to probe iwmmxt on non-xscale family CPUs */
if (!cpu_is_xscale_family())
return 0;
cp_access = xscale_cp_access_read() & ~3;
xscale_cp_access_write(cp_access | 1);

2
arch/arm/mach-davinci/board-da830-evm.c
View file

@ -32,7 +32,7 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
#include <mach/cp_intc.h>
#include "cp_intc.h"
#include <mach/mux.h>
#include <mach/da8xx.h>

4
arch/arm/mach-davinci/board-da850-evm.c
View file

@ -40,10 +40,10 @@
#include <linux/spi/flash.h>
#include <mach/common.h>
#include <mach/cp_intc.h>
#include "cp_intc.h"
#include <mach/da8xx.h>
#include <mach/mux.h>
#include <mach/sram.h>
#include "sram.h"
#include <asm/mach-types.h>
#include <asm/mach/arch.h>

2
arch/arm/mach-davinci/board-mityomapl138.c
View file

@ -26,7 +26,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/common.h>
#include <mach/cp_intc.h>
#include "cp_intc.h"
#include <mach/da8xx.h>
#include <linux/platform_data/mtd-davinci.h>
#include <linux/platform_data/mtd-davinci-aemif.h>

2
arch/arm/mach-davinci/board-omapl138-hawk.c
View file

@ -19,7 +19,7 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
#include <mach/cp_intc.h>
#include "cp_intc.h"
#include <mach/da8xx.h>
#include <mach/mux.h>

2
arch/arm/mach-davinci/clock.c
View file

@ -23,7 +23,7 @@
#include <mach/hardware.h>
#include <mach/clock.h>
#include <mach/psc.h>
#include "psc.h"
#include <mach/cputype.h>
#include "clock.h"

2
arch/arm/mach-davinci/cp_intc.c
View file

@ -19,7 +19,7 @@
#include <linux/of_irq.h>
#include <mach/common.h>
#include <mach/cp_intc.h>
#include "cp_intc.h"
static inline unsigned int cp_intc_read(unsigned offset)
{

0
arch/arm/mach-davinci/include/mach/cp_intc.h → arch/arm/mach-davinci/cp_intc.h
View file

4
arch/arm/mach-davinci/cpuidle.c
View file

@ -19,8 +19,8 @@
#include <linux/export.h>
#include <asm/cpuidle.h>
#include <mach/cpuidle.h>
#include <mach/ddr2.h>
#include "cpuidle.h"
#include "ddr2.h"
#define DAVINCI_CPUIDLE_MAX_STATES 2

0
arch/arm/mach-davinci/include/mach/cpuidle.h → arch/arm/mach-davinci/cpuidle.h
View file

2
arch/arm/mach-davinci/da830.c
View file

@ -15,7 +15,7 @@
#include <asm/mach/map.h>
#include <mach/psc.h>
#include "psc.h"
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/common.h>

2
arch/arm/mach-davinci/da850.c
View file

@ -22,7 +22,7 @@
#include <asm/mach/map.h>
#include <mach/psc.h>
#include "psc.h"
#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/common.h>

2
arch/arm/mach-davinci/da8xx-dt.c
View file

@ -15,7 +15,7 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
#include <mach/cp_intc.h>
#include "cp_intc.h"
#include <mach/da8xx.h>
#define DA8XX_NUM_UARTS 3

0
arch/arm/mach-davinci/include/mach/ddr2.h → arch/arm/mach-davinci/ddr2.h
View file

4
arch/arm/mach-davinci/devices-da8xx.c
View file

@ -22,8 +22,8 @@
#include <mach/common.h>
#include <mach/time.h>
#include <mach/da8xx.h>
#include <mach/cpuidle.h>
#include <mach/sram.h>
#include "cpuidle.h"
#include "sram.h"
#include "clock.h"
#include "asp.h"

2
arch/arm/mach-davinci/dm355.c
View file

@ -21,7 +21,7 @@
#include <asm/mach/map.h>
#include <mach/cputype.h>
#include <mach/psc.h>
#include "psc.h"
#include <mach/mux.h>
#include <mach/irqs.h>
#include <mach/time.h>

2
arch/arm/mach-davinci/dm365.c
View file

@ -26,7 +26,7 @@
#include <asm/mach/map.h>
#include <mach/cputype.h>
#include <mach/psc.h>
#include "psc.h"
#include <mach/mux.h>
#include <mach/irqs.h>
#include <mach/time.h>

2
arch/arm/mach-davinci/dm644x.c
View file

@ -19,7 +19,7 @@
#include <mach/cputype.h>
#include <mach/irqs.h>
#include <mach/psc.h>
#include "psc.h"
#include <mach/mux.h>
#include <mach/time.h>
#include <mach/serial.h>

2
arch/arm/mach-davinci/dm646x.c
View file

@ -20,7 +20,7 @@
#include <mach/cputype.h>
#include <mach/irqs.h>
#include <mach/psc.h>
#include "psc.h"
#include <mach/mux.h>
#include <mach/time.h>
#include <mach/serial.h>

2
arch/arm/mach-davinci/pm.c
View file

@ -21,7 +21,7 @@
#include <mach/common.h>
#include <mach/da8xx.h>
#include <mach/sram.h>
#include "sram.h"
#include <mach/pm.h>
#include "clock.h"

2
arch/arm/mach-davinci/psc.c
View file

@ -23,7 +23,7 @@
#include <linux/io.h>
#include <mach/cputype.h>
#include <mach/psc.h>
#include "psc.h"
#include "clock.h"

0
arch/arm/mach-davinci/include/mach/psc.h → arch/arm/mach-davinci/psc.h
View file

4
arch/arm/mach-davinci/sleep.S
View file

@ -21,8 +21,8 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <mach/psc.h>
#include <mach/ddr2.h>
#include "psc.h"
#include "ddr2.h"
#include "clock.h"

2
arch/arm/mach-davinci/sram.c
View file

@ -14,7 +14,7 @@
#include <linux/genalloc.h>
#include <mach/common.h>
#include <mach/sram.h>
#include "sram.h"
static struct gen_pool *sram_pool;

0
arch/arm/mach-davinci/include/mach/sram.h → arch/arm/mach-davinci/sram.h
View file

1
arch/arm/mach-dove/cm-a510.c
View file

@ -88,6 +88,7 @@ static void __init cm_a510_init(void)
MACHINE_START(CM_A510, "Compulab CM-A510 Board")
.atag_offset = 0x100,
.nr_irqs = DOVE_NR_IRQS,
.init_machine = cm_a510_init,
.map_io = dove_map_io,
.init_early = dove_init_early,

43
arch/arm/mach-dove/common.c
View file

@ -16,6 +16,7 @@
#include <linux/platform_data/dma-mv_xor.h>
#include <linux/platform_data/usb-ehci-orion.h>
#include <linux/platform_device.h>
#include <linux/soc/dove/pmu.h>
#include <asm/hardware/cache-tauros2.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@ -375,6 +376,47 @@ void __init dove_setup_cpu_wins(void)
DOVE_SCRATCHPAD_SIZE);
}
static struct resource orion_wdt_resource[] = {
DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x04),
DEFINE_RES_MEM(RSTOUTn_MASK_PHYS, 0x04),
};
static struct platform_device orion_wdt_device = {
.name = "orion_wdt",
.id = -1,
.num_resources = ARRAY_SIZE(orion_wdt_resource),
.resource = orion_wdt_resource,
};
static void __init __maybe_unused orion_wdt_init(void)
{
platform_device_register(&orion_wdt_device);
}
static const struct dove_pmu_domain_initdata pmu_domains[] __initconst = {
{
.pwr_mask = PMU_PWR_VPU_PWR_DWN_MASK,
.rst_mask = PMU_SW_RST_VIDEO_MASK,
.iso_mask = PMU_ISO_VIDEO_MASK,
.name = "vpu-domain",
}, {
.pwr_mask = PMU_PWR_GPU_PWR_DWN_MASK,
.rst_mask = PMU_SW_RST_GPU_MASK,
.iso_mask = PMU_ISO_GPU_MASK,
.name = "gpu-domain",
}, {
/* sentinel */
},
};
static const struct dove_pmu_initdata pmu_data __initconst = {
.pmc_base = DOVE_PMU_VIRT_BASE,
.pmu_base = DOVE_PMU_VIRT_BASE + 0x8000,
.irq = IRQ_DOVE_PMU,
.irq_domain_start = IRQ_DOVE_PMU_START,
.domains = pmu_domains,
};
void __init dove_init(void)
{
pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
@ -389,6 +431,7 @@ void __init dove_init(void)
dove_clk_init();
/* internal devices that every board has */
dove_init_pmu_legacy(&pmu_data);
dove_rtc_init();
dove_xor0_init();
dove_xor1_init();

1
arch/arm/mach-dove/dove-db-setup.c
View file

@ -94,6 +94,7 @@ static void __init dove_db_init(void)
MACHINE_START(DOVE_DB, "Marvell DB-MV88AP510-BP Development Board")
.atag_offset = 0x100,
.nr_irqs = DOVE_NR_IRQS,
.init_machine = dove_db_init,
.map_io = dove_map_io,
.init_early = dove_init_early,

2
arch/arm/mach-dove/include/mach/dove.h
View file

@ -11,6 +11,8 @@
#ifndef __ASM_ARCH_DOVE_H
#define __ASM_ARCH_DOVE_H
#include <mach/irqs.h>
/*
* Marvell Dove address maps.
*

33
arch/arm/mach-dove/include/mach/entry-macro.S
View file

@ -1,33 +0,0 @@
/*
* arch/arm/mach-dove/include/mach/entry-macro.S
*
* Low-level IRQ helper macros for Marvell Dove platforms
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <mach/bridge-regs.h>
.macro get_irqnr_preamble, base, tmp
ldr \base, =IRQ_VIRT_BASE
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
@ check low interrupts
ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF]
ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
mov \irqnr, #32
ands \irqstat, \irqstat, \tmp
@ if no low interrupts set, check high interrupts
ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF]
moveq \irqnr, #64
andeqs \irqstat, \irqstat, \tmp
@ find first active interrupt source
clzne \irqstat, \irqstat
subne \irqnr, \irqnr, \irqstat
.endm

2
arch/arm/mach-dove/include/mach/irqs.h
View file

@ -90,7 +90,7 @@
#define NR_PMU_IRQS 7
#define IRQ_DOVE_RTC (IRQ_DOVE_PMU_START + 5)
#define NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS)
#define DOVE_NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS)
#endif

20
arch/arm/mach-dove/include/mach/pm.h
View file

@ -51,22 +51,14 @@
#define CLOCK_GATING_GIGA_PHY_MASK (1 << CLOCK_GATING_BIT_GIGA_PHY)
#define PMU_INTERRUPT_CAUSE (DOVE_PMU_VIRT_BASE + 0x50)
#define PMU_INTERRUPT_MASK (DOVE_PMU_VIRT_BASE + 0x54)
static inline int pmu_to_irq(int pin)
{
if (pin < NR_PMU_IRQS)
return pin + IRQ_DOVE_PMU_START;
#define PMU_SW_RST_VIDEO_MASK BIT(16)
#define PMU_SW_RST_GPU_MASK BIT(18)
return -EINVAL;
}
#define PMU_PWR_GPU_PWR_DWN_MASK BIT(2)
#define PMU_PWR_VPU_PWR_DWN_MASK BIT(3)
static inline int irq_to_pmu(int irq)
{
if (IRQ_DOVE_PMU_START <= irq && irq < NR_IRQS)
return irq - IRQ_DOVE_PMU_START;
return -EINVAL;
}
#define PMU_ISO_VIDEO_MASK BIT(0)
#define PMU_ISO_GPU_MASK BIT(1)
#endif

100
arch/arm/mach-dove/irq.c
View file

@ -7,87 +7,15 @@
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/io.h>
#include <asm/mach/arch.h>
#include <asm/exception.h>
#include <plat/irq.h>
#include <asm/mach/irq.h>
#include <mach/pm.h>
#include <mach/bridge-regs.h>
#include <plat/orion-gpio.h>
#include "common.h"
static void pmu_irq_mask(struct irq_data *d)
{
int pin = irq_to_pmu(d->irq);
u32 u;
u = readl(PMU_INTERRUPT_MASK);
u &= ~(1 << (pin & 31));
writel(u, PMU_INTERRUPT_MASK);
}
static void pmu_irq_unmask(struct irq_data *d)
{
int pin = irq_to_pmu(d->irq);
u32 u;
u = readl(PMU_INTERRUPT_MASK);
u |= 1 << (pin & 31);
writel(u, PMU_INTERRUPT_MASK);
}
static void pmu_irq_ack(struct irq_data *d)
{
int pin = irq_to_pmu(d->irq);
u32 u;
/*
* The PMU mask register is not RW0C: it is RW. This means that
* the bits take whatever value is written to them; if you write
* a '1', you will set the interrupt.
*
* Unfortunately this means there is NO race free way to clear
* these interrupts.
*
* So, let's structure the code so that the window is as small as
* possible.
*/
u = ~(1 << (pin & 31));
u &= readl_relaxed(PMU_INTERRUPT_CAUSE);
writel_relaxed(u, PMU_INTERRUPT_CAUSE);
}
static struct irq_chip pmu_irq_chip = {
.name = "pmu_irq",
.irq_mask = pmu_irq_mask,
.irq_unmask = pmu_irq_unmask,
.irq_ack = pmu_irq_ack,
};
static void pmu_irq_handler(struct irq_desc *desc)
{
unsigned long cause = readl(PMU_INTERRUPT_CAUSE);
unsigned int irq;
cause &= readl(PMU_INTERRUPT_MASK);
if (cause == 0) {
do_bad_IRQ(desc);
return;
}
for (irq = 0; irq < NR_PMU_IRQS; irq++) {
if (!(cause & (1 << irq)))
continue;
irq = pmu_to_irq(irq);
generic_handle_irq(irq);
}
}
static int __initdata gpio0_irqs[4] = {
IRQ_DOVE_GPIO_0_7,
IRQ_DOVE_GPIO_8_15,
@ -109,14 +37,6 @@ static int __initdata gpio2_irqs[4] = {
0,
};
#ifdef CONFIG_MULTI_IRQ_HANDLER
/*
* Compiling with both non-DT and DT support enabled, will
* break asm irq handler used by non-DT boards. Therefore,
* we provide a C-style irq handler even for non-DT boards,
* if MULTI_IRQ_HANDLER is set.
*/
static void __iomem *dove_irq_base = IRQ_VIRT_BASE;
static asmlinkage void
@ -139,18 +59,13 @@ __exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)
return;
}
}
#endif
void __init dove_init_irq(void)
{
int i;
orion_irq_init(1, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
orion_irq_init(33, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
#ifdef CONFIG_MULTI_IRQ_HANDLER
set_handle_irq(dove_legacy_handle_irq);
#endif
/*
* Initialize gpiolib for GPIOs 0-71.
@ -163,17 +78,4 @@ void __init dove_init_irq(void)
orion_gpio_init(NULL, 64, 8, DOVE_GPIO2_VIRT_BASE, 0,
IRQ_DOVE_GPIO_START + 64, gpio2_irqs);
/*
* Mask and clear PMU interrupts
*/
writel(0, PMU_INTERRUPT_MASK);
writel(0, PMU_INTERRUPT_CAUSE);
for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) {
irq_set_chip_and_handler(i, &pmu_irq_chip, handle_level_irq);
irq_set_status_flags(i, IRQ_LEVEL);
irq_clear_status_flags(i, IRQ_NOREQUEST);
}
irq_set_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler);
}

132
arch/arm/mach-integrator/Kconfig
View file

@ -1,4 +1,4 @@
config ARCH_INTEGRATOR
menuconfig ARCH_INTEGRATOR
bool "ARM Ltd. Integrator family"
depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V6
select ARM_AMBA
@ -24,8 +24,6 @@ config ARCH_INTEGRATOR
if ARCH_INTEGRATOR
menu "Integrator Options"
config ARCH_INTEGRATOR_AP
bool "Support Integrator/AP and Integrator/PP2 platforms"
select CLKSRC_MMIO
@ -37,19 +35,6 @@ config ARCH_INTEGRATOR_AP
Include support for the ARM(R) Integrator/AP and
Integrator/PP2 platforms.
config ARCH_INTEGRATOR_CP
bool "Support Integrator/CP platform"
select ARCH_CINTEGRATOR
select ARM_TIMER_SP804
select SERIAL_AMBA_PL011 if TTY
select SERIAL_AMBA_PL011_CONSOLE if TTY
select SOC_BUS
help
Include support for the ARM(R) Integrator CP platform.
config ARCH_CINTEGRATOR
bool
config INTEGRATOR_IMPD1
bool "Include support for Integrator/IM-PD1"
depends on ARCH_INTEGRATOR_AP
@ -64,6 +49,119 @@ config INTEGRATOR_IMPD1
To compile this driver as a module, choose M here: the
module will be called impd1.
endmenu
config INTEGRATOR_CM7TDMI
bool "Integrator/CM7TDMI core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V4 && !MMU
select CPU_ARM7TDMI
config INTEGRATOR_CM720T
bool "Integrator/CM720T core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V4T
select CPU_ARM720T
config INTEGRATOR_CM740T
bool "Integrator/CM740T core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V4T && !MMU
select CPU_ARM740T
config INTEGRATOR_CM920T
bool "Integrator/CM920T core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V4T
select CPU_ARM920T
config INTEGRATOR_CM922T_XA10
bool "Integrator/CM922T-XA10 core module"
depends on ARCH_MULTI_V4T
depends on ARCH_INTEGRATOR_AP
select CPU_ARM922T
config INTEGRATOR_CM926EJS
bool "Integrator/CM926EJ-S core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V5
select CPU_ARM926T
config INTEGRATOR_CM940T
bool "Integrator/CM940T core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V4T && !MMU
select CPU_ARM940T
config INTEGRATOR_CM946ES
bool "Integrator/CM946E-S core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V5 && !MMU
select CPU_ARM946E
config INTEGRATOR_CM966ES
bool "Integrator/CM966E-S core module"
depends on ARCH_INTEGRATOR_AP
depends on BROKEN # no kernel support
config INTEGRATOR_CM10200E_REV0
bool "Integrator/CM10200E rev.0 core module"
depends on ARCH_INTEGRATOR_AP && n
depends on ARCH_MULTI_V5
select CPU_ARM1020
config INTEGRATOR_CM10200E
bool "Integrator/CM10200E core module"
depends on ARCH_INTEGRATOR_AP && n
depends on ARCH_MULTI_V5
select CPU_ARM1020E
config INTEGRATOR_CM10220E
bool "Integrator/CM10220E core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V5
select CPU_ARM1022
config INTEGRATOR_CM1026EJS
bool "Integrator/CM1026EJ-S core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V5
select CPU_ARM1026
config INTEGRATOR_CM1136JFS
bool "Integrator/CM1136JF-S core module"
depends on ARCH_INTEGRATOR_AP
depends on ARCH_MULTI_V6
select CPU_V6
config ARCH_INTEGRATOR_CP
bool "Support Integrator/CP platform"
depends on (!MMU || ARCH_MULTI_V5 || ARCH_MULTI_V6)
select ARM_TIMER_SP804
select SERIAL_AMBA_PL011 if TTY
select SERIAL_AMBA_PL011_CONSOLE if TTY
select SOC_BUS
help
Include support for the ARM(R) Integrator CP platform.
config INTEGRATOR_CT7T
bool "Integrator/CT7TD (ARM7TDMI) core tile"
depends on ARCH_INTEGRATOR_CP
depends on ARCH_MULTI_V4T && !MMU
select CPU_ARM7TDMI
config INTEGRATOR_CT926
bool "Integrator/CT926 (ARM926EJ-S) core tile"
depends on ARCH_INTEGRATOR_CP
depends on ARCH_MULTI_V5
select CPU_ARM926T
config INTEGRATOR_CTB36
bool "Integrator/CTB36 (ARM1136JF-S) core tile"
depends on ARCH_INTEGRATOR_CP
depends on ARCH_MULTI_V6
select CPU_V6
config ARCH_CINTEGRATOR
depends on ARCH_INTEGRATOR_CP
def_bool y
endif

57
arch/arm/mach-iop13xx/include/mach/pci.h
View file

@ -1,57 +0,0 @@
#ifndef _IOP13XX_PCI_H_
#define _IOP13XX_PCI_H_
#include <linux/io.h>
#include <mach/irqs.h>
struct pci_sys_data;
struct hw_pci;
int iop13xx_pci_setup(int nr, struct pci_sys_data *sys);
struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *);
void iop13xx_atu_select(struct hw_pci *plat_pci);
void iop13xx_pci_init(void);
void iop13xx_map_pci_memory(void);
#define IOP_PCI_STATUS_ERROR (PCI_STATUS_PARITY | \
PCI_STATUS_SIG_TARGET_ABORT | \
PCI_STATUS_REC_TARGET_ABORT | \
PCI_STATUS_REC_TARGET_ABORT | \
PCI_STATUS_REC_MASTER_ABORT | \
PCI_STATUS_SIG_SYSTEM_ERROR | \
PCI_STATUS_DETECTED_PARITY)
#define IOP13XX_ATUE_ATUISR_ERROR (IOP13XX_ATUE_STAT_HALT_ON_ERROR | \
IOP13XX_ATUE_STAT_ROOT_SYS_ERR | \
IOP13XX_ATUE_STAT_PCI_IFACE_ERR | \
IOP13XX_ATUE_STAT_ERR_COR | \
IOP13XX_ATUE_STAT_ERR_UNCOR | \
IOP13XX_ATUE_STAT_CRS | \
IOP13XX_ATUE_STAT_DET_PAR_ERR | \
IOP13XX_ATUE_STAT_EXT_REC_MABORT | \
IOP13XX_ATUE_STAT_SIG_TABORT | \
IOP13XX_ATUE_STAT_EXT_REC_TABORT | \
IOP13XX_ATUE_STAT_MASTER_DATA_PAR)
#define IOP13XX_ATUX_ATUISR_ERROR (IOP13XX_ATUX_STAT_TX_SCEM | \
IOP13XX_ATUX_STAT_REC_SCEM | \
IOP13XX_ATUX_STAT_TX_SERR | \
IOP13XX_ATUX_STAT_DET_PAR_ERR | \
IOP13XX_ATUX_STAT_INT_REC_MABORT | \
IOP13XX_ATUX_STAT_REC_SERR | \
IOP13XX_ATUX_STAT_EXT_REC_MABORT | \
IOP13XX_ATUX_STAT_EXT_REC_TABORT | \
IOP13XX_ATUX_STAT_EXT_SIG_TABORT | \
IOP13XX_ATUX_STAT_MASTER_DATA_PAR)
/* PCI interrupts
*/
#define ATUX_INTA IRQ_IOP13XX_XINT0
#define ATUX_INTB IRQ_IOP13XX_XINT1
#define ATUX_INTC IRQ_IOP13XX_XINT2
#define ATUX_INTD IRQ_IOP13XX_XINT3
#define ATUE_INTA IRQ_IOP13XX_ATUE_IMA
#define ATUE_INTB IRQ_IOP13XX_ATUE_IMB
#define ATUE_INTC IRQ_IOP13XX_ATUE_IMC
#define ATUE_INTD IRQ_IOP13XX_ATUE_IMD
#endif /* _IOP13XX_PCI_H_ */

2
arch/arm/mach-iop13xx/iq81340mc.c
View file

@ -23,7 +23,7 @@
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/pci.h>
#include "pci.h"
#include <asm/mach/time.h>
#include <mach/time.h>

2
arch/arm/mach-iop13xx/iq81340sc.c
View file

@ -23,7 +23,7 @@
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/pci.h>
#include "pci.h"
#include <asm/mach/time.h>
#include <mach/time.h>

2
arch/arm/mach-iop13xx/irq.c
View file

@ -25,7 +25,7 @@
#include <asm/irq.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/msi.h>
#include "msi.h"
/* INTCTL0 CP6 R0 Page 4
*/

0
arch/arm/mach-iop13xx/include/mach/msi.h → arch/arm/mach-iop13xx/msi.h
View file

2
arch/arm/mach-iop13xx/pci.c
View file

@ -27,7 +27,7 @@
#include <asm/sizes.h>
#include <asm/signal.h>
#include <asm/mach/pci.h>
#include <mach/pci.h>
#include "pci.h"
#define IOP13XX_PCI_DEBUG 0
#define PRINTK(x...) ((void)(IOP13XX_PCI_DEBUG && printk(x)))

58
arch/arm/mach-iop13xx/pci.h
View file

@ -1,6 +1,64 @@
#ifndef _IOP13XX_PCI_H_
#define _IOP13XX_PCI_H_
#include <linux/io.h>
#include <mach/irqs.h>
#include <linux/types.h>
extern void __iomem *iop13xx_atue_mem_base;
extern void __iomem *iop13xx_atux_mem_base;
extern size_t iop13xx_atue_mem_size;
extern size_t iop13xx_atux_mem_size;
struct pci_sys_data;
struct hw_pci;
int iop13xx_pci_setup(int nr, struct pci_sys_data *sys);
struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *);
void iop13xx_atu_select(struct hw_pci *plat_pci);
void iop13xx_pci_init(void);
void iop13xx_map_pci_memory(void);
#define IOP_PCI_STATUS_ERROR (PCI_STATUS_PARITY | \
PCI_STATUS_SIG_TARGET_ABORT | \
PCI_STATUS_REC_TARGET_ABORT | \
PCI_STATUS_REC_TARGET_ABORT | \
PCI_STATUS_REC_MASTER_ABORT | \
PCI_STATUS_SIG_SYSTEM_ERROR | \
PCI_STATUS_DETECTED_PARITY)
#define IOP13XX_ATUE_ATUISR_ERROR (IOP13XX_ATUE_STAT_HALT_ON_ERROR | \
IOP13XX_ATUE_STAT_ROOT_SYS_ERR | \
IOP13XX_ATUE_STAT_PCI_IFACE_ERR | \
IOP13XX_ATUE_STAT_ERR_COR | \
IOP13XX_ATUE_STAT_ERR_UNCOR | \
IOP13XX_ATUE_STAT_CRS | \
IOP13XX_ATUE_STAT_DET_PAR_ERR | \
IOP13XX_ATUE_STAT_EXT_REC_MABORT | \
IOP13XX_ATUE_STAT_SIG_TABORT | \
IOP13XX_ATUE_STAT_EXT_REC_TABORT | \
IOP13XX_ATUE_STAT_MASTER_DATA_PAR)
#define IOP13XX_ATUX_ATUISR_ERROR (IOP13XX_ATUX_STAT_TX_SCEM | \
IOP13XX_ATUX_STAT_REC_SCEM | \
IOP13XX_ATUX_STAT_TX_SERR | \
IOP13XX_ATUX_STAT_DET_PAR_ERR | \
IOP13XX_ATUX_STAT_INT_REC_MABORT | \
IOP13XX_ATUX_STAT_REC_SERR | \
IOP13XX_ATUX_STAT_EXT_REC_MABORT | \
IOP13XX_ATUX_STAT_EXT_REC_TABORT | \
IOP13XX_ATUX_STAT_EXT_SIG_TABORT | \
IOP13XX_ATUX_STAT_MASTER_DATA_PAR)
/* PCI interrupts
*/
#define ATUX_INTA IRQ_IOP13XX_XINT0
#define ATUX_INTB IRQ_IOP13XX_XINT1
#define ATUX_INTC IRQ_IOP13XX_XINT2
#define ATUX_INTD IRQ_IOP13XX_XINT3
#define ATUE_INTA IRQ_IOP13XX_ATUE_IMA
#define ATUE_INTB IRQ_IOP13XX_ATUE_IMB
#define ATUE_INTC IRQ_IOP13XX_ATUE_IMC
#define ATUE_INTD IRQ_IOP13XX_ATUE_IMD
#endif /* _IOP13XX_PCI_H_ */

2
arch/arm/mach-ks8695/board-acs5k.c
View file

@ -33,7 +33,7 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/devices.h>
#include "devices.h"
#include <mach/gpio-ks8695.h>
#include "generic.h"

2
arch/arm/mach-ks8695/board-dsm320.c
View file

@ -28,7 +28,7 @@
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <mach/devices.h>
#include "devices.h"
#include <mach/gpio-ks8695.h>
#include "generic.h"

2
arch/arm/mach-ks8695/board-micrel.c
View file

@ -19,7 +19,7 @@
#include <asm/mach/irq.h>
#include <mach/gpio-ks8695.h>
#include <mach/devices.h>
#include "devices.h"
#include "generic.h"

2
arch/arm/mach-ks8695/board-og.c
View file

@ -18,7 +18,7 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/devices.h>
#include "devices.h"
#include <mach/regs-gpio.h>
#include <mach/gpio-ks8695.h>
#include "generic.h"

2
arch/arm/mach-ks8695/board-sg.c
View file

@ -16,7 +16,7 @@
#include <linux/mtd/partitions.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/devices.h>
#include "devices.h"
#include "generic.h"
/*

2
arch/arm/mach-ks8695/cpu.c
View file

@ -30,7 +30,7 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/regs-sys.h>
#include "regs-sys.h"
#include <mach/regs-misc.h>

6
arch/arm/mach-ks8695/devices.c
View file

@ -24,9 +24,9 @@
#include <linux/platform_device.h>
#include <mach/irqs.h>
#include <mach/regs-wan.h>
#include <mach/regs-lan.h>
#include <mach/regs-hpna.h>
#include "regs-wan.h"
#include "regs-lan.h"
#include "regs-hpna.h"
#include <mach/regs-switch.h>
#include <mach/regs-misc.h>

0
arch/arm/mach-ks8695/include/mach/devices.h → arch/arm/mach-ks8695/devices.h
View file

4
arch/arm/mach-ks8695/pci.c
View file

@ -33,8 +33,8 @@
#include <asm/mach/pci.h>
#include <mach/hardware.h>
#include <mach/devices.h>
#include <mach/regs-pci.h>
#include "devices.h"
#include "regs-pci.h"
static int pci_dbg;

0
arch/arm/mach-ks8695/include/mach/regs-hpna.h → arch/arm/mach-ks8695/regs-hpna.h
View file

0
arch/arm/mach-ks8695/include/mach/regs-lan.h → arch/arm/mach-ks8695/regs-lan.h
View file

0
arch/arm/mach-ks8695/include/mach/regs-mem.h → arch/arm/mach-ks8695/regs-mem.h
View file

0
arch/arm/mach-ks8695/include/mach/regs-pci.h → arch/arm/mach-ks8695/regs-pci.h
View file

0
arch/arm/mach-ks8695/include/mach/regs-sys.h → arch/arm/mach-ks8695/regs-sys.h
View file

0
arch/arm/mach-ks8695/include/mach/regs-wan.h → arch/arm/mach-ks8695/regs-wan.h
View file

34
arch/arm/mach-mmp/Kconfig
View file

@ -1,9 +1,22 @@
menuconfig ARCH_MMP
bool "Marvell PXA168/910/MMP2"
depends on ARCH_MULTI_V5 || ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB
select GPIO_PXA
select PINCTRL
select PLAT_PXA
help
Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
if ARCH_MMP
menu "Marvell PXA168/910/MMP2 Implmentations"
menu "Marvell PXA168/910/MMP2 Implementations"
if ATAGS
config MACH_ASPENITE
bool "Marvell's PXA168 Aspenite Development Board"
depends on ARCH_MULTI_V5
select CPU_PXA168
help
Say 'Y' here if you want to support the Marvell PXA168-based
@ -11,6 +24,7 @@ config MACH_ASPENITE
config MACH_ZYLONITE2
bool "Marvell's PXA168 Zylonite2 Development Board"
depends on ARCH_MULTI_V5
select CPU_PXA168
help
Say 'Y' here if you want to support the Marvell PXA168-based
@ -18,6 +32,7 @@ config MACH_ZYLONITE2
config MACH_AVENGERS_LITE
bool "Marvell's PXA168 Avengers Lite Development Board"
depends on ARCH_MULTI_V5
select CPU_PXA168
help
Say 'Y' here if you want to support the Marvell PXA168-based
@ -25,6 +40,7 @@ config MACH_AVENGERS_LITE
config MACH_TAVOREVB
bool "Marvell's PXA910 TavorEVB Development Board"
depends on ARCH_MULTI_V5
select CPU_PXA910
help
Say 'Y' here if you want to support the Marvell PXA910-based
@ -32,6 +48,7 @@ config MACH_TAVOREVB
config MACH_TTC_DKB
bool "Marvell's PXA910 TavorEVB Development Board"
depends on ARCH_MULTI_V5
select CPU_PXA910
help
Say 'Y' here if you want to support the Marvell PXA910-based
@ -39,7 +56,7 @@ config MACH_TTC_DKB
config MACH_BROWNSTONE
bool "Marvell's Brownstone Development Platform"
depends on !CPU_MOHAWK
depends on ARCH_MULTI_V7
select CPU_MMP2
help
Say 'Y' here if you want to support the Marvell MMP2-based
@ -50,7 +67,7 @@ config MACH_BROWNSTONE
config MACH_FLINT
bool "Marvell's Flint Development Platform"
depends on !CPU_MOHAWK
depends on ARCH_MULTI_V7
select CPU_MMP2
help
Say 'Y' here if you want to support the Marvell MMP2-based
@ -61,7 +78,7 @@ config MACH_FLINT
config MACH_MARVELL_JASPER
bool "Marvell's Jasper Development Platform"
depends on !CPU_MOHAWK
depends on ARCH_MULTI_V7
select CPU_MMP2
help
Say 'Y' here if you want to support the Marvell MMP2-base
@ -72,6 +89,7 @@ config MACH_MARVELL_JASPER
config MACH_TETON_BGA
bool "Marvell's PXA168 Teton BGA Development Board"
depends on ARCH_MULTI_V5
select CPU_PXA168
help
Say 'Y' here if you want to support the Marvell PXA168-based
@ -79,14 +97,16 @@ config MACH_TETON_BGA
config MACH_GPLUGD
bool "Marvell's PXA168 GuruPlug Display (gplugD) Board"
depends on ARCH_MULTI_V5
select CPU_PXA168
help
Say 'Y' here if you want to support the Marvell PXA168-based
GuruPlug Display (gplugD) Board
endif
config MACH_MMP_DT
bool "Support MMP (ARMv5) platforms from device tree"
select USE_OF
depends on ARCH_MULTI_V5
select PINCTRL
select PINCTRL_SINGLE
select COMMON_CLK
@ -99,11 +119,9 @@ config MACH_MMP_DT
config MACH_MMP2_DT
bool "Support MMP2 (ARMv7) platforms from device tree"
depends on !CPU_MOHAWK
select USE_OF
depends on ARCH_MULTI_V7
select PINCTRL
select PINCTRL_SINGLE
select COMMON_CLK
select ARCH_HAS_RESET_CONTROLLER
select CPU_PJ4
help

1
arch/arm/mach-mmp/Makefile
View file

@ -1,6 +1,7 @@
#
# Makefile for Marvell's PXA168 processors line
#
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-pxa/include
obj-y += common.o devices.o time.o

2
arch/arm/mach-mmp/include/mach/addr-map.h → arch/arm/mach-mmp/addr-map.h
View file

@ -1,6 +1,4 @@
/*
* linux/arch/arm/mach-mmp/include/mach/addr-map.h
*
* Common address map definitions
*
* This program is free software; you can redistribute it and/or modify

8
arch/arm/mach-mmp/aspenite.c
View file

@ -22,14 +22,14 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/addr-map.h>
#include <mach/mfp-pxa168.h>
#include <mach/pxa168.h>
#include <mach/irqs.h>
#include <video/pxa168fb.h>
#include <linux/input.h>
#include <linux/platform_data/keypad-pxa27x.h>
#include "addr-map.h"
#include "mfp-pxa168.h"
#include "pxa168.h"
#include "irqs.h"
#include "common.h"
static unsigned long common_pin_config[] __initdata = {

8
arch/arm/mach-mmp/avengers_lite.c
View file

@ -17,10 +17,10 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/addr-map.h>
#include <mach/mfp-pxa168.h>
#include <mach/pxa168.h>
#include <mach/irqs.h>
#include "addr-map.h"
#include "mfp-pxa168.h"
#include "pxa168.h"
#include "irqs.h"
#include "common.h"

8
arch/arm/mach-mmp/brownstone.c
View file

@ -22,10 +22,10 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/addr-map.h>
#include <mach/mfp-mmp2.h>
#include <mach/mmp2.h>
#include <mach/irqs.h>
#include "addr-map.h"
#include "mfp-mmp2.h"
#include "mmp2.h"
#include "irqs.h"
#include "common.h"

6
arch/arm/mach-mmp/clock-mmp2.c
View file

@ -4,8 +4,9 @@
#include <linux/list.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clk/mmp.h>
#include <mach/addr-map.h>
#include "addr-map.h"
#include "common.h"
#include "clock.h"
@ -105,7 +106,8 @@ static struct clk_lookup mmp2_clkregs[] = {
INIT_CLKREG(&clk_sdh3, "sdhci-pxav3.3", "PXA-SDHCLK"),
};
void __init mmp2_clk_init(void)
void __init mmp2_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
phys_addr_t apbc_phys)
{
clkdev_add_table(ARRAY_AND_SIZE(mmp2_clkregs));
}

6
arch/arm/mach-mmp/clock-pxa168.c
View file

@ -4,8 +4,9 @@
#include <linux/list.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clk/mmp.h>
#include <mach/addr-map.h>
#include "addr-map.h"
#include "common.h"
#include "clock.h"
@ -85,7 +86,8 @@ static struct clk_lookup pxa168_clkregs[] = {
INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
};
void __init pxa168_clk_init(void)
void __init pxa168_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
phys_addr_t apbc_phys)
{
clkdev_add_table(ARRAY_AND_SIZE(pxa168_clkregs));
}

6
arch/arm/mach-mmp/clock-pxa910.c
View file

@ -4,8 +4,9 @@
#include <linux/list.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/clk/mmp.h>
#include <mach/addr-map.h>
#include "addr-map.h"
#include "common.h"
#include "clock.h"
@ -61,7 +62,8 @@ static struct clk_lookup pxa910_clkregs[] = {
INIT_CLKREG(&clk_rtc, "sa1100-rtc", NULL),
};
void __init pxa910_clk_init(void)
void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
phys_addr_t apbc_phys, phys_addr_t apbcp_phys)
{
clkdev_add_table(ARRAY_AND_SIZE(pxa910_clkregs));
}

2
arch/arm/mach-mmp/clock.c
View file

@ -13,7 +13,7 @@
#include <linux/clk.h>
#include <linux/io.h>
#include <mach/regs-apbc.h>
#include "regs-apbc.h"
#include "clock.h"
static void apbc_clk_enable(struct clk *clk)

2
arch/arm/mach-mmp/clock.h
View file

@ -1,6 +1,4 @@
/*
* linux/arch/arm/mach-mmp/clock.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.

4
arch/arm/mach-mmp/common.c
View file

@ -15,8 +15,8 @@
#include <asm/page.h>
#include <asm/mach/map.h>
#include <asm/system_misc.h>
#include <mach/addr-map.h>
#include <mach/cputype.h>
#include "addr-map.h"
#include "cputype.h"
#include "common.h"

3
arch/arm/mach-mmp/common.h
View file

@ -5,6 +5,3 @@ extern void timer_init(int irq);
extern void __init mmp_map_io(void);
extern void mmp_restart(enum reboot_mode, const char *);
extern void __init pxa168_clk_init(void);
extern void __init pxa910_clk_init(void);
extern void __init mmp2_clk_init(void);

0
arch/arm/mach-mmp/include/mach/cputype.h → arch/arm/mach-mmp/cputype.h
View file

13
arch/arm/mach-mmp/devices.c
View file

@ -12,10 +12,10 @@
#include <linux/delay.h>
#include <asm/irq.h>
#include <mach/irqs.h>
#include <mach/devices.h>
#include <mach/cputype.h>
#include <mach/regs-usb.h>
#include "irqs.h"
#include "devices.h"
#include "cputype.h"
#include "regs-usb.h"
int __init pxa_register_device(struct pxa_device_desc *desc,
void *data, size_t size)
@ -73,6 +73,8 @@ int __init pxa_register_device(struct pxa_device_desc *desc,
}
#if IS_ENABLED(CONFIG_USB) || IS_ENABLED(CONFIG_USB_GADGET)
#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV)
#if IS_ENABLED(CONFIG_CPU_PXA910) || IS_ENABLED(CONFIG_CPU_PXA168)
/*****************************************************************************
* The registers read/write routines
@ -112,9 +114,6 @@ static void u2o_write(void __iomem *base, unsigned int offset,
readl_relaxed(base + offset);
}
#if IS_ENABLED(CONFIG_USB_MV_UDC) || IS_ENABLED(CONFIG_USB_EHCI_MV)
#if IS_ENABLED(CONFIG_CPU_PXA910) || IS_ENABLED(CONFIG_CPU_PXA168)
static DEFINE_MUTEX(phy_lock);
static int phy_init_cnt;

0
arch/arm/mach-mmp/include/mach/devices.h → arch/arm/mach-mmp/devices.h
View file

8
arch/arm/mach-mmp/flint.c
View file

@ -21,10 +21,10 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/addr-map.h>
#include <mach/mfp-mmp2.h>
#include <mach/mmp2.h>
#include <mach/irqs.h>
#include "addr-map.h"
#include "mfp-mmp2.h"
#include "mmp2.h"
#include "irqs.h"
#include "common.h"

6
arch/arm/mach-mmp/gplugd.c
View file

@ -16,9 +16,9 @@
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/irqs.h>
#include <mach/pxa168.h>
#include <mach/mfp-pxa168.h>
#include "irqs.h"
#include "pxa168.h"
#include "mfp-pxa168.h"
#include "common.h"

13
arch/arm/mach-mmp/include/mach/dma.h
View file

@ -1,13 +0,0 @@
/*
* linux/arch/arm/mach-mmp/include/mach/dma.h
*/
#ifndef __ASM_MACH_DMA_H
#define __ASM_MACH_DMA_H
#include <mach/addr-map.h>
#define DMAC_REGS_VIRT (APB_VIRT_BASE + 0x00000)
#include <plat/dma.h>
#endif /* __ASM_MACH_DMA_H */

4
arch/arm/mach-mmp/include/mach/hardware.h
View file

@ -1,4 +0,0 @@
#ifndef __ASM_MACH_HARDWARE_H
#define __ASM_MACH_HARDWARE_H
#endif /* __ASM_MACH_HARDWARE_H */

37
arch/arm/mach-mmp/include/mach/regs-smc.h
View file

@ -1,37 +0,0 @@
/*
* linux/arch/arm/mach-mmp/include/mach/regs-smc.h
*
* Static Memory Controller Registers
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_MACH_REGS_SMC_H
#define __ASM_MACH_REGS_SMC_H
#include <mach/addr-map.h>
#define SMC_VIRT_BASE (AXI_VIRT_BASE + 0x83800)
#define SMC_REG(x) (SMC_VIRT_BASE + (x))
#define SMC_MSC0 SMC_REG(0x0020)
#define SMC_MSC1 SMC_REG(0x0024)
#define SMC_SXCNFG0 SMC_REG(0x0030)
#define SMC_SXCNFG1 SMC_REG(0x0034)
#define SMC_MEMCLKCFG SMC_REG(0x0068)
#define SMC_CSDFICFG0 SMC_REG(0x0090)
#define SMC_CSDFICFG1 SMC_REG(0x0094)
#define SMC_CLK_RET_DEL SMC_REG(0x00b0)
#define SMC_ADV_RET_DEL SMC_REG(0x00b4)
#define SMC_CSADRMAP0 SMC_REG(0x00c0)
#define SMC_CSADRMAP1 SMC_REG(0x00c4)
#define SMC_WE_AP0 SMC_REG(0x00e0)
#define SMC_WE_AP1 SMC_REG(0x00e4)
#define SMC_OE_AP0 SMC_REG(0x00f0)
#define SMC_OE_AP1 SMC_REG(0x00f4)
#define SMC_ADV_AP0 SMC_REG(0x0100)
#define SMC_ADV_AP1 SMC_REG(0x0104)
#endif /* __ASM_MACH_REGS_SMC_H */

45
arch/arm/mach-mmp/include/mach/uncompress.h
View file

@ -1,45 +0,0 @@
/*
* arch/arm/mach-mmp/include/mach/uncompress.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/serial_reg.h>
#include <mach/addr-map.h>
#include <asm/mach-types.h>
#define UART1_BASE (APB_PHYS_BASE + 0x36000)
#define UART2_BASE (APB_PHYS_BASE + 0x17000)
#define UART3_BASE (APB_PHYS_BASE + 0x18000)
volatile unsigned long *UART;
static inline void putc(char c)
{
/* UART enabled? */
if (!(UART[UART_IER] & UART_IER_UUE))
return;
while (!(UART[UART_LSR] & UART_LSR_THRE))
barrier();
UART[UART_TX] = c;
}
/*
* This does not append a newline
*/
static inline void flush(void)
{
}
static inline void arch_decomp_setup(void)
{
/* default to UART2 */
UART = (unsigned long *)UART2_BASE;
if (machine_is_avengers_lite())
UART = (unsigned long *)UART3_BASE;
}

0
arch/arm/mach-mmp/include/mach/irqs.h → arch/arm/mach-mmp/irqs.h
View file

8
arch/arm/mach-mmp/jasper.c
View file

@ -20,12 +20,12 @@
#include <linux/mfd/max8925.h>
#include <linux/interrupt.h>
#include <mach/irqs.h>
#include "irqs.h"
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/addr-map.h>
#include <mach/mfp-mmp2.h>
#include <mach/mmp2.h>
#include "addr-map.h"
#include "mfp-mmp2.h"
#include "mmp2.h"
#include "common.h"

2
arch/arm/mach-mmp/include/mach/mfp-mmp2.h → arch/arm/mach-mmp/mfp-mmp2.h
View file

@ -1,7 +1,7 @@
#ifndef __ASM_MACH_MFP_MMP2_H
#define __ASM_MACH_MFP_MMP2_H
#include <mach/mfp.h>
#include "mfp.h"
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)

2
arch/arm/mach-mmp/include/mach/mfp-pxa168.h → arch/arm/mach-mmp/mfp-pxa168.h
View file

@ -1,7 +1,7 @@
#ifndef __ASM_MACH_MFP_PXA168_H
#define __ASM_MACH_MFP_PXA168_H
#include <mach/mfp.h>
#include "mfp.h"
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x1 << 13)

2
arch/arm/mach-mmp/include/mach/mfp-pxa910.h → arch/arm/mach-mmp/mfp-pxa910.h
View file

@ -1,7 +1,7 @@
#ifndef __ASM_MACH_MFP_PXA910_H
#define __ASM_MACH_MFP_PXA910_H
#include <mach/mfp.h>
#include "mfp.h"
#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
#define MFP_DRIVE_SLOW (0x2 << 13)

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