powerpc/powernv: Specialise pci_controller_ops for each controller type
Remove powernv generic PCI controller operations. Replace it with
controller ops for each of the two supported PHBs.
As an added bonus, make the two new structs const, which will help
guard against bugs such as the one introduced in 65ebf4b63
("powerpc/powernv: Move controller ops from ppc_md to controller_ops")
Signed-off-by: Daniel Axtens <dja@axtens.net>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
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1f88d5860e
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92ae035326
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@ -2648,6 +2648,17 @@ static void pnv_pci_ioda_shutdown(struct pnv_phb *phb)
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OPAL_ASSERT_RESET);
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}
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static const struct pci_controller_ops pnv_pci_ioda_controller_ops = {
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.dma_dev_setup = pnv_pci_dma_dev_setup,
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#ifdef CONFIG_PCI_MSI
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.setup_msi_irqs = pnv_setup_msi_irqs,
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.teardown_msi_irqs = pnv_teardown_msi_irqs,
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#endif
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.enable_device_hook = pnv_pci_enable_device_hook,
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.window_alignment = pnv_pci_window_alignment,
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.reset_secondary_bus = pnv_pci_reset_secondary_bus,
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};
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static void __init pnv_pci_init_ioda_phb(struct device_node *np,
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u64 hub_id, int ioda_type)
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{
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@ -2808,10 +2819,7 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
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* the child P2P bridges) can form individual PE.
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*/
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ppc_md.pcibios_fixup = pnv_pci_ioda_fixup;
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pnv_pci_controller_ops.enable_device_hook = pnv_pci_enable_device_hook;
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pnv_pci_controller_ops.window_alignment = pnv_pci_window_alignment;
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pnv_pci_controller_ops.reset_secondary_bus = pnv_pci_reset_secondary_bus;
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hose->controller_ops = pnv_pci_controller_ops;
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hose->controller_ops = pnv_pci_ioda_controller_ops;
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#ifdef CONFIG_PCI_IOV
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ppc_md.pcibios_fixup_sriov = pnv_pci_ioda_fixup_iov_resources;
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@ -95,6 +95,14 @@ static void pnv_pci_p5ioc2_dma_dev_setup(struct pnv_phb *phb,
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set_iommu_table_base_and_group(&pdev->dev, &phb->p5ioc2.iommu_table);
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}
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static const struct pci_controller_ops pnv_pci_p5ioc2_controller_ops = {
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.dma_dev_setup = pnv_pci_dma_dev_setup,
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#ifdef CONFIG_PCI_MSI
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.setup_msi_irqs = pnv_setup_msi_irqs,
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.teardown_msi_irqs = pnv_teardown_msi_irqs,
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#endif
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};
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static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np, u64 hub_id,
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void *tce_mem, u64 tce_size)
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{
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@ -133,7 +141,7 @@ static void __init pnv_pci_init_p5ioc2_phb(struct device_node *np, u64 hub_id,
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phb->hose->first_busno = 0;
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phb->hose->last_busno = 0xff;
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phb->hose->private_data = phb;
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phb->hose->controller_ops = pnv_pci_controller_ops;
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phb->hose->controller_ops = pnv_pci_p5ioc2_controller_ops;
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phb->hub_id = hub_id;
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phb->opal_id = phb_id;
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phb->type = PNV_PHB_P5IOC2;
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@ -45,7 +45,7 @@
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//#define cfg_dbg(fmt...) printk(fmt)
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#ifdef CONFIG_PCI_MSI
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static int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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{
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struct pci_controller *hose = pci_bus_to_host(pdev->bus);
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struct pnv_phb *phb = hose->private_data;
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@ -94,7 +94,7 @@ static int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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return 0;
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}
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static void pnv_teardown_msi_irqs(struct pci_dev *pdev)
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void pnv_teardown_msi_irqs(struct pci_dev *pdev)
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{
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struct pci_controller *hose = pci_bus_to_host(pdev->bus);
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struct pnv_phb *phb = hose->private_data;
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@ -662,7 +662,7 @@ void pnv_pci_setup_iommu_table(struct iommu_table *tbl,
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tbl->it_type = TCE_PCI;
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}
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static void pnv_pci_dma_dev_setup(struct pci_dev *pdev)
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void pnv_pci_dma_dev_setup(struct pci_dev *pdev)
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{
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struct pci_controller *hose = pci_bus_to_host(pdev->bus);
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struct pnv_phb *phb = hose->private_data;
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@ -771,11 +771,3 @@ void __init pnv_pci_init(void)
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}
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machine_subsys_initcall_sync(powernv, tce_iommu_bus_notifier_init);
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struct pci_controller_ops pnv_pci_controller_ops = {
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.dma_dev_setup = pnv_pci_dma_dev_setup,
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#ifdef CONFIG_PCI_MSI
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.setup_msi_irqs = pnv_setup_msi_irqs,
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.teardown_msi_irqs = pnv_teardown_msi_irqs,
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#endif
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};
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@ -218,4 +218,8 @@ extern void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,
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extern void pnv_pci_reset_secondary_bus(struct pci_dev *dev);
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extern int pnv_eeh_phb_reset(struct pci_controller *hose, int option);
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extern void pnv_pci_dma_dev_setup(struct pci_dev *pdev);
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extern int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type);
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extern void pnv_teardown_msi_irqs(struct pci_dev *pdev);
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#endif /* __POWERNV_PCI_H */
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@ -29,8 +29,6 @@ static inline u64 pnv_pci_dma_get_required_mask(struct pci_dev *pdev)
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}
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#endif
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extern struct pci_controller_ops pnv_pci_controller_ops;
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extern u32 pnv_get_supported_cpuidle_states(void);
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extern void pnv_lpc_init(void);
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