irqchip/atmel-aic5: Handle suspend to RAM
On sama5d2, VDD core may be cut while suspending to RAM. This means the AIC5 registers content is lost. Restore it at resume time. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -150,6 +150,8 @@ static int aic5_set_type(struct irq_data *d, unsigned type)
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}
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#ifdef CONFIG_PM
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static u32 *smr_cache;
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static void aic5_suspend(struct irq_data *d)
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{
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struct irq_domain *domain = d->domain;
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@ -159,6 +161,12 @@ static void aic5_suspend(struct irq_data *d)
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int i;
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u32 mask;
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if (smr_cache)
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for (i = 0; i < domain->revmap_size; i++) {
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irq_reg_writel(bgc, i, AT91_AIC5_SSR);
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smr_cache[i] = irq_reg_readl(bgc, AT91_AIC5_SMR);
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}
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irq_gc_lock(bgc);
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for (i = 0; i < dgc->irqs_per_chip; i++) {
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mask = 1 << i;
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@ -184,9 +192,21 @@ static void aic5_resume(struct irq_data *d)
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u32 mask;
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irq_gc_lock(bgc);
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if (smr_cache) {
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irq_reg_writel(bgc, 0xffffffff, AT91_AIC5_SPU);
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for (i = 0; i < domain->revmap_size; i++) {
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irq_reg_writel(bgc, i, AT91_AIC5_SSR);
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irq_reg_writel(bgc, i, AT91_AIC5_SVR);
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irq_reg_writel(bgc, smr_cache[i], AT91_AIC5_SMR);
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}
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}
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for (i = 0; i < dgc->irqs_per_chip; i++) {
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mask = 1 << i;
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if ((mask & gc->mask_cache) == (mask & gc->wake_active))
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if (!smr_cache &&
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((mask & gc->mask_cache) == (mask & gc->wake_active)))
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continue;
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irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR);
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@ -342,6 +362,13 @@ static int __init aic5_of_init(struct device_node *node,
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static int __init sama5d2_aic5_of_init(struct device_node *node,
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struct device_node *parent)
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{
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#ifdef CONFIG_PM
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smr_cache = kcalloc(DIV_ROUND_UP(NR_SAMA5D2_IRQS, 32) * 32,
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sizeof(*smr_cache), GFP_KERNEL);
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if (!smr_cache)
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return -ENOMEM;
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#endif
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return aic5_of_init(node, parent, NR_SAMA5D2_IRQS);
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}
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IRQCHIP_DECLARE(sama5d2_aic5, "atmel,sama5d2-aic", sama5d2_aic5_of_init);
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