Documentation: fpga: cleanup
Minor fixes including: * fix some typos * correct use of a/an * rephrase explanation of .state ops function * s/re-use/reuse/ (use only one spelling of 'reuse' in these docs) * s/cpu/CPU/ Signed-off-by: Alan Tull <atull@kernel.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -83,7 +83,7 @@ The programming sequence is::
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3. .write_complete
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The .write_init function will prepare the FPGA to receive the image data. The
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buffer passed into .write_init will be atmost .initial_header_size bytes long,
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buffer passed into .write_init will be at most .initial_header_size bytes long;
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if the whole bitstream is not immediately available then the core code will
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buffer up at least this much before starting.
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@ -98,9 +98,9 @@ scatter list. This interface is suitable for drivers which use DMA.
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The .write_complete function is called after all the image has been written
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to put the FPGA into operating mode.
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The ops include a .state function which will read the hardware FPGA manager and
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return a code of type enum fpga_mgr_states. It doesn't result in a change in
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hardware state.
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The ops include a .state function which will determine the state the FPGA is in
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and return a code of type enum fpga_mgr_states. It doesn't result in a change
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in state.
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How to write an image buffer to a supported FPGA
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------------------------------------------------
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@ -181,8 +181,8 @@ API for implementing a new FPGA Manager driver
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.. kernel-doc:: drivers/fpga/fpga-mgr.c
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:functions: fpga_mgr_unregister
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API for programming a FPGA
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--------------------------
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API for programming an FPGA
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---------------------------
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.. kernel-doc:: include/linux/fpga/fpga-mgr.h
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:functions: fpga_image_info
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@ -4,7 +4,7 @@ FPGA Region
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Overview
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--------
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This document is meant to be an brief overview of the FPGA region API usage. A
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This document is meant to be a brief overview of the FPGA region API usage. A
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more conceptual look at regions can be found in the Device Tree binding
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document [#f1]_.
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@ -31,11 +31,11 @@ fpga_image_info including:
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* pointers to the image as either a scatter-gather buffer, a contiguous
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buffer, or the name of firmware file
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* flags indicating specifics such as whether the image if for partial
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* flags indicating specifics such as whether the image is for partial
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reconfiguration.
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How to program a FPGA using a region
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------------------------------------
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How to program an FPGA using a region
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-------------------------------------
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First, allocate the info struct::
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@ -77,8 +77,8 @@ An example of usage can be seen in the probe function of [#f2]_.
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.. [#f1] ../devicetree/bindings/fpga/fpga-region.txt
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.. [#f2] ../../drivers/fpga/of-fpga-region.c
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API to program a FGPA
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---------------------
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API to program an FPGA
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----------------------
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.. kernel-doc:: drivers/fpga/fpga-region.c
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:functions: fpga_region_program_fpga
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@ -12,18 +12,18 @@ Linux. Some of the core intentions of the FPGA subsystems are:
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* Code should not be shared between upper and lower layers. This
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should go without saying. If that seems necessary, there's probably
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framework functionality that that can be added that will benefit
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framework functionality that can be added that will benefit
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other users. Write the linux-fpga mailing list and maintainers and
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seek out a solution that expands the framework for broad reuse.
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* Generally, when adding code, think of the future. Plan for re-use.
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* Generally, when adding code, think of the future. Plan for reuse.
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The framework in the kernel is divided into:
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FPGA Manager
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------------
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If you are adding a new FPGA or a new method of programming a FPGA,
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If you are adding a new FPGA or a new method of programming an FPGA,
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this is the subsystem for you. Low level FPGA manager drivers contain
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the knowledge of how to program a specific device. This subsystem
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includes the framework in fpga-mgr.c and the low level drivers that
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@ -32,10 +32,10 @@ are registered with it.
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FPGA Bridge
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-----------
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FPGA Bridges prevent spurious signals from going out of a FPGA or a
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region of a FPGA during programming. They are disabled before
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FPGA Bridges prevent spurious signals from going out of an FPGA or a
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region of an FPGA during programming. They are disabled before
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programming begins and re-enabled afterwards. An FPGA bridge may be
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actual hard hardware that gates a bus to a cpu or a soft ("freeze")
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actual hard hardware that gates a bus to a CPU or a soft ("freeze")
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bridge in FPGA fabric that surrounds a partial reconfiguration region
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of an FPGA. This subsystem includes fpga-bridge.c and the low level
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drivers that are registered with it.
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@ -44,7 +44,7 @@ FPGA Region
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-----------
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If you are adding a new interface to the FPGA framework, add it on top
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of a FPGA region to allow the most reuse of your interface.
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of an FPGA region to allow the most reuse of your interface.
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The FPGA Region framework (fpga-region.c) associates managers and
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bridges as reconfigurable regions. A region may refer to the whole
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