irqchip: GICv3: ITS: MSI support
Now, the bit of code that allow us to use the ITS as a MSI controller. Both MSI and MSI-X are supported. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1416839720-18400-10-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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@ -587,12 +587,47 @@ static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
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return IRQ_SET_MASK_OK_DONE;
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}
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static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg)
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{
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struct its_device *its_dev = irq_data_get_irq_chip_data(d);
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struct its_node *its;
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u64 addr;
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its = its_dev->its;
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addr = its->phys_base + GITS_TRANSLATER;
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msg->address_lo = addr & ((1UL << 32) - 1);
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msg->address_hi = addr >> 32;
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msg->data = its_get_event_id(d);
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}
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static struct irq_chip its_irq_chip = {
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.name = "ITS",
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.irq_mask = its_mask_irq,
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.irq_unmask = its_unmask_irq,
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.irq_eoi = its_eoi_irq,
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.irq_set_affinity = its_set_affinity,
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.irq_compose_msi_msg = its_irq_compose_msi_msg,
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};
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static void its_mask_msi_irq(struct irq_data *d)
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{
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pci_msi_mask_irq(d);
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irq_chip_mask_parent(d);
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}
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static void its_unmask_msi_irq(struct irq_data *d)
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{
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pci_msi_unmask_irq(d);
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irq_chip_unmask_parent(d);
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}
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static struct irq_chip its_msi_irq_chip = {
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.name = "ITS-MSI",
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.irq_unmask = its_unmask_msi_irq,
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.irq_mask = its_mask_msi_irq,
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.irq_eoi = irq_chip_eoi_parent,
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.irq_write_msi_msg = pci_msi_domain_write_msg,
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};
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/*
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@ -1055,3 +1090,144 @@ static void its_free_device(struct its_device *its_dev)
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kfree(its_dev->itt);
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kfree(its_dev);
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}
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static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq)
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{
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int idx;
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idx = find_first_zero_bit(dev->lpi_map, dev->nr_lpis);
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if (idx == dev->nr_lpis)
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return -ENOSPC;
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*hwirq = dev->lpi_base + idx;
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set_bit(idx, dev->lpi_map);
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/* Map the GIC irq ID to the device */
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its_send_mapvi(dev, *hwirq, idx);
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return 0;
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}
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static int its_msi_prepare(struct irq_domain *domain, struct device *dev,
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int nvec, msi_alloc_info_t *info)
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{
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struct pci_dev *pdev;
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struct its_node *its;
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u32 dev_id;
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struct its_device *its_dev;
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if (!dev_is_pci(dev))
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return -EINVAL;
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pdev = to_pci_dev(dev);
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dev_id = PCI_DEVID(pdev->bus->number, pdev->devfn);
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its = domain->parent->host_data;
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its_dev = its_find_device(its, dev_id);
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if (WARN_ON(its_dev))
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return -EINVAL;
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its_dev = its_create_device(its, dev_id, nvec);
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if (!its_dev)
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return -ENOMEM;
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dev_dbg(&pdev->dev, "ITT %d entries, %d bits\n", nvec, ilog2(nvec));
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info->scratchpad[0].ptr = its_dev;
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info->scratchpad[1].ptr = dev;
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return 0;
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}
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static struct msi_domain_ops its_pci_msi_ops = {
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.msi_prepare = its_msi_prepare,
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};
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static struct msi_domain_info its_pci_msi_domain_info = {
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.flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
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MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX),
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.ops = &its_pci_msi_ops,
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.chip = &its_msi_irq_chip,
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};
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static int its_irq_gic_domain_alloc(struct irq_domain *domain,
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unsigned int virq,
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irq_hw_number_t hwirq)
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{
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struct of_phandle_args args;
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args.np = domain->parent->of_node;
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args.args_count = 3;
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args.args[0] = GIC_IRQ_TYPE_LPI;
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args.args[1] = hwirq;
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args.args[2] = IRQ_TYPE_EDGE_RISING;
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return irq_domain_alloc_irqs_parent(domain, virq, 1, &args);
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}
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static int its_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *args)
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{
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msi_alloc_info_t *info = args;
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struct its_device *its_dev = info->scratchpad[0].ptr;
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irq_hw_number_t hwirq;
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int err;
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int i;
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for (i = 0; i < nr_irqs; i++) {
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err = its_alloc_device_irq(its_dev, &hwirq);
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if (err)
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return err;
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err = its_irq_gic_domain_alloc(domain, virq + i, hwirq);
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if (err)
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return err;
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irq_domain_set_hwirq_and_chip(domain, virq + i,
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hwirq, &its_irq_chip, its_dev);
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dev_dbg(info->scratchpad[1].ptr, "ID:%d pID:%d vID:%d\n",
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(int)(hwirq - its_dev->lpi_base), (int)hwirq, virq + i);
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}
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return 0;
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}
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static void its_irq_domain_free(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs)
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{
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struct irq_data *d = irq_domain_get_irq_data(domain, virq);
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struct its_device *its_dev = irq_data_get_irq_chip_data(d);
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int i;
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for (i = 0; i < nr_irqs; i++) {
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struct irq_data *data = irq_domain_get_irq_data(domain,
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virq + i);
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int event = its_get_event_id(data);
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/* Stop the delivery of interrupts */
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its_send_discard(its_dev, event);
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/* Mark interrupt index as unused */
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clear_bit(event, its_dev->lpi_map);
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/* Nuke the entry in the domain */
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irq_domain_reset_irq_data(d);
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}
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/* If all interrupts have been freed, start mopping the floor */
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if (bitmap_empty(its_dev->lpi_map, its_dev->nr_lpis)) {
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its_lpi_free(its_dev->lpi_map,
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its_dev->lpi_base,
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its_dev->nr_lpis);
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/* Unmap device/itt */
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its_send_mapd(its_dev, 0);
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its_free_device(its_dev);
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}
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irq_domain_free_irqs_parent(domain, virq, nr_irqs);
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}
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static const struct irq_domain_ops its_domain_ops = {
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.alloc = its_irq_domain_alloc,
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.free = its_irq_domain_free,
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};
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@ -295,6 +295,12 @@
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#include <linux/stringify.h>
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/*
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* We need a value to serve as a irq-type for LPIs. Choose one that will
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* hopefully pique the interest of the reviewer.
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*/
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#define GIC_IRQ_TYPE_LPI 0xa110c8ed
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struct rdists {
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struct {
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void __iomem *rd_base;
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