Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 and PTI fixes from Ingo Molnar: "Misc fixes: - fix EFI pagetables freeing - fix vsyscall pagetable setting on Xen PV guests - remove ancient CONFIG_X86_PPRO_FENCE=y - x86 is TSO again - fix two binutils (ld) development version related incompatibilities - clean up breakpoint handling - fix an x86 self-test" * 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/entry/64: Don't use IST entry for #BP stack x86/efi: Free efi_pgd with free_pages() x86/vsyscall/64: Use proper accessor to update P4D entry x86/cpu: Remove the CONFIG_X86_PPRO_FENCE=y quirk x86/boot/64: Verify alignment of the LOAD segment x86/build/64: Force the linker to use 2MB page size selftests/x86/ptrace_syscall: Fix for yet more glibc interference
This commit is contained in:
commit
d2862360bf
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@ -315,19 +315,6 @@ config X86_L1_CACHE_SHIFT
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default "4" if MELAN || M486 || MGEODEGX1
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default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
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config X86_PPRO_FENCE
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bool "PentiumPro memory ordering errata workaround"
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depends on M686 || M586MMX || M586TSC || M586 || M486 || MGEODEGX1
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---help---
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Old PentiumPro multiprocessor systems had errata that could cause
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memory operations to violate the x86 ordering standard in rare cases.
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Enabling this option will attempt to work around some (but not all)
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occurrences of this problem, at the cost of much heavier spinlock and
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memory barrier operations.
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If unsure, say n here. Even distro kernels should think twice before
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enabling this: there are few systems, and an unlikely bug.
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config X86_F00F_BUG
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def_bool y
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depends on M586MMX || M586TSC || M586 || M486
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@ -223,6 +223,15 @@ KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr)
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LDFLAGS := -m elf_$(UTS_MACHINE)
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#
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# The 64-bit kernel must be aligned to 2MB. Pass -z max-page-size=0x200000 to
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# the linker to force 2MB page size regardless of the default page size used
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# by the linker.
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#
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ifdef CONFIG_X86_64
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LDFLAGS += $(call ld-option, -z max-page-size=0x200000)
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endif
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# Speed up the build
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KBUILD_CFLAGS += -pipe
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# Workaround for a gcc prelease that unfortunately was shipped in a suse release
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@ -309,6 +309,10 @@ static void parse_elf(void *output)
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switch (phdr->p_type) {
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case PT_LOAD:
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#ifdef CONFIG_X86_64
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if ((phdr->p_align % 0x200000) != 0)
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error("Alignment of LOAD segment isn't multiple of 2MB");
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#endif
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#ifdef CONFIG_RELOCATABLE
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dest = output;
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dest += (phdr->p_paddr - LOAD_PHYSICAL_ADDR);
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@ -1138,7 +1138,7 @@ apicinterrupt3 HYPERV_REENLIGHTENMENT_VECTOR \
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#endif /* CONFIG_HYPERV */
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idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
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idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
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idtentry int3 do_int3 has_error_code=0
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idtentry stack_segment do_stack_segment has_error_code=1
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#ifdef CONFIG_XEN
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@ -5,8 +5,6 @@
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#undef CONFIG_OPTIMIZE_INLINING
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#endif
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#undef CONFIG_X86_PPRO_FENCE
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#ifdef CONFIG_X86_64
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/*
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@ -347,7 +347,7 @@ void __init set_vsyscall_pgtable_user_bits(pgd_t *root)
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set_pgd(pgd, __pgd(pgd_val(*pgd) | _PAGE_USER));
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p4d = p4d_offset(pgd, VSYSCALL_ADDR);
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#if CONFIG_PGTABLE_LEVELS >= 5
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p4d->p4d |= _PAGE_USER;
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set_p4d(p4d, __p4d(p4d_val(*p4d) | _PAGE_USER));
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#endif
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pud = pud_offset(p4d, VSYSCALL_ADDR);
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set_pud(pud, __pud(pud_val(*pud) | _PAGE_USER));
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@ -52,11 +52,7 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
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#define barrier_nospec() alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC, \
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"lfence", X86_FEATURE_LFENCE_RDTSC)
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#ifdef CONFIG_X86_PPRO_FENCE
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#define dma_rmb() rmb()
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#else
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#define dma_rmb() barrier()
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#endif
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#define dma_wmb() barrier()
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#ifdef CONFIG_X86_32
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@ -68,30 +64,6 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
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#define __smp_wmb() barrier()
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#define __smp_store_mb(var, value) do { (void)xchg(&var, value); } while (0)
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#if defined(CONFIG_X86_PPRO_FENCE)
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/*
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* For this option x86 doesn't have a strong TSO memory
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* model and we should fall back to full barriers.
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*/
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#define __smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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__smp_mb(); \
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WRITE_ONCE(*p, v); \
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} while (0)
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#define __smp_load_acquire(p) \
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({ \
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typeof(*p) ___p1 = READ_ONCE(*p); \
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compiletime_assert_atomic_type(*p); \
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__smp_mb(); \
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___p1; \
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})
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#else /* regular x86 TSO memory ordering */
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#define __smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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___p1; \
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})
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#endif
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/* Atomic operations are already serializing on x86 */
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#define __smp_mb__before_atomic() barrier()
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#define __smp_mb__after_atomic() barrier()
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@ -232,21 +232,6 @@ extern void set_iounmap_nonlazy(void);
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*/
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#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
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/*
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* Cache management
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*
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* This needed for two cases
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* 1. Out of order aware processors
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* 2. Accidentally out of order processors (PPro errata #51)
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*/
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static inline void flush_write_buffers(void)
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{
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#if defined(CONFIG_X86_PPRO_FENCE)
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asm volatile("lock; addl $0,0(%%esp)": : :"memory");
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#endif
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}
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#endif /* __KERNEL__ */
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extern void native_io_delay(void);
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@ -160,7 +160,6 @@ static const __initconst struct idt_data early_pf_idts[] = {
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*/
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static const __initconst struct idt_data dbg_idts[] = {
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INTG(X86_TRAP_DB, debug),
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INTG(X86_TRAP_BP, int3),
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};
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#endif
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@ -183,7 +182,6 @@ gate_desc debug_idt_table[IDT_ENTRIES] __page_aligned_bss;
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static const __initconst struct idt_data ist_idts[] = {
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ISTG(X86_TRAP_DB, debug, DEBUG_STACK),
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ISTG(X86_TRAP_NMI, nmi, NMI_STACK),
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SISTG(X86_TRAP_BP, int3, DEBUG_STACK),
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ISTG(X86_TRAP_DF, double_fault, DOUBLEFAULT_STACK),
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#ifdef CONFIG_X86_MCE
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ISTG(X86_TRAP_MC, &machine_check, MCE_STACK),
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@ -37,7 +37,6 @@ static dma_addr_t nommu_map_page(struct device *dev, struct page *page,
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WARN_ON(size == 0);
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if (!check_addr("map_single", dev, bus, size))
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return NOMMU_MAPPING_ERROR;
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flush_write_buffers();
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return bus;
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}
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@ -72,25 +71,9 @@ static int nommu_map_sg(struct device *hwdev, struct scatterlist *sg,
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return 0;
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s->dma_length = s->length;
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}
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flush_write_buffers();
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return nents;
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}
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static void nommu_sync_single_for_device(struct device *dev,
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dma_addr_t addr, size_t size,
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enum dma_data_direction dir)
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{
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flush_write_buffers();
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}
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static void nommu_sync_sg_for_device(struct device *dev,
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struct scatterlist *sg, int nelems,
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enum dma_data_direction dir)
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{
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flush_write_buffers();
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}
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static int nommu_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return dma_addr == NOMMU_MAPPING_ERROR;
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.free = dma_generic_free_coherent,
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.map_sg = nommu_map_sg,
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.map_page = nommu_map_page,
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.sync_single_for_device = nommu_sync_single_for_device,
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.sync_sg_for_device = nommu_sync_sg_for_device,
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.is_phys = 1,
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.mapping_error = nommu_mapping_error,
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.dma_supported = x86_dma_supported,
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@ -577,7 +577,6 @@ do_general_protection(struct pt_regs *regs, long error_code)
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}
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NOKPROBE_SYMBOL(do_general_protection);
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/* May run on IST stack. */
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dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
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{
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#ifdef CONFIG_DYNAMIC_FTRACE
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if (poke_int3_handler(regs))
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return;
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/*
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* Use ist_enter despite the fact that we don't use an IST stack.
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* We can be called from a kprobe in non-CONTEXT_KERNEL kernel
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* mode or even during context tracking state changes.
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*
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* This means that we can't schedule. That's okay.
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*/
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ist_enter(regs);
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RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
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#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
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SIGTRAP) == NOTIFY_STOP)
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goto exit;
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/*
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* Let others (NMI) know that the debug stack is in use
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* as we may switch to the interrupt stack.
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*/
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debug_stack_usage_inc();
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cond_local_irq_enable(regs);
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do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
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cond_local_irq_disable(regs);
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debug_stack_usage_dec();
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exit:
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ist_exit(regs);
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}
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@ -227,7 +227,7 @@ int __init efi_alloc_page_tables(void)
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if (!pud) {
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if (CONFIG_PGTABLE_LEVELS > 4)
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free_page((unsigned long) pgd_page_vaddr(*pgd));
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free_page((unsigned long)efi_pgd);
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free_pages((unsigned long)efi_pgd, PGD_ALLOCATION_ORDER);
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return -ENOMEM;
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}
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@ -30,11 +30,7 @@
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#endif /* CONFIG_X86_32 */
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#ifdef CONFIG_X86_PPRO_FENCE
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#define dma_rmb() rmb()
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#else /* CONFIG_X86_PPRO_FENCE */
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#define dma_rmb() barrier()
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#endif /* CONFIG_X86_PPRO_FENCE */
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#define dma_wmb() barrier()
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#include <asm-generic/barrier.h>
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@ -183,8 +183,10 @@ static void test_ptrace_syscall_restart(void)
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if (ptrace(PTRACE_TRACEME, 0, 0, 0) != 0)
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err(1, "PTRACE_TRACEME");
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pid_t pid = getpid(), tid = syscall(SYS_gettid);
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printf("\tChild will make one syscall\n");
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raise(SIGSTOP);
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syscall(SYS_tgkill, pid, tid, SIGSTOP);
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syscall(SYS_gettid, 10, 11, 12, 13, 14, 15);
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_exit(0);
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@ -301,9 +303,11 @@ static void test_restart_under_ptrace(void)
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if (ptrace(PTRACE_TRACEME, 0, 0, 0) != 0)
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err(1, "PTRACE_TRACEME");
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pid_t pid = getpid(), tid = syscall(SYS_gettid);
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printf("\tChild will take a nap until signaled\n");
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setsigign(SIGUSR1, SA_RESTART);
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raise(SIGSTOP);
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syscall(SYS_tgkill, pid, tid, SIGSTOP);
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syscall(SYS_pause, 0, 0, 0, 0, 0, 0);
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_exit(0);
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