scsi: csiostor: add support for 32 bit port capabilities
32 bit port capabilities are required to support new speeds which can not be supported using 16 bit port capabilities. Signed-off-by: Varun Prakash <varun@chelsio.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Varun Prakash
Martin K. Petersen
parent
1929e82e37
commit
e1735d9a98
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@ -274,12 +274,24 @@ csio_get_host_speed(struct Scsi_Host *shost)
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spin_lock_irq(&hw->lock);
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switch (hw->pport[ln->portid].link_speed) {
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case FW_PORT_CAP_SPEED_1G:
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case FW_PORT_CAP32_SPEED_1G:
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fc_host_speed(shost) = FC_PORTSPEED_1GBIT;
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break;
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case FW_PORT_CAP_SPEED_10G:
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case FW_PORT_CAP32_SPEED_10G:
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fc_host_speed(shost) = FC_PORTSPEED_10GBIT;
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break;
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case FW_PORT_CAP32_SPEED_25G:
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fc_host_speed(shost) = FC_PORTSPEED_25GBIT;
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break;
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case FW_PORT_CAP32_SPEED_40G:
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fc_host_speed(shost) = FC_PORTSPEED_40GBIT;
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break;
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case FW_PORT_CAP32_SPEED_50G:
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fc_host_speed(shost) = FC_PORTSPEED_50GBIT;
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break;
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case FW_PORT_CAP32_SPEED_100G:
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fc_host_speed(shost) = FC_PORTSPEED_100GBIT;
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break;
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default:
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fc_host_speed(shost) = FC_PORTSPEED_UNKNOWN;
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break;
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@ -1409,6 +1409,235 @@ out:
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return rv;
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}
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static inline enum cc_fec fwcap_to_cc_fec(fw_port_cap32_t fw_fec)
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{
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enum cc_fec cc_fec = 0;
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if (fw_fec & FW_PORT_CAP32_FEC_RS)
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cc_fec |= FEC_RS;
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if (fw_fec & FW_PORT_CAP32_FEC_BASER_RS)
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cc_fec |= FEC_BASER_RS;
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return cc_fec;
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}
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static inline fw_port_cap32_t cc_to_fwcap_pause(enum cc_pause cc_pause)
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{
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fw_port_cap32_t fw_pause = 0;
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if (cc_pause & PAUSE_RX)
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fw_pause |= FW_PORT_CAP32_FC_RX;
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if (cc_pause & PAUSE_TX)
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fw_pause |= FW_PORT_CAP32_FC_TX;
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return fw_pause;
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}
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static inline fw_port_cap32_t cc_to_fwcap_fec(enum cc_fec cc_fec)
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{
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fw_port_cap32_t fw_fec = 0;
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if (cc_fec & FEC_RS)
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fw_fec |= FW_PORT_CAP32_FEC_RS;
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if (cc_fec & FEC_BASER_RS)
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fw_fec |= FW_PORT_CAP32_FEC_BASER_RS;
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return fw_fec;
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}
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/**
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* fwcap_to_fwspeed - return highest speed in Port Capabilities
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* @acaps: advertised Port Capabilities
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*
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* Get the highest speed for the port from the advertised Port
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* Capabilities.
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*/
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fw_port_cap32_t fwcap_to_fwspeed(fw_port_cap32_t acaps)
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{
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#define TEST_SPEED_RETURN(__caps_speed) \
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do { \
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if (acaps & FW_PORT_CAP32_SPEED_##__caps_speed) \
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return FW_PORT_CAP32_SPEED_##__caps_speed; \
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} while (0)
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TEST_SPEED_RETURN(400G);
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TEST_SPEED_RETURN(200G);
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TEST_SPEED_RETURN(100G);
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TEST_SPEED_RETURN(50G);
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TEST_SPEED_RETURN(40G);
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TEST_SPEED_RETURN(25G);
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TEST_SPEED_RETURN(10G);
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TEST_SPEED_RETURN(1G);
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TEST_SPEED_RETURN(100M);
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#undef TEST_SPEED_RETURN
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return 0;
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}
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/**
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* fwcaps16_to_caps32 - convert 16-bit Port Capabilities to 32-bits
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* @caps16: a 16-bit Port Capabilities value
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*
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* Returns the equivalent 32-bit Port Capabilities value.
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*/
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fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16)
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{
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fw_port_cap32_t caps32 = 0;
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#define CAP16_TO_CAP32(__cap) \
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do { \
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if (caps16 & FW_PORT_CAP_##__cap) \
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caps32 |= FW_PORT_CAP32_##__cap; \
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} while (0)
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CAP16_TO_CAP32(SPEED_100M);
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CAP16_TO_CAP32(SPEED_1G);
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CAP16_TO_CAP32(SPEED_25G);
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CAP16_TO_CAP32(SPEED_10G);
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CAP16_TO_CAP32(SPEED_40G);
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CAP16_TO_CAP32(SPEED_100G);
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CAP16_TO_CAP32(FC_RX);
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CAP16_TO_CAP32(FC_TX);
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CAP16_TO_CAP32(ANEG);
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CAP16_TO_CAP32(MDIX);
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CAP16_TO_CAP32(MDIAUTO);
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CAP16_TO_CAP32(FEC_RS);
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CAP16_TO_CAP32(FEC_BASER_RS);
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CAP16_TO_CAP32(802_3_PAUSE);
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CAP16_TO_CAP32(802_3_ASM_DIR);
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#undef CAP16_TO_CAP32
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return caps32;
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}
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/**
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* lstatus_to_fwcap - translate old lstatus to 32-bit Port Capabilities
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* @lstatus: old FW_PORT_ACTION_GET_PORT_INFO lstatus value
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*
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* Translates old FW_PORT_ACTION_GET_PORT_INFO lstatus field into new
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* 32-bit Port Capabilities value.
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*/
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fw_port_cap32_t lstatus_to_fwcap(u32 lstatus)
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{
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fw_port_cap32_t linkattr = 0;
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/* The format of the Link Status in the old
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* 16-bit Port Information message isn't the same as the
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* 16-bit Port Capabilities bitfield used everywhere else.
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*/
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if (lstatus & FW_PORT_CMD_RXPAUSE_F)
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linkattr |= FW_PORT_CAP32_FC_RX;
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if (lstatus & FW_PORT_CMD_TXPAUSE_F)
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linkattr |= FW_PORT_CAP32_FC_TX;
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if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100M))
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linkattr |= FW_PORT_CAP32_SPEED_100M;
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if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_1G))
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linkattr |= FW_PORT_CAP32_SPEED_1G;
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if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_10G))
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linkattr |= FW_PORT_CAP32_SPEED_10G;
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if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_25G))
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linkattr |= FW_PORT_CAP32_SPEED_25G;
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if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_40G))
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linkattr |= FW_PORT_CAP32_SPEED_40G;
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if (lstatus & FW_PORT_CMD_LSPEED_V(FW_PORT_CAP_SPEED_100G))
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linkattr |= FW_PORT_CAP32_SPEED_100G;
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return linkattr;
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}
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/**
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* csio_init_link_config - initialize a link's SW state
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* @lc: pointer to structure holding the link state
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* @pcaps: link Port Capabilities
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* @acaps: link current Advertised Port Capabilities
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*
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* Initializes the SW state maintained for each link, including the link's
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* capabilities and default speed/flow-control/autonegotiation settings.
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*/
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static void csio_init_link_config(struct link_config *lc, fw_port_cap32_t pcaps,
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fw_port_cap32_t acaps)
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{
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lc->pcaps = pcaps;
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lc->def_acaps = acaps;
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lc->lpacaps = 0;
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lc->speed_caps = 0;
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lc->speed = 0;
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lc->requested_fc = PAUSE_RX | PAUSE_TX;
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lc->fc = lc->requested_fc;
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/*
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* For Forward Error Control, we default to whatever the Firmware
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* tells us the Link is currently advertising.
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*/
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lc->requested_fec = FEC_AUTO;
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lc->fec = fwcap_to_cc_fec(lc->def_acaps);
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/* If the Port is capable of Auto-Negtotiation, initialize it as
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* "enabled" and copy over all of the Physical Port Capabilities
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* to the Advertised Port Capabilities. Otherwise mark it as
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* Auto-Negotiate disabled and select the highest supported speed
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* for the link. Note parallel structure in t4_link_l1cfg_core()
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* and t4_handle_get_port_info().
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*/
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if (lc->pcaps & FW_PORT_CAP32_ANEG) {
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lc->acaps = lc->pcaps & ADVERT_MASK;
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lc->autoneg = AUTONEG_ENABLE;
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lc->requested_fc |= PAUSE_AUTONEG;
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} else {
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lc->acaps = 0;
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lc->autoneg = AUTONEG_DISABLE;
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}
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}
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static void csio_link_l1cfg(struct link_config *lc, uint16_t fw_caps,
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uint32_t *rcaps)
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{
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unsigned int fw_mdi = FW_PORT_CAP32_MDI_V(FW_PORT_CAP32_MDI_AUTO);
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fw_port_cap32_t fw_fc, cc_fec, fw_fec, lrcap;
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lc->link_ok = 0;
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/*
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* Convert driver coding of Pause Frame Flow Control settings into the
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* Firmware's API.
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*/
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fw_fc = cc_to_fwcap_pause(lc->requested_fc);
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/*
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* Convert Common Code Forward Error Control settings into the
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* Firmware's API. If the current Requested FEC has "Automatic"
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* (IEEE 802.3) specified, then we use whatever the Firmware
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* sent us as part of it's IEEE 802.3-based interpratation of
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* the Transceiver Module EPROM FEC parameters. Otherwise we
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* use whatever is in the current Requested FEC settings.
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*/
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if (lc->requested_fec & FEC_AUTO)
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cc_fec = fwcap_to_cc_fec(lc->def_acaps);
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else
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cc_fec = lc->requested_fec;
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fw_fec = cc_to_fwcap_fec(cc_fec);
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/* Figure out what our Requested Port Capabilities are going to be.
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* Note parallel structure in t4_handle_get_port_info() and
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* init_link_config().
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*/
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if (!(lc->pcaps & FW_PORT_CAP32_ANEG)) {
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lrcap = (lc->pcaps & ADVERT_MASK) | fw_fc | fw_fec;
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lc->fc = lc->requested_fc & ~PAUSE_AUTONEG;
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lc->fec = cc_fec;
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} else if (lc->autoneg == AUTONEG_DISABLE) {
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lrcap = lc->speed_caps | fw_fc | fw_fec | fw_mdi;
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lc->fc = lc->requested_fc & ~PAUSE_AUTONEG;
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lc->fec = cc_fec;
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} else {
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lrcap = lc->acaps | fw_fc | fw_fec | fw_mdi;
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}
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*rcaps = lrcap;
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}
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/*
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* csio_enable_ports - Bring up all available ports.
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* @hw: HW module.
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@ -1418,8 +1647,10 @@ static int
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csio_enable_ports(struct csio_hw *hw)
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{
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struct csio_mb *mbp;
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u16 fw_caps = FW_CAPS_UNKNOWN;
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enum fw_retval retval;
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uint8_t portid;
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fw_port_cap32_t pcaps, acaps, rcaps;
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int i;
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mbp = mempool_alloc(hw->mb_mempool, GFP_ATOMIC);
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@ -1431,9 +1662,39 @@ csio_enable_ports(struct csio_hw *hw)
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for (i = 0; i < hw->num_pports; i++) {
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portid = hw->pport[i].portid;
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if (fw_caps == FW_CAPS_UNKNOWN) {
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u32 param, val;
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param = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_PFVF) |
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FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_PFVF_PORT_CAPS32));
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val = 1;
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csio_mb_params(hw, mbp, CSIO_MB_DEFAULT_TMO,
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hw->pfn, 0, 1, ¶m, &val, false,
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NULL);
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if (csio_mb_issue(hw, mbp)) {
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csio_err(hw, "failed to issue FW_PARAMS_CMD(r) port:%d\n",
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portid);
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mempool_free(mbp, hw->mb_mempool);
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return -EINVAL;
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}
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csio_mb_process_read_params_rsp(hw, mbp, &retval, 1,
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&val);
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if (retval != FW_SUCCESS) {
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csio_err(hw, "FW_PARAMS_CMD(r) port:%d failed: 0x%x\n",
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portid, retval);
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mempool_free(mbp, hw->mb_mempool);
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return -EINVAL;
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}
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fw_caps = val;
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}
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/* Read PORT information */
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csio_mb_port(hw, mbp, CSIO_MB_DEFAULT_TMO, portid,
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false, 0, 0, NULL);
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false, 0, fw_caps, NULL);
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if (csio_mb_issue(hw, mbp)) {
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csio_err(hw, "failed to issue FW_PORT_CMD(r) port:%d\n",
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@ -1442,8 +1703,8 @@ csio_enable_ports(struct csio_hw *hw)
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return -EINVAL;
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}
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csio_mb_process_read_port_rsp(hw, mbp, &retval,
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&hw->pport[i].pcap);
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csio_mb_process_read_port_rsp(hw, mbp, &retval, fw_caps,
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&pcaps, &acaps);
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if (retval != FW_SUCCESS) {
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csio_err(hw, "FW_PORT_CMD(r) port:%d failed: 0x%x\n",
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portid, retval);
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@ -1451,9 +1712,13 @@ csio_enable_ports(struct csio_hw *hw)
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return -EINVAL;
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}
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csio_init_link_config(&hw->pport[i].link_cfg, pcaps, acaps);
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csio_link_l1cfg(&hw->pport[i].link_cfg, fw_caps, &rcaps);
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/* Write back PORT information */
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csio_mb_port(hw, mbp, CSIO_MB_DEFAULT_TMO, portid, true,
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(PAUSE_RX | PAUSE_TX), hw->pport[i].pcap, NULL);
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csio_mb_port(hw, mbp, CSIO_MB_DEFAULT_TMO, portid,
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true, rcaps, fw_caps, NULL);
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if (csio_mb_issue(hw, mbp)) {
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csio_err(hw, "failed to issue FW_PORT_CMD(w) port:%d\n",
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@ -268,8 +268,62 @@ struct csio_vpd {
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uint8_t id[ID_LEN + 1];
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};
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/* Firmware Port Capabilities types. */
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typedef u16 fw_port_cap16_t; /* 16-bit Port Capabilities integral value */
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typedef u32 fw_port_cap32_t; /* 32-bit Port Capabilities integral value */
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enum fw_caps {
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FW_CAPS_UNKNOWN = 0, /* 0'ed out initial state */
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FW_CAPS16 = 1, /* old Firmware: 16-bit Port Capabilities */
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FW_CAPS32 = 2, /* new Firmware: 32-bit Port Capabilities */
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};
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enum cc_pause {
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PAUSE_RX = 1 << 0,
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PAUSE_TX = 1 << 1,
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PAUSE_AUTONEG = 1 << 2
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};
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enum cc_fec {
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FEC_AUTO = 1 << 0, /* IEEE 802.3 "automatic" */
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FEC_RS = 1 << 1, /* Reed-Solomon */
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FEC_BASER_RS = 1 << 2 /* BaseR/Reed-Solomon */
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};
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struct link_config {
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fw_port_cap32_t pcaps; /* link capabilities */
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fw_port_cap32_t def_acaps; /* default advertised capabilities */
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fw_port_cap32_t acaps; /* advertised capabilities */
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fw_port_cap32_t lpacaps; /* peer advertised capabilities */
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fw_port_cap32_t speed_caps; /* speed(s) user has requested */
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unsigned int speed; /* actual link speed (Mb/s) */
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enum cc_pause requested_fc; /* flow control user has requested */
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enum cc_pause fc; /* actual link flow control */
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enum cc_fec requested_fec; /* Forward Error Correction: */
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enum cc_fec fec; /* requested and actual in use */
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unsigned char autoneg; /* autonegotiating? */
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unsigned char link_ok; /* link up? */
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unsigned char link_down_rc; /* link down reason */
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};
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#define FW_LEN16(fw_struct) FW_CMD_LEN16_V(sizeof(fw_struct) / 16)
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#define ADVERT_MASK (FW_PORT_CAP32_SPEED_V(FW_PORT_CAP32_SPEED_M) | \
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FW_PORT_CAP32_ANEG)
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/* Enable or disable autonegotiation. */
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#define AUTONEG_DISABLE 0x00
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#define AUTONEG_ENABLE 0x01
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struct csio_pport {
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uint16_t pcap;
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uint16_t acap;
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uint8_t portid;
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uint8_t link_status;
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uint16_t link_speed;
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@ -278,6 +332,7 @@ struct csio_pport {
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uint8_t rsvd1;
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uint8_t rsvd2;
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uint8_t rsvd3;
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struct link_config link_cfg;
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};
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/* fcoe resource information */
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@ -582,6 +637,10 @@ int csio_hw_slow_intr_handler(struct csio_hw *);
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int csio_handle_intr_status(struct csio_hw *, unsigned int,
|
||||
const struct intr_info *);
|
||||
|
||||
fw_port_cap32_t fwcap_to_fwspeed(fw_port_cap32_t acaps);
|
||||
fw_port_cap32_t fwcaps16_to_caps32(fw_port_cap16_t caps16);
|
||||
fw_port_cap32_t lstatus_to_fwcap(u32 lstatus);
|
||||
|
||||
int csio_hw_start(struct csio_hw *);
|
||||
int csio_hw_stop(struct csio_hw *);
|
||||
int csio_hw_reset(struct csio_hw *);
|
||||
|
|
|
|||
|
|
@ -352,6 +352,14 @@ csio_ln_fdmi_rhba_cbfn(struct csio_hw *hw, struct csio_ioreq *fdmi_req)
|
|||
val = htonl(FC_PORTSPEED_1GBIT);
|
||||
else if (hw->pport[ln->portid].link_speed == FW_PORT_CAP_SPEED_10G)
|
||||
val = htonl(FC_PORTSPEED_10GBIT);
|
||||
else if (hw->pport[ln->portid].link_speed == FW_PORT_CAP32_SPEED_25G)
|
||||
val = htonl(FC_PORTSPEED_25GBIT);
|
||||
else if (hw->pport[ln->portid].link_speed == FW_PORT_CAP32_SPEED_40G)
|
||||
val = htonl(FC_PORTSPEED_40GBIT);
|
||||
else if (hw->pport[ln->portid].link_speed == FW_PORT_CAP32_SPEED_50G)
|
||||
val = htonl(FC_PORTSPEED_50GBIT);
|
||||
else if (hw->pport[ln->portid].link_speed == FW_PORT_CAP32_SPEED_100G)
|
||||
val = htonl(FC_PORTSPEED_100GBIT);
|
||||
else
|
||||
val = htonl(CSIO_HBA_PORTSPEED_UNKNOWN);
|
||||
csio_append_attrib(&pld, FC_FDMI_PORT_ATTR_CURRENTPORTSPEED,
|
||||
|
|
|
|||
|
|
@ -326,10 +326,6 @@ csio_mb_caps_config(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo,
|
|||
cmdp->fcoecaps |= htons(FW_CAPS_CONFIG_FCOE_TARGET);
|
||||
}
|
||||
|
||||
#define CSIO_ADVERT_MASK (FW_PORT_CAP_SPEED_100M | FW_PORT_CAP_SPEED_1G |\
|
||||
FW_PORT_CAP_SPEED_10G | FW_PORT_CAP_SPEED_40G |\
|
||||
FW_PORT_CAP_ANEG)
|
||||
|
||||
/*
|
||||
* csio_mb_port- FW PORT command helper
|
||||
* @hw: The HW structure
|
||||
|
|
@ -344,11 +340,10 @@ csio_mb_caps_config(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo,
|
|||
*/
|
||||
void
|
||||
csio_mb_port(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo,
|
||||
uint8_t portid, bool wr, uint32_t fc, uint16_t caps,
|
||||
u8 portid, bool wr, uint32_t fc, uint16_t fw_caps,
|
||||
void (*cbfn) (struct csio_hw *, struct csio_mb *))
|
||||
{
|
||||
struct fw_port_cmd *cmdp = (struct fw_port_cmd *)(mbp->mb);
|
||||
unsigned int lfc = 0, mdi = FW_PORT_CAP_MDI_V(FW_PORT_CAP_MDI_AUTO);
|
||||
|
||||
CSIO_INIT_MBP(mbp, cmdp, tmo, hw, cbfn, 1);
|
||||
|
||||
|
|
@ -358,26 +353,24 @@ csio_mb_port(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo,
|
|||
FW_PORT_CMD_PORTID_V(portid));
|
||||
if (!wr) {
|
||||
cmdp->action_to_len16 = htonl(
|
||||
FW_PORT_CMD_ACTION_V(FW_PORT_ACTION_GET_PORT_INFO) |
|
||||
FW_PORT_CMD_ACTION_V(fw_caps == FW_CAPS16
|
||||
? FW_PORT_ACTION_GET_PORT_INFO
|
||||
: FW_PORT_ACTION_GET_PORT_INFO32) |
|
||||
FW_CMD_LEN16_V(sizeof(*cmdp) / 16));
|
||||
return;
|
||||
}
|
||||
|
||||
/* Set port */
|
||||
cmdp->action_to_len16 = htonl(
|
||||
FW_PORT_CMD_ACTION_V(FW_PORT_ACTION_L1_CFG) |
|
||||
FW_PORT_CMD_ACTION_V(fw_caps == FW_CAPS16
|
||||
? FW_PORT_ACTION_L1_CFG
|
||||
: FW_PORT_ACTION_L1_CFG32) |
|
||||
FW_CMD_LEN16_V(sizeof(*cmdp) / 16));
|
||||
|
||||
if (fc & PAUSE_RX)
|
||||
lfc |= FW_PORT_CAP_FC_RX;
|
||||
if (fc & PAUSE_TX)
|
||||
lfc |= FW_PORT_CAP_FC_TX;
|
||||
|
||||
if (!(caps & FW_PORT_CAP_ANEG))
|
||||
cmdp->u.l1cfg.rcap = htonl((caps & CSIO_ADVERT_MASK) | lfc);
|
||||
if (fw_caps == FW_CAPS16)
|
||||
cmdp->u.l1cfg.rcap = cpu_to_be32(fc);
|
||||
else
|
||||
cmdp->u.l1cfg.rcap = htonl((caps & CSIO_ADVERT_MASK) |
|
||||
lfc | mdi);
|
||||
cmdp->u.l1cfg32.rcap32 = cpu_to_be32(fc);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -390,14 +383,22 @@ csio_mb_port(struct csio_hw *hw, struct csio_mb *mbp, uint32_t tmo,
|
|||
*/
|
||||
void
|
||||
csio_mb_process_read_port_rsp(struct csio_hw *hw, struct csio_mb *mbp,
|
||||
enum fw_retval *retval, uint16_t *caps)
|
||||
enum fw_retval *retval, uint16_t fw_caps,
|
||||
u32 *pcaps, u32 *acaps)
|
||||
{
|
||||
struct fw_port_cmd *rsp = (struct fw_port_cmd *)(mbp->mb);
|
||||
|
||||
*retval = FW_CMD_RETVAL_G(ntohl(rsp->action_to_len16));
|
||||
|
||||
if (*retval == FW_SUCCESS)
|
||||
*caps = ntohs(rsp->u.info.pcap);
|
||||
if (*retval == FW_SUCCESS) {
|
||||
if (fw_caps == FW_CAPS16) {
|
||||
*pcaps = fwcaps16_to_caps32(ntohs(rsp->u.info.pcap));
|
||||
*acaps = fwcaps16_to_caps32(ntohs(rsp->u.info.acap));
|
||||
} else {
|
||||
*pcaps = ntohs(rsp->u.info32.pcaps32);
|
||||
*acaps = ntohs(rsp->u.info32.acaps32);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -1409,6 +1410,7 @@ csio_mb_fwevt_handler(struct csio_hw *hw, __be64 *cmd)
|
|||
uint32_t link_status;
|
||||
uint16_t action;
|
||||
uint8_t mod_type;
|
||||
fw_port_cap32_t linkattr;
|
||||
|
||||
if (opcode == FW_PORT_CMD) {
|
||||
pcmd = (struct fw_port_cmd *)cmd;
|
||||
|
|
@ -1416,22 +1418,34 @@ csio_mb_fwevt_handler(struct csio_hw *hw, __be64 *cmd)
|
|||
ntohl(pcmd->op_to_portid));
|
||||
action = FW_PORT_CMD_ACTION_G(
|
||||
ntohl(pcmd->action_to_len16));
|
||||
if (action != FW_PORT_ACTION_GET_PORT_INFO) {
|
||||
if (action != FW_PORT_ACTION_GET_PORT_INFO &&
|
||||
action != FW_PORT_ACTION_GET_PORT_INFO32) {
|
||||
csio_err(hw, "Unhandled FW_PORT_CMD action: %u\n",
|
||||
action);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
link_status = ntohl(pcmd->u.info.lstatus_to_modtype);
|
||||
mod_type = FW_PORT_CMD_MODTYPE_G(link_status);
|
||||
if (action == FW_PORT_ACTION_GET_PORT_INFO) {
|
||||
link_status = ntohl(pcmd->u.info.lstatus_to_modtype);
|
||||
mod_type = FW_PORT_CMD_MODTYPE_G(link_status);
|
||||
linkattr = lstatus_to_fwcap(link_status);
|
||||
|
||||
hw->pport[port_id].link_status =
|
||||
FW_PORT_CMD_LSTATUS_G(link_status);
|
||||
hw->pport[port_id].link_speed =
|
||||
FW_PORT_CMD_LSPEED_G(link_status);
|
||||
hw->pport[port_id].link_status =
|
||||
FW_PORT_CMD_LSTATUS_G(link_status);
|
||||
} else {
|
||||
link_status =
|
||||
ntohl(pcmd->u.info32.lstatus32_to_cbllen32);
|
||||
mod_type = FW_PORT_CMD_MODTYPE32_G(link_status);
|
||||
linkattr = ntohl(pcmd->u.info32.linkattr32);
|
||||
|
||||
hw->pport[port_id].link_status =
|
||||
FW_PORT_CMD_LSTATUS32_G(link_status);
|
||||
}
|
||||
|
||||
hw->pport[port_id].link_speed = fwcap_to_fwspeed(linkattr);
|
||||
|
||||
csio_info(hw, "Port:%x - LINK %s\n", port_id,
|
||||
FW_PORT_CMD_LSTATUS_G(link_status) ? "UP" : "DOWN");
|
||||
hw->pport[port_id].link_status ? "UP" : "DOWN");
|
||||
|
||||
if (mod_type != hw->pport[port_id].mod_type) {
|
||||
hw->pport[port_id].mod_type = mod_type;
|
||||
|
|
|
|||
|
|
@ -88,12 +88,6 @@ enum csio_dev_state {
|
|||
FW_PARAMS_PARAM_Y_V(0) | \
|
||||
FW_PARAMS_PARAM_Z_V(0))
|
||||
|
||||
enum {
|
||||
PAUSE_RX = 1 << 0,
|
||||
PAUSE_TX = 1 << 1,
|
||||
PAUSE_AUTONEG = 1 << 2
|
||||
};
|
||||
|
||||
#define CSIO_INIT_MBP(__mbp, __cp, __tmo, __priv, __fn, __clear) \
|
||||
do { \
|
||||
if (__clear) \
|
||||
|
|
@ -189,7 +183,8 @@ void csio_mb_port(struct csio_hw *, struct csio_mb *, uint32_t,
|
|||
void (*) (struct csio_hw *, struct csio_mb *));
|
||||
|
||||
void csio_mb_process_read_port_rsp(struct csio_hw *, struct csio_mb *,
|
||||
enum fw_retval *, uint16_t *);
|
||||
enum fw_retval *, uint16_t,
|
||||
uint32_t *, uint32_t *);
|
||||
|
||||
void csio_mb_initialize(struct csio_hw *, struct csio_mb *, uint32_t,
|
||||
void (*)(struct csio_hw *, struct csio_mb *));
|
||||
|
|
|
|||
Loading…
Reference in a new issue