Victor Zhao 9250f97fd5 drm/amd/amdgpu:save psp ring wptr to avoid attack ... [ Upstream commit 2370eba9f552eaae3d8aa1f70b8e9eec5c560f9e ] [Why] When some tools performing psp mailbox attack, the readback value of register can be a random value which may break psp. [How] Use a psp wptr cache machanism to aovid the change made by attack. v2: unify change and add detailed reason Signed-off-by: Victor Zhao <Victor.Zhao@amd.com> Signed-off-by: Jingwen Chen <Jingwen.Chen2@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2021-06-18 10:00:06 +02:00
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acp	drm: amd/acp: fix broken menu structure	2020-03-13 11:52:35 -04:00
amdgpu	drm/amd/amdgpu:save psp ring wptr to avoid attack	2021-06-18 10:00:06 +02:00
amdkfd	drm/amdkfd: fix build error with AMD_IOMMU_V2=m	2021-05-14 09:50:24 +02:00
display	drm/amd/display: Fix potential memory leak in DMUB hw_init	2021-06-18 10:00:06 +02:00
include	drm/amdgpu: add Green_Sardine APU flag	2020-11-04 08:30:48 -05:00
pm	drm/amd/pm: correct MGpuFanBoost setting	2021-06-03 09:00:30 +02:00