2012-04-27 06:26:16 -06:00
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/*
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* Core driver for the imx pin controller
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*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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* Copyright (C) 2012 Linaro Ltd.
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*
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* Author: Dong Aisheng <dong.aisheng@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/slab.h>
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#include "core.h"
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#include "pinctrl-imx.h"
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2012-06-08 13:22:11 -06:00
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#define IMX_PMX_DUMP(info, p, m, c, n) \
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{ \
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int i, j; \
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printk(KERN_DEBUG "Format: Pin Mux Config\n"); \
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for (i = 0; i < n; i++) { \
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j = p[i]; \
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printk(KERN_DEBUG "%s %d 0x%lx\n", \
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info->pins[j].name, \
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m[i], c[i]); \
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} \
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2012-04-27 06:26:16 -06:00
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}
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/* The bits in CONFIG cell defined in binding doc*/
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#define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */
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#define IMX_PAD_SION 0x40000000 /* set SION */
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/**
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* @dev: a pointer back to containing device
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* @base: the offset to the controller in virtual memory
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*/
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struct imx_pinctrl {
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struct device *dev;
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struct pinctrl_dev *pctl;
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void __iomem *base;
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const struct imx_pinctrl_soc_info *info;
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};
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static const inline struct imx_pin_group *imx_pinctrl_find_group_by_name(
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const struct imx_pinctrl_soc_info *info,
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const char *name)
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{
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const struct imx_pin_group *grp = NULL;
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int i;
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for (i = 0; i < info->ngroups; i++) {
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if (!strcmp(info->groups[i].name, name)) {
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grp = &info->groups[i];
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break;
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}
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}
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return grp;
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}
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static int imx_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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return info->ngroups;
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}
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static const char *imx_get_group_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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return info->groups[selector].name;
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}
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static int imx_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
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const unsigned **pins,
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unsigned *npins)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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if (selector >= info->ngroups)
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return -EINVAL;
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*pins = info->groups[selector].pins;
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*npins = info->groups[selector].npins;
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return 0;
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}
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static void imx_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
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unsigned offset)
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{
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seq_printf(s, "%s", dev_name(pctldev->dev));
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}
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static int imx_dt_node_to_map(struct pinctrl_dev *pctldev,
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struct device_node *np,
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struct pinctrl_map **map, unsigned *num_maps)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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const struct imx_pin_group *grp;
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struct pinctrl_map *new_map;
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struct device_node *parent;
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int map_num = 1;
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2012-06-20 04:13:47 -06:00
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int i, j;
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2012-04-27 06:26:16 -06:00
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/*
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* first find the group of this node and check if we need create
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* config maps for pins
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*/
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grp = imx_pinctrl_find_group_by_name(info, np->name);
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if (!grp) {
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dev_err(info->dev, "unable to find group for node %s\n",
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np->name);
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return -EINVAL;
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}
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for (i = 0; i < grp->npins; i++) {
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if (!(grp->configs[i] & IMX_NO_PAD_CTL))
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map_num++;
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}
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new_map = kmalloc(sizeof(struct pinctrl_map) * map_num, GFP_KERNEL);
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if (!new_map)
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return -ENOMEM;
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*map = new_map;
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*num_maps = map_num;
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/* create mux map */
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parent = of_get_parent(np);
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2012-06-07 10:49:26 -06:00
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if (!parent) {
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kfree(new_map);
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2012-04-27 06:26:16 -06:00
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return -EINVAL;
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2012-06-07 10:49:26 -06:00
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}
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2012-04-27 06:26:16 -06:00
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new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;
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new_map[0].data.mux.function = parent->name;
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new_map[0].data.mux.group = np->name;
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of_node_put(parent);
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/* create config map */
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new_map++;
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2012-06-20 04:13:47 -06:00
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for (i = j = 0; i < grp->npins; i++) {
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2012-04-27 06:26:16 -06:00
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if (!(grp->configs[i] & IMX_NO_PAD_CTL)) {
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2012-06-20 04:13:47 -06:00
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new_map[j].type = PIN_MAP_TYPE_CONFIGS_PIN;
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new_map[j].data.configs.group_or_pin =
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2012-04-27 06:26:16 -06:00
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pin_get_name(pctldev, grp->pins[i]);
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2012-06-20 04:13:47 -06:00
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new_map[j].data.configs.configs = &grp->configs[i];
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new_map[j].data.configs.num_configs = 1;
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j++;
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2012-04-27 06:26:16 -06:00
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}
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}
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dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n",
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2012-06-08 07:33:12 -06:00
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(*map)->data.mux.function, (*map)->data.mux.group, map_num);
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2012-04-27 06:26:16 -06:00
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return 0;
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}
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static void imx_dt_free_map(struct pinctrl_dev *pctldev,
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struct pinctrl_map *map, unsigned num_maps)
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{
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2012-06-08 13:22:11 -06:00
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kfree(map);
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2012-04-27 06:26:16 -06:00
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}
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2013-02-16 02:25:07 -07:00
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static const struct pinctrl_ops imx_pctrl_ops = {
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2012-04-27 06:26:16 -06:00
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.get_groups_count = imx_get_groups_count,
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.get_group_name = imx_get_group_name,
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.get_group_pins = imx_get_group_pins,
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.pin_dbg_show = imx_pin_dbg_show,
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.dt_node_to_map = imx_dt_node_to_map,
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.dt_free_map = imx_dt_free_map,
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};
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static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
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unsigned group)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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const struct imx_pin_reg *pin_reg;
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2013-02-19 19:32:52 -07:00
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const unsigned *pins, *mux, *input_val;
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u16 *input_reg;
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2012-04-27 06:26:16 -06:00
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unsigned int npins, pin_id;
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int i;
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/*
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* Configure the mux mode for each pin in the group for a specific
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* function.
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*/
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pins = info->groups[group].pins;
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npins = info->groups[group].npins;
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mux = info->groups[group].mux_mode;
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2013-02-19 19:32:52 -07:00
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input_val = info->groups[group].input_val;
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input_reg = info->groups[group].input_reg;
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2012-04-27 06:26:16 -06:00
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2013-02-19 19:32:52 -07:00
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WARN_ON(!pins || !npins || !mux || !input_val || !input_reg);
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2012-04-27 06:26:16 -06:00
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dev_dbg(ipctl->dev, "enable function %s group %s\n",
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info->functions[selector].name, info->groups[group].name);
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for (i = 0; i < npins; i++) {
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pin_id = pins[i];
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2013-02-19 19:32:52 -07:00
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pin_reg = &info->pin_regs[pin_id];
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2012-04-27 06:26:16 -06:00
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if (!pin_reg->mux_reg) {
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dev_err(ipctl->dev, "Pin(%s) does not support mux function\n",
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info->pins[pin_id].name);
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return -EINVAL;
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}
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writel(mux[i], ipctl->base + pin_reg->mux_reg);
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dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
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pin_reg->mux_reg, mux[i]);
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/* some pins also need select input setting, set it if found */
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2013-02-19 19:32:52 -07:00
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if (input_reg[i]) {
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writel(input_val[i], ipctl->base + input_reg[i]);
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2012-04-27 06:26:16 -06:00
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dev_dbg(ipctl->dev,
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"==>select_input: offset 0x%x val 0x%x\n",
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2013-02-19 19:32:52 -07:00
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input_reg[i], input_val[i]);
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2012-04-27 06:26:16 -06:00
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}
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}
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return 0;
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}
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static int imx_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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return info->nfunctions;
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}
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static const char *imx_pmx_get_func_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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return info->functions[selector].name;
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}
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static int imx_pmx_get_groups(struct pinctrl_dev *pctldev, unsigned selector,
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const char * const **groups,
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unsigned * const num_groups)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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*groups = info->functions[selector].groups;
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*num_groups = info->functions[selector].num_groups;
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return 0;
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}
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2013-02-16 02:25:07 -07:00
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static const struct pinmux_ops imx_pmx_ops = {
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2012-04-27 06:26:16 -06:00
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.get_functions_count = imx_pmx_get_funcs_count,
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.get_function_name = imx_pmx_get_func_name,
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.get_function_groups = imx_pmx_get_groups,
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.enable = imx_pmx_enable,
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};
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static int imx_pinconf_get(struct pinctrl_dev *pctldev,
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unsigned pin_id, unsigned long *config)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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2013-02-19 19:32:52 -07:00
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const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
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2012-04-27 06:26:16 -06:00
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if (!pin_reg->conf_reg) {
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dev_err(info->dev, "Pin(%s) does not support config function\n",
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info->pins[pin_id].name);
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return -EINVAL;
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}
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*config = readl(ipctl->base + pin_reg->conf_reg);
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return 0;
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}
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static int imx_pinconf_set(struct pinctrl_dev *pctldev,
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unsigned pin_id, unsigned long config)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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2013-02-19 19:32:52 -07:00
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const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
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2012-04-27 06:26:16 -06:00
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if (!pin_reg->conf_reg) {
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dev_err(info->dev, "Pin(%s) does not support config function\n",
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info->pins[pin_id].name);
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return -EINVAL;
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}
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dev_dbg(ipctl->dev, "pinconf set pin %s\n",
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info->pins[pin_id].name);
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writel(config, ipctl->base + pin_reg->conf_reg);
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dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%lx\n",
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pin_reg->conf_reg, config);
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return 0;
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}
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static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s, unsigned pin_id)
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{
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struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
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const struct imx_pinctrl_soc_info *info = ipctl->info;
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2013-02-19 19:32:52 -07:00
|
|
|
const struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
|
2012-04-27 06:26:16 -06:00
|
|
|
unsigned long config;
|
|
|
|
|
|
|
|
if (!pin_reg || !pin_reg->conf_reg) {
|
|
|
|
seq_printf(s, "N/A");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
config = readl(ipctl->base + pin_reg->conf_reg);
|
|
|
|
seq_printf(s, "0x%lx", config);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void imx_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
|
|
|
|
struct seq_file *s, unsigned group)
|
|
|
|
{
|
|
|
|
struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
|
|
|
|
const struct imx_pinctrl_soc_info *info = ipctl->info;
|
|
|
|
struct imx_pin_group *grp;
|
|
|
|
unsigned long config;
|
|
|
|
const char *name;
|
|
|
|
int i, ret;
|
|
|
|
|
|
|
|
if (group > info->ngroups)
|
|
|
|
return;
|
|
|
|
|
|
|
|
seq_printf(s, "\n");
|
|
|
|
grp = &info->groups[group];
|
|
|
|
for (i = 0; i < grp->npins; i++) {
|
|
|
|
name = pin_get_name(pctldev, grp->pins[i]);
|
|
|
|
ret = imx_pinconf_get(pctldev, grp->pins[i], &config);
|
|
|
|
if (ret)
|
|
|
|
return;
|
|
|
|
seq_printf(s, "%s: 0x%lx", name, config);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-02-16 02:25:07 -07:00
|
|
|
static const struct pinconf_ops imx_pinconf_ops = {
|
2012-04-27 06:26:16 -06:00
|
|
|
.pin_config_get = imx_pinconf_get,
|
|
|
|
.pin_config_set = imx_pinconf_set,
|
|
|
|
.pin_config_dbg_show = imx_pinconf_dbg_show,
|
|
|
|
.pin_config_group_dbg_show = imx_pinconf_group_dbg_show,
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct pinctrl_desc imx_pinctrl_desc = {
|
|
|
|
.pctlops = &imx_pctrl_ops,
|
|
|
|
.pmxops = &imx_pmx_ops,
|
|
|
|
.confops = &imx_pinconf_ops,
|
|
|
|
.owner = THIS_MODULE,
|
|
|
|
};
|
|
|
|
|
2013-02-19 19:32:52 -07:00
|
|
|
/*
|
|
|
|
* Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and
|
|
|
|
* 1 u32 CONFIG, so 24 types in total for each pin.
|
|
|
|
*/
|
|
|
|
#define FSL_PIN_SIZE 24
|
2012-04-27 06:26:16 -06:00
|
|
|
|
2012-12-21 14:10:23 -07:00
|
|
|
static int imx_pinctrl_parse_groups(struct device_node *np,
|
|
|
|
struct imx_pin_group *grp,
|
|
|
|
struct imx_pinctrl_soc_info *info,
|
|
|
|
u32 index)
|
2012-04-27 06:26:16 -06:00
|
|
|
{
|
2013-02-19 19:32:52 -07:00
|
|
|
int size;
|
2012-09-18 00:54:00 -06:00
|
|
|
const __be32 *list;
|
2013-02-19 19:32:52 -07:00
|
|
|
int i;
|
2012-04-27 06:26:16 -06:00
|
|
|
u32 config;
|
|
|
|
|
|
|
|
dev_dbg(info->dev, "group(%d): %s\n", index, np->name);
|
|
|
|
|
|
|
|
/* Initialise group */
|
|
|
|
grp->name = np->name;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* the binding format is fsl,pins = <PIN_FUNC_ID CONFIG ...>,
|
|
|
|
* do sanity check and calculate pins number
|
|
|
|
*/
|
|
|
|
list = of_get_property(np, "fsl,pins", &size);
|
|
|
|
/* we do not check return since it's safe node passed down */
|
2013-02-19 19:32:52 -07:00
|
|
|
if (!size || size % FSL_PIN_SIZE) {
|
|
|
|
dev_err(info->dev, "Invalid fsl,pins property\n");
|
2012-04-27 06:26:16 -06:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-02-19 19:32:52 -07:00
|
|
|
grp->npins = size / FSL_PIN_SIZE;
|
2012-04-27 06:26:16 -06:00
|
|
|
grp->pins = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
|
|
|
|
GFP_KERNEL);
|
|
|
|
grp->mux_mode = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
|
|
|
|
GFP_KERNEL);
|
2013-02-19 19:32:52 -07:00
|
|
|
grp->input_reg = devm_kzalloc(info->dev, grp->npins * sizeof(u16),
|
|
|
|
GFP_KERNEL);
|
|
|
|
grp->input_val = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned int),
|
|
|
|
GFP_KERNEL);
|
2012-04-27 06:26:16 -06:00
|
|
|
grp->configs = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned long),
|
|
|
|
GFP_KERNEL);
|
2013-02-19 19:32:52 -07:00
|
|
|
for (i = 0; i < grp->npins; i++) {
|
|
|
|
u32 mux_reg = be32_to_cpu(*list++);
|
|
|
|
u32 conf_reg = be32_to_cpu(*list++);
|
|
|
|
unsigned int pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
|
|
|
|
struct imx_pin_reg *pin_reg = &info->pin_regs[pin_id];
|
|
|
|
|
|
|
|
grp->pins[i] = pin_id;
|
|
|
|
pin_reg->mux_reg = mux_reg;
|
|
|
|
pin_reg->conf_reg = conf_reg;
|
|
|
|
grp->input_reg[i] = be32_to_cpu(*list++);
|
|
|
|
grp->mux_mode[i] = be32_to_cpu(*list++);
|
|
|
|
grp->input_val[i] = be32_to_cpu(*list++);
|
|
|
|
|
2012-04-27 06:26:16 -06:00
|
|
|
/* SION bit is in mux register */
|
|
|
|
config = be32_to_cpu(*list++);
|
|
|
|
if (config & IMX_PAD_SION)
|
2013-02-19 19:32:52 -07:00
|
|
|
grp->mux_mode[i] |= IOMUXC_CONFIG_SION;
|
|
|
|
grp->configs[i] = config & ~IMX_PAD_SION;
|
2012-04-27 06:26:16 -06:00
|
|
|
}
|
|
|
|
|
2012-06-21 04:10:35 -06:00
|
|
|
#ifdef DEBUG
|
2012-04-27 06:26:16 -06:00
|
|
|
IMX_PMX_DUMP(info, grp->pins, grp->mux_mode, grp->configs, grp->npins);
|
2012-06-21 04:10:35 -06:00
|
|
|
#endif
|
2012-06-08 13:22:11 -06:00
|
|
|
|
2012-04-27 06:26:16 -06:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-12-21 14:10:23 -07:00
|
|
|
static int imx_pinctrl_parse_functions(struct device_node *np,
|
|
|
|
struct imx_pinctrl_soc_info *info,
|
|
|
|
u32 index)
|
2012-04-27 06:26:16 -06:00
|
|
|
{
|
|
|
|
struct device_node *child;
|
|
|
|
struct imx_pmx_func *func;
|
|
|
|
struct imx_pin_group *grp;
|
|
|
|
int ret;
|
|
|
|
static u32 grp_index;
|
|
|
|
u32 i = 0;
|
|
|
|
|
|
|
|
dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name);
|
|
|
|
|
|
|
|
func = &info->functions[index];
|
|
|
|
|
|
|
|
/* Initialise function */
|
|
|
|
func->name = np->name;
|
|
|
|
func->num_groups = of_get_child_count(np);
|
|
|
|
if (func->num_groups <= 0) {
|
|
|
|
dev_err(info->dev, "no groups defined\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
func->groups = devm_kzalloc(info->dev,
|
|
|
|
func->num_groups * sizeof(char *), GFP_KERNEL);
|
|
|
|
|
|
|
|
for_each_child_of_node(np, child) {
|
|
|
|
func->groups[i] = child->name;
|
|
|
|
grp = &info->groups[grp_index++];
|
|
|
|
ret = imx_pinctrl_parse_groups(child, grp, info, i++);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-12-21 14:10:23 -07:00
|
|
|
static int imx_pinctrl_probe_dt(struct platform_device *pdev,
|
2012-04-27 06:26:16 -06:00
|
|
|
struct imx_pinctrl_soc_info *info)
|
|
|
|
{
|
|
|
|
struct device_node *np = pdev->dev.of_node;
|
|
|
|
struct device_node *child;
|
|
|
|
int ret;
|
|
|
|
u32 nfuncs = 0;
|
|
|
|
u32 i = 0;
|
|
|
|
|
|
|
|
if (!np)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
nfuncs = of_get_child_count(np);
|
|
|
|
if (nfuncs <= 0) {
|
|
|
|
dev_err(&pdev->dev, "no functions defined\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
info->nfunctions = nfuncs;
|
|
|
|
info->functions = devm_kzalloc(&pdev->dev, nfuncs * sizeof(struct imx_pmx_func),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!info->functions)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
info->ngroups = 0;
|
|
|
|
for_each_child_of_node(np, child)
|
|
|
|
info->ngroups += of_get_child_count(child);
|
|
|
|
info->groups = devm_kzalloc(&pdev->dev, info->ngroups * sizeof(struct imx_pin_group),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!info->groups)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
for_each_child_of_node(np, child) {
|
|
|
|
ret = imx_pinctrl_parse_functions(child, info, i++);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(&pdev->dev, "failed to parse function\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-12-21 14:10:23 -07:00
|
|
|
int imx_pinctrl_probe(struct platform_device *pdev,
|
|
|
|
struct imx_pinctrl_soc_info *info)
|
2012-04-27 06:26:16 -06:00
|
|
|
{
|
|
|
|
struct imx_pinctrl *ipctl;
|
|
|
|
struct resource *res;
|
|
|
|
int ret;
|
|
|
|
|
2013-02-19 19:32:52 -07:00
|
|
|
if (!info || !info->pins || !info->npins) {
|
2012-04-27 06:26:16 -06:00
|
|
|
dev_err(&pdev->dev, "wrong pinctrl info\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
info->dev = &pdev->dev;
|
|
|
|
|
|
|
|
/* Create state holders etc for this driver */
|
|
|
|
ipctl = devm_kzalloc(&pdev->dev, sizeof(*ipctl), GFP_KERNEL);
|
|
|
|
if (!ipctl)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2013-02-19 19:32:52 -07:00
|
|
|
info->pin_regs = devm_kzalloc(&pdev->dev, sizeof(*info->pin_regs) *
|
|
|
|
info->npins, GFP_KERNEL);
|
|
|
|
if (!info->pin_regs)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2012-04-27 06:26:16 -06:00
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
if (!res)
|
|
|
|
return -ENOENT;
|
|
|
|
|
2013-01-21 03:09:14 -07:00
|
|
|
ipctl->base = devm_ioremap_resource(&pdev->dev, res);
|
|
|
|
if (IS_ERR(ipctl->base))
|
|
|
|
return PTR_ERR(ipctl->base);
|
2012-04-27 06:26:16 -06:00
|
|
|
|
|
|
|
imx_pinctrl_desc.name = dev_name(&pdev->dev);
|
|
|
|
imx_pinctrl_desc.pins = info->pins;
|
|
|
|
imx_pinctrl_desc.npins = info->npins;
|
|
|
|
|
|
|
|
ret = imx_pinctrl_probe_dt(pdev, info);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(&pdev->dev, "fail to probe dt properties\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
ipctl->info = info;
|
|
|
|
ipctl->dev = info->dev;
|
|
|
|
platform_set_drvdata(pdev, ipctl);
|
|
|
|
ipctl->pctl = pinctrl_register(&imx_pinctrl_desc, &pdev->dev, ipctl);
|
|
|
|
if (!ipctl->pctl) {
|
|
|
|
dev_err(&pdev->dev, "could not register IMX pinctrl driver\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev_info(&pdev->dev, "initialized IMX pinctrl driver\n");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-11-19 11:26:06 -07:00
|
|
|
int imx_pinctrl_remove(struct platform_device *pdev)
|
2012-04-27 06:26:16 -06:00
|
|
|
{
|
|
|
|
struct imx_pinctrl *ipctl = platform_get_drvdata(pdev);
|
|
|
|
|
|
|
|
pinctrl_unregister(ipctl->pctl);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|