2012-01-03 19:26:33 -07:00
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/*
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* linux/drivers/pinctrl/pinctrl-pxa3xx.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*
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* Copyright (C) 2011, Marvell Technology Group Ltd.
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*
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* Author: Haojian Zhuang <haojian.zhuang@marvell.com>
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*
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*/
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "pinctrl-pxa3xx.h"
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static struct pinctrl_gpio_range pxa3xx_pinctrl_gpio_range = {
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.name = "PXA3xx GPIO",
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.id = 0,
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.base = 0,
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.pin_base = 0,
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};
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2012-03-29 23:55:40 -06:00
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static int pxa3xx_get_groups_count(struct pinctrl_dev *pctrldev)
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2012-01-03 19:26:33 -07:00
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{
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struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
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2012-03-29 23:55:40 -06:00
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return info->num_grps;
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2012-01-03 19:26:33 -07:00
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}
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static const char *pxa3xx_get_group_name(struct pinctrl_dev *pctrldev,
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unsigned selector)
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{
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struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
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2012-03-29 23:55:40 -06:00
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2012-01-03 19:26:33 -07:00
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return info->grps[selector].name;
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}
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static int pxa3xx_get_group_pins(struct pinctrl_dev *pctrldev,
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unsigned selector,
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const unsigned **pins,
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unsigned *num_pins)
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{
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struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
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2012-03-29 23:55:40 -06:00
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2012-01-03 19:26:33 -07:00
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*pins = info->grps[selector].pins;
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*num_pins = info->grps[selector].npins;
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return 0;
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}
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static struct pinctrl_ops pxa3xx_pctrl_ops = {
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2012-03-29 23:55:40 -06:00
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.get_groups_count = pxa3xx_get_groups_count,
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2012-01-03 19:26:33 -07:00
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.get_group_name = pxa3xx_get_group_name,
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.get_group_pins = pxa3xx_get_group_pins,
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};
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2012-03-29 23:55:40 -06:00
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static int pxa3xx_pmx_get_funcs_count(struct pinctrl_dev *pctrldev)
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2012-01-03 19:26:33 -07:00
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{
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struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
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2012-03-29 23:55:40 -06:00
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return info->num_funcs;
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2012-01-03 19:26:33 -07:00
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}
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static const char *pxa3xx_pmx_get_func_name(struct pinctrl_dev *pctrldev,
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unsigned func)
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{
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struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
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return info->funcs[func].name;
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}
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static int pxa3xx_pmx_get_groups(struct pinctrl_dev *pctrldev, unsigned func,
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const char * const **groups,
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unsigned * const num_groups)
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{
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struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
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*groups = info->funcs[func].groups;
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*num_groups = info->funcs[func].num_groups;
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return 0;
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}
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/* Return function number. If failure, return negative value. */
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static int match_mux(struct pxa3xx_mfp_pin *mfp, unsigned mux)
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{
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int i;
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for (i = 0; i < PXA3xx_MAX_MUX; i++) {
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if (mfp->func[i] == mux)
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break;
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}
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if (i >= PXA3xx_MAX_MUX)
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return -EINVAL;
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return i;
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}
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/* check whether current pin configuration is valid. Negative for failure */
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static int match_group_mux(struct pxa3xx_pin_group *grp,
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struct pxa3xx_pinmux_info *info,
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unsigned mux)
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{
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int i, pin, ret = 0;
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for (i = 0; i < grp->npins; i++) {
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pin = grp->pins[i];
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ret = match_mux(&info->mfp[pin], mux);
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if (ret < 0) {
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dev_err(info->dev, "Can't find mux %d on pin%d\n",
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mux, pin);
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break;
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}
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}
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return ret;
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}
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static int pxa3xx_pmx_enable(struct pinctrl_dev *pctrldev, unsigned func,
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unsigned group)
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{
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struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
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struct pxa3xx_pin_group *pin_grp = &info->grps[group];
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unsigned int data;
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int i, mfpr, pin, pin_func;
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if (!pin_grp->npins ||
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(match_group_mux(pin_grp, info, pin_grp->mux) < 0)) {
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dev_err(info->dev, "Failed to set the pin group: %d\n", group);
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return -EINVAL;
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}
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for (i = 0; i < pin_grp->npins; i++) {
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pin = pin_grp->pins[i];
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pin_func = match_mux(&info->mfp[pin], pin_grp->mux);
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mfpr = info->mfp[pin].mfpr;
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data = readl_relaxed(info->virt_base + mfpr);
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data &= ~MFPR_FUNC_MASK;
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data |= pin_func;
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writel_relaxed(data, info->virt_base + mfpr);
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}
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return 0;
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}
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static int pxa3xx_pmx_request_gpio(struct pinctrl_dev *pctrldev,
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struct pinctrl_gpio_range *range,
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unsigned pin)
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{
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struct pxa3xx_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
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unsigned int data;
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int pin_func, mfpr;
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pin_func = match_mux(&info->mfp[pin], PXA3xx_MUX_GPIO);
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if (pin_func < 0) {
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dev_err(info->dev, "No GPIO function on pin%d (%s)\n",
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pin, info->pads[pin].name);
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return -EINVAL;
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}
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mfpr = info->mfp[pin].mfpr;
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/* write gpio function into mfpr register */
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data = readl_relaxed(info->virt_base + mfpr) & ~MFPR_FUNC_MASK;
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data |= pin_func;
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writel_relaxed(data, info->virt_base + mfpr);
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return 0;
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}
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static struct pinmux_ops pxa3xx_pmx_ops = {
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2012-03-29 23:55:40 -06:00
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.get_functions_count = pxa3xx_pmx_get_funcs_count,
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2012-01-03 19:26:33 -07:00
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.get_function_name = pxa3xx_pmx_get_func_name,
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.get_function_groups = pxa3xx_pmx_get_groups,
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.enable = pxa3xx_pmx_enable,
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.gpio_request_enable = pxa3xx_pmx_request_gpio,
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};
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int pxa3xx_pinctrl_register(struct platform_device *pdev,
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struct pxa3xx_pinmux_info *info)
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{
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struct pinctrl_desc *desc;
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struct resource *res;
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int ret = 0;
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if (!info || !info->cputype)
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return -EINVAL;
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desc = info->desc;
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desc->pins = info->pads;
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desc->npins = info->num_pads;
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desc->pctlops = &pxa3xx_pctrl_ops;
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desc->pmxops = &pxa3xx_pmx_ops;
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info->dev = &pdev->dev;
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pxa3xx_pinctrl_gpio_range.npins = info->num_gpio;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENOENT;
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info->phy_base = res->start;
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info->phy_size = resource_size(res);
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info->virt_base = ioremap(info->phy_base, info->phy_size);
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if (!info->virt_base)
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return -ENOMEM;
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info->pctrl = pinctrl_register(desc, &pdev->dev, info);
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if (!info->pctrl) {
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dev_err(&pdev->dev, "failed to register PXA pinmux driver\n");
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ret = -EINVAL;
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goto err;
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}
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pinctrl_add_gpio_range(info->pctrl, &pxa3xx_pinctrl_gpio_range);
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platform_set_drvdata(pdev, info);
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return 0;
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err:
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iounmap(info->virt_base);
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return ret;
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}
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int pxa3xx_pinctrl_unregister(struct platform_device *pdev)
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{
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struct pxa3xx_pinmux_info *info = platform_get_drvdata(pdev);
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pinctrl_unregister(info->pctrl);
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iounmap(info->virt_base);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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static int __init pxa3xx_pinctrl_init(void)
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{
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pr_info("pxa3xx-pinctrl: PXA3xx pinctrl driver initializing\n");
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return 0;
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}
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core_initcall_sync(pxa3xx_pinctrl_init);
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static void __exit pxa3xx_pinctrl_exit(void)
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{
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}
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module_exit(pxa3xx_pinctrl_exit);
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MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
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MODULE_DESCRIPTION("PXA3xx pin control driver");
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MODULE_LICENSE("GPL v2");
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