2014-07-08 08:49:22 -06:00
|
|
|
/*
|
|
|
|
* Copyright 2014 FEDEVEL, Inc.
|
|
|
|
*
|
|
|
|
* Author: Robert Nelson <robertcnelson@gmail.com>
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
|
|
* published by the Free Software Foundation.
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
|
|
|
|
/ {
|
|
|
|
chosen {
|
|
|
|
stdout-path = &uart1;
|
|
|
|
};
|
|
|
|
|
|
|
|
regulators {
|
|
|
|
compatible = "simple-bus";
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
reg_3p3v: regulator@0 {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
reg = <0>;
|
|
|
|
regulator-name = "3P3V";
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-always-on;
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_usbh1_vbus: regulator@1 {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
reg = <1>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
regulator-name = "usbh1_vbus";
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
|
|
|
|
enable-active-high;
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_usb_otg_vbus: regulator@2 {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
reg = <2>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
regulator-name = "usb_otg_vbus";
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
|
|
|
|
enable-active-high;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
leds {
|
|
|
|
compatible = "gpio-leds";
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_led>;
|
|
|
|
|
|
|
|
led0: usr {
|
|
|
|
label = "usr";
|
|
|
|
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
|
|
|
|
default-state = "off";
|
|
|
|
linux,default-trigger = "heartbeat";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
sound {
|
|
|
|
compatible = "fsl,imx6-rex-sgtl5000",
|
|
|
|
"fsl,imx-audio-sgtl5000";
|
|
|
|
model = "imx6-rex-sgtl5000";
|
|
|
|
ssi-controller = <&ssi1>;
|
|
|
|
audio-codec = <&codec>;
|
|
|
|
audio-routing =
|
|
|
|
"MIC_IN", "Mic Jack",
|
|
|
|
"Mic Jack", "Mic Bias",
|
|
|
|
"Headphone Jack", "HP_OUT";
|
|
|
|
mux-int-port = <1>;
|
|
|
|
mux-ext-port = <3>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&audmux {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_audmux>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&ecspi2 {
|
|
|
|
cs-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_ecspi2>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&ecspi3 {
|
|
|
|
cs-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_ecspi3>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&fec {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_enet>;
|
|
|
|
phy-mode = "rgmii";
|
|
|
|
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&hdmi {
|
|
|
|
ddc-i2c-bus = <&i2c2>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c1 {
|
|
|
|
clock-frequency = <100000>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_i2c1>;
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
codec: sgtl5000@0a {
|
|
|
|
compatible = "fsl,sgtl5000";
|
|
|
|
reg = <0x0a>;
|
2016-04-26 19:28:29 -06:00
|
|
|
clocks = <&clks IMX6QDL_CLK_CKO>;
|
2014-07-08 08:49:22 -06:00
|
|
|
VDDA-supply = <®_3p3v>;
|
|
|
|
VDDIO-supply = <®_3p3v>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c2 {
|
|
|
|
clock-frequency = <100000>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_i2c2>;
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
eeprom@57 {
|
|
|
|
compatible = "at,24c02";
|
|
|
|
reg = <0x57>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c3 {
|
|
|
|
clock-frequency = <100000>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_i2c3>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&iomuxc {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_hog>;
|
|
|
|
|
|
|
|
imx6qdl-rex {
|
|
|
|
pinctrl_hog: hoggrp {
|
|
|
|
fsl,pins = <
|
|
|
|
/* SGTL5000 sys_mclk */
|
|
|
|
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_audmux: audmuxgrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
|
|
|
|
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
|
|
|
|
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
|
|
|
|
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_ecspi2: ecspi2grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
|
|
|
|
MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
|
|
|
|
MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
|
|
|
|
/* CS */
|
|
|
|
MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x000b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_ecspi3: ecspi3grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO 0x100b1
|
|
|
|
MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x100b1
|
|
|
|
MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x100b1
|
|
|
|
/* CS */
|
|
|
|
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x000b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_enet: enetgrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
|
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
2016-07-08 15:22:54 -06:00
|
|
|
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
|
|
|
|
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
|
|
|
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
|
|
|
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
|
|
|
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
|
|
|
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
|
2014-07-08 08:49:22 -06:00
|
|
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
2016-07-08 15:22:54 -06:00
|
|
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
|
|
|
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
|
|
|
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
|
|
|
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
|
|
|
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
|
|
|
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
|
2014-07-08 08:49:22 -06:00
|
|
|
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
|
|
|
/* Phy reset */
|
|
|
|
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x000b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
|
|
|
|
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
|
|
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
|
|
|
|
MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_led: ledgrp {
|
|
|
|
fsl,pins = <
|
|
|
|
/* user led */
|
|
|
|
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
|
|
|
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_uart2: uart2grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
|
|
|
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usbh1: usbh1grp {
|
|
|
|
fsl,pins = <
|
|
|
|
/* power enable, high active */
|
|
|
|
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x10b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
|
|
|
MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
|
|
|
|
/* power enable, high active */
|
|
|
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x10b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
|
|
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
|
|
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
|
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
|
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
|
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
|
|
|
/* CD */
|
|
|
|
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
|
|
|
|
/* WP */
|
|
|
|
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1f0b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
|
|
/* CD */
|
|
|
|
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
|
|
|
|
/* WP */
|
|
|
|
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1f0b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&ssi1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&uart1 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&uart2 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usbh1 {
|
|
|
|
vbus-supply = <®_usbh1_vbus>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_usbh1>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usbotg {
|
|
|
|
vbus-supply = <®_usb_otg_vbus>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usdhc2 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_usdhc2>;
|
|
|
|
bus-width = <4>;
|
|
|
|
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
|
2015-07-22 06:53:02 -06:00
|
|
|
wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
|
2014-07-08 08:49:22 -06:00
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usdhc3 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
|
|
|
bus-width = <4>;
|
|
|
|
cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
|
2015-07-22 06:53:02 -06:00
|
|
|
wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
|
2014-07-08 08:49:22 -06:00
|
|
|
status = "okay";
|
|
|
|
};
|