2013-06-09 02:40:53 -06:00
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/*
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* Copyright 2013 Maxime Ripard
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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2014-09-02 11:25:26 -06:00
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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2013-06-09 02:40:53 -06:00
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*
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2014-09-02 11:25:26 -06:00
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* a) This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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2013-06-09 02:40:53 -06:00
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*/
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2014-12-16 14:59:54 -07:00
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#include "skeleton.dtsi"
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2013-06-09 02:40:53 -06:00
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2015-01-30 08:42:13 -07:00
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#include "sun5i.dtsi"
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2014-12-16 14:59:56 -07:00
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#include <dt-bindings/dma/sun4i-a10.h>
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2014-12-16 14:59:57 -07:00
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#include <dt-bindings/pinctrl/sun4i-a10.h>
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2013-06-09 02:40:53 -06:00
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/ {
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interrupt-parent = <&intc>;
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2013-11-16 11:17:29 -07:00
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aliases {
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ethernet0 = &emac;
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};
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2014-11-14 08:34:35 -07:00
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chosen {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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2014-11-18 04:07:13 -07:00
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framebuffer@0 {
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2015-05-03 03:53:07 -06:00
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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2014-11-18 04:07:13 -07:00
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allwinner,pipeline = "de_be0-lcd0-hdmi";
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2016-10-15 14:36:19 -06:00
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clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_HDMI>,
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<&ccu CLK_AHB_DE_BE>, <&ccu CLK_DRAM_DE_BE>,
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<&ccu CLK_DE_BE>, <&ccu CLK_HDMI>;
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2014-11-14 08:34:35 -07:00
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status = "disabled";
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};
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2015-01-19 06:05:12 -07:00
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framebuffer@1 {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "de_be0-lcd0";
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2016-10-15 14:36:19 -06:00
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clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
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<&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
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2015-01-19 06:05:12 -07:00
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status = "disabled";
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};
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2015-08-14 08:44:32 -06:00
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framebuffer@2 {
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compatible = "allwinner,simple-framebuffer",
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"simple-framebuffer";
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allwinner,pipeline = "de_be0-lcd0-tve0";
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2016-10-15 14:36:19 -06:00
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clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
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<&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
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<&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
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2015-08-14 08:44:32 -06:00
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status = "disabled";
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};
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2014-11-14 08:34:35 -07:00
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};
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2013-08-03 08:07:36 -06:00
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soc@01c00000 {
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2013-06-09 02:40:53 -06:00
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emac: ethernet@01c0b000 {
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2014-02-02 06:49:13 -07:00
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compatible = "allwinner,sun4i-a10-emac";
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2013-06-09 02:40:53 -06:00
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reg = <0x01c0b000 0x1000>;
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interrupts = <55>;
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2016-10-15 14:36:19 -06:00
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clocks = <&ccu CLK_AHB_EMAC>;
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2015-03-26 08:53:44 -06:00
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allwinner,sram = <&emac_sram 1>;
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2013-06-09 02:40:53 -06:00
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status = "disabled";
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};
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2015-01-19 12:35:22 -07:00
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mdio: mdio@01c0b080 {
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2014-02-02 06:49:13 -07:00
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compatible = "allwinner,sun4i-a10-mdio";
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2013-06-09 02:40:53 -06:00
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reg = <0x01c0b080 0x14>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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2015-10-11 03:55:05 -06:00
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pwm: pwm@01c20e00 {
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compatible = "allwinner,sun5i-a10s-pwm";
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reg = <0x01c20e00 0xc>;
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2016-10-15 14:36:19 -06:00
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clocks = <&ccu CLK_HOSC>;
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2015-10-11 03:55:05 -06:00
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#pwm-cells = <3>;
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status = "disabled";
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};
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2013-06-09 02:40:53 -06:00
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uart0: serial@01c28000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c28000 0x400>;
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interrupts = <1>;
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reg-shift = <2>;
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reg-io-width = <4>;
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2016-10-15 14:36:19 -06:00
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clocks = <&ccu CLK_APB1_UART0>;
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2013-06-09 02:40:53 -06:00
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status = "disabled";
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};
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uart2: serial@01c28800 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c28800 0x400>;
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interrupts = <3>;
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reg-shift = <2>;
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reg-io-width = <4>;
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2016-10-15 14:36:19 -06:00
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clocks = <&ccu CLK_APB1_UART2>;
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2013-06-09 02:40:53 -06:00
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status = "disabled";
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};
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2015-01-30 08:42:13 -07:00
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};
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};
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2013-06-09 02:40:53 -06:00
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2016-10-15 14:36:19 -06:00
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&ccu {
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compatible = "allwinner,sun5i-a10s-ccu";
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};
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2015-01-30 08:42:13 -07:00
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&pio {
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compatible = "allwinner,sun5i-a10s-pinctrl";
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2013-07-07 15:31:57 -06:00
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2015-01-30 08:42:13 -07:00
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uart0_pins_a: uart0@0 {
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2016-09-23 05:28:10 -06:00
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pins = "PB19", "PB20";
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function = "uart0";
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2015-01-30 08:42:13 -07:00
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};
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2013-11-07 04:01:48 -07:00
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2015-01-30 08:42:13 -07:00
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uart2_pins_a: uart2@0 {
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2016-09-23 05:28:10 -06:00
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pins = "PC18", "PC19";
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function = "uart2";
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2015-01-30 08:42:13 -07:00
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};
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emac_pins_a: emac0@0 {
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2016-09-23 05:28:10 -06:00
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pins = "PA0", "PA1", "PA2",
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2015-01-30 08:42:13 -07:00
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"PA3", "PA4", "PA5", "PA6",
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"PA7", "PA8", "PA9", "PA10",
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"PA11", "PA12", "PA13", "PA14",
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"PA15", "PA16";
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2016-09-23 05:28:10 -06:00
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function = "emac";
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2015-01-30 08:42:13 -07:00
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};
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2015-09-10 07:05:58 -06:00
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emac_pins_b: emac0@1 {
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2016-09-23 05:28:10 -06:00
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pins = "PD6", "PD7", "PD10",
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2015-09-10 07:05:58 -06:00
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"PD11", "PD12", "PD13", "PD14",
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"PD15", "PD18", "PD19", "PD20",
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"PD21", "PD22", "PD23", "PD24",
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"PD25", "PD26", "PD27";
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2016-09-23 05:28:10 -06:00
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function = "emac";
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2015-09-10 07:05:58 -06:00
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};
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2015-01-30 08:42:13 -07:00
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mmc1_pins_a: mmc1@0 {
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2016-09-23 05:28:10 -06:00
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pins = "PG3", "PG4", "PG5",
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2015-05-03 03:53:07 -06:00
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"PG6", "PG7", "PG8";
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2016-09-23 05:28:10 -06:00
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function = "mmc1";
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drive-strength = <30>;
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2013-06-09 02:40:53 -06:00
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};
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2016-05-26 13:25:22 -06:00
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2016-10-14 08:32:26 -06:00
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spi2_pins_b: spi2@1 {
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2016-09-23 05:28:10 -06:00
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pins = "PB12", "PB13", "PB14";
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function = "spi2";
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2016-05-26 13:25:22 -06:00
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};
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2016-10-14 08:32:26 -06:00
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spi2_cs0_pins_b: spi2_cs0@1 {
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2016-09-23 05:28:10 -06:00
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pins = "PB11";
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function = "spi2";
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2016-05-26 13:25:22 -06:00
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};
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2013-06-09 02:40:53 -06:00
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};
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2015-03-26 08:53:44 -06:00
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&sram_a {
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emac_sram: sram-section@8000 {
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compatible = "allwinner,sun4i-a10-sram-a3-a4";
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reg = <0x8000 0x4000>;
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status = "disabled";
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};
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};
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