ARM: dts: sun9i: Add A80 Optimus Board support
The A80 Optimus Board is was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash,
4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
This patch adds only basic support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
2014-10-08 07:02:54 -06:00
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/*
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* Copyright 2014 Chen-Yu Tsai
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*
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* Chen-Yu Tsai <wens@csie.org>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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2014-10-17 03:38:23 -06:00
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* a) This file is free software; you can redistribute it and/or
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ARM: dts: sun9i: Add A80 Optimus Board support
The A80 Optimus Board is was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash,
4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
This patch adds only basic support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
2014-10-08 07:02:54 -06:00
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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2014-10-17 03:38:23 -06:00
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* This file is distributed in the hope that it will be useful,
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ARM: dts: sun9i: Add A80 Optimus Board support
The A80 Optimus Board is was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash,
4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
This patch adds only basic support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
2014-10-08 07:02:54 -06:00
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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2014-12-16 14:59:54 -07:00
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#include "sun9i-a80.dtsi"
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ARM: dts: sun9i: Add A80 Optimus Board support
The A80 Optimus Board is was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash,
4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
This patch adds only basic support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
2014-10-08 07:02:54 -06:00
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2014-12-16 14:59:55 -07:00
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#include <dt-bindings/gpio/gpio.h>
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2014-12-16 14:59:57 -07:00
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#include <dt-bindings/pinctrl/sun4i-a10.h>
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ARM: dts: sun9i: Add A80 Optimus Board support
The A80 Optimus Board is was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash,
4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
This patch adds only basic support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
2014-10-08 07:02:54 -06:00
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/ {
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model = "Merrii A80 Optimus Board";
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compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
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2015-01-22 14:10:54 -07:00
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aliases {
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serial0 = &uart0;
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serial1 = &uart4;
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};
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ARM: dts: sun9i: Add A80 Optimus Board support
The A80 Optimus Board is was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash,
4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
This patch adds only basic support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
2014-10-08 07:02:54 -06:00
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chosen {
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2015-03-15 13:47:31 -06:00
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stdout-path = "serial0:115200n8";
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ARM: dts: sun9i: Add A80 Optimus Board support
The A80 Optimus Board is was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash,
4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
This patch adds only basic support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
2014-10-08 07:02:54 -06:00
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};
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2014-10-30 21:05:49 -06:00
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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2015-11-30 22:47:21 -07:00
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pinctrl-0 = <&led_pins_optimus>, <&led_r_pins_optimus>;
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2014-10-30 21:05:49 -06:00
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/* The LED names match those found on the board */
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led2 {
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label = "optimus:led2:usr";
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2014-12-16 14:59:55 -07:00
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gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>;
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2014-10-30 21:05:49 -06:00
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};
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2015-11-30 22:47:21 -07:00
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led3 {
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label = "optimus:led3:usr";
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gpios = <&r_pio 1 15 GPIO_ACTIVE_HIGH>; /* PM15 */
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};
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2014-10-30 21:05:49 -06:00
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led4 {
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label = "optimus:led4:usr";
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2014-12-16 14:59:55 -07:00
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gpios = <&pio 7 0 GPIO_ACTIVE_HIGH>;
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2014-10-30 21:05:49 -06:00
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};
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};
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2015-02-02 15:22:03 -07:00
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2016-06-03 00:50:50 -06:00
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reg_usb1_vbus: usb1-vbus {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&usb1_vbus_pin_optimus>;
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regulator-name = "usb1-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&pio 7 4 GPIO_ACTIVE_HIGH>; /* PH4 */
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};
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2015-02-02 15:22:03 -07:00
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reg_usb3_vbus: usb3-vbus {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&usb3_vbus_pin_optimus>;
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regulator-name = "usb3-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&pio 7 5 GPIO_ACTIVE_HIGH>; /* PH5 */
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};
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2016-10-28 04:11:53 -06:00
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wifi_pwrseq: wifi_pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&ac100_rtc 1>;
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clock-names = "ext_clock";
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/* enables internal regulator and de-asserts reset */
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reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */
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};
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2015-02-02 15:22:03 -07:00
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};
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&ehci0 {
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status = "okay";
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};
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&ehci1 {
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2016-08-27 01:55:44 -06:00
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/* Enable if HSIC peripheral is connected */
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status = "disabled";
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2015-02-02 15:22:03 -07:00
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};
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&ehci2 {
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status = "okay";
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ARM: dts: sun9i: Add A80 Optimus Board support
The A80 Optimus Board is was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 8G NAND flash,
4G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
This patch adds only basic support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
2014-10-08 07:02:54 -06:00
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};
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2015-01-16 22:19:31 -07:00
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2016-06-15 04:27:46 -06:00
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_optimus>;
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vmmc-supply = <®_dcdc1>;
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bus-width = <4>;
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cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH8 */
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cd-inverted;
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status = "okay";
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};
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2016-10-28 04:11:53 -06:00
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>, <&wifi_en_pin_optimus>;
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vmmc-supply = <®_dldo1>;
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vqmmc-supply = <®_cldo3>;
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mmc-pwrseq = <&wifi_pwrseq>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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};
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&mmc1_pins {
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2016-09-23 05:28:10 -06:00
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bias-pull-up;
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2016-10-28 04:11:53 -06:00
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};
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2016-06-15 04:27:46 -06:00
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_8bit_pins>;
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vmmc-supply = <®_dcdc1>;
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bus-width = <8>;
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non-removable;
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cap-mmc-hw-reset;
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status = "okay";
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};
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&mmc2_8bit_pins {
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/* Increase drive strength for DDR modes */
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2016-09-23 05:28:10 -06:00
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drive-strength = <40>;
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2016-06-15 04:27:46 -06:00
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};
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2015-02-02 15:22:03 -07:00
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&ohci0 {
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status = "okay";
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};
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&ohci2 {
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status = "okay";
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};
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2016-08-19 01:42:26 -06:00
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&osc32k {
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/* osc32k input is from AC100 */
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clocks = <&ac100_rtc 0>;
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};
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2015-01-16 22:19:31 -07:00
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&pio {
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led_pins_optimus: led-pins@0 {
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2016-09-23 05:28:10 -06:00
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pins = "PH0", "PH1";
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function = "gpio_out";
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2015-01-16 22:19:31 -07:00
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};
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2015-01-16 22:19:32 -07:00
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mmc0_cd_pin_optimus: mmc0_cd_pin@0 {
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2016-09-23 05:28:10 -06:00
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pins = "PH18";
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function = "gpio_in";
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bias-pull-up;
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2015-01-16 22:19:32 -07:00
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};
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2015-02-02 15:22:03 -07:00
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usb1_vbus_pin_optimus: usb1_vbus_pin@1 {
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2016-09-23 05:28:10 -06:00
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pins = "PH4";
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function = "gpio_out";
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2015-02-02 15:22:03 -07:00
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};
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usb3_vbus_pin_optimus: usb3_vbus_pin@1 {
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2016-09-23 05:28:10 -06:00
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pins = "PH5";
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function = "gpio_out";
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2015-02-02 15:22:03 -07:00
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};
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2015-01-16 22:19:32 -07:00
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};
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2015-11-30 22:47:23 -07:00
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&r_ir {
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status = "okay";
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};
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2015-11-30 22:47:21 -07:00
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&r_pio {
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led_r_pins_optimus: led-pins@1 {
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2016-09-23 05:28:10 -06:00
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pins = "PM15";
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function = "gpio_out";
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2015-11-30 22:47:21 -07:00
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};
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2016-10-28 04:11:53 -06:00
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wifi_en_pin_optimus: wifi_en_pin@0 {
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2016-09-23 05:28:10 -06:00
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pins = "PL2";
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function = "gpio_out";
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2016-10-28 04:11:53 -06:00
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};
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2015-11-30 22:47:21 -07:00
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};
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2015-11-30 22:47:25 -07:00
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&r_rsb {
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status = "okay";
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2016-05-31 10:23:21 -06:00
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axp809: pmic@3a3 {
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reg = <0x3a3>;
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interrupt-parent = <&nmi_intc>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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regulators {
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reg_aldo1: aldo1 {
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/*
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* TODO: This should be handled by the
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* USB PHY driver.
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*/
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regulator-always-on;
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3000000>;
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regulator-name = "vcc33-usbh";
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};
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reg_aldo2: aldo2 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc-pb-io-cam";
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};
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aldo3 {
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/* unused */
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};
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reg_dc5ldo: dc5ldo {
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regulator-always-on;
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1100000>;
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regulator-name = "vdd-cpus-09-usbh";
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};
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|
|
reg_dcdc1: dcdc1 {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <3000000>;
|
|
|
|
regulator-max-microvolt = <3000000>;
|
|
|
|
regulator-name = "vcc-3v";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_dcdc2: dcdc2 {
|
|
|
|
regulator-min-microvolt = <800000>;
|
|
|
|
regulator-max-microvolt = <1100000>;
|
|
|
|
regulator-name = "vdd-gpu";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_dcdc3: dcdc3 {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <800000>;
|
|
|
|
regulator-max-microvolt = <1100000>;
|
|
|
|
regulator-name = "vdd-cpua";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_dcdc4: dcdc4 {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <800000>;
|
|
|
|
regulator-max-microvolt = <1100000>;
|
|
|
|
regulator-name = "vdd-sys-usb0-hdmi";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_dcdc5: dcdc5 {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <1425000>;
|
|
|
|
regulator-max-microvolt = <1575000>;
|
|
|
|
regulator-name = "vcc-dram";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_dldo1: dldo1 {
|
|
|
|
/*
|
|
|
|
* The WiFi chip supports a wide range
|
|
|
|
* (3.0 ~ 4.8V) of voltages, and so does
|
|
|
|
* this regulator (3.0 ~ 4.2V), but
|
|
|
|
* Allwinner SDK always sets it to 3.3V.
|
|
|
|
*/
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-name = "vcc-wifi";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_dldo2: dldo2 {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <3000000>;
|
|
|
|
regulator-max-microvolt = <3000000>;
|
|
|
|
regulator-name = "vcc-pl";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_eldo1: eldo1 {
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
regulator-max-microvolt = <1200000>;
|
|
|
|
regulator-name = "vcc-dvdd-cam";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_eldo2: eldo2 {
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
regulator-name = "vcc-pe";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_eldo3: eldo3 {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <3000000>;
|
|
|
|
regulator-max-microvolt = <3000000>;
|
|
|
|
regulator-name = "vcc-pm-codec-io1";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_ldo_io0: ldo_io0 {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <3000000>;
|
|
|
|
regulator-max-microvolt = <3000000>;
|
|
|
|
regulator-name = "vcc-pg";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_ldo_io1: ldo_io1 {
|
|
|
|
regulator-min-microvolt = <2500000>;
|
|
|
|
regulator-max-microvolt = <2500000>;
|
|
|
|
regulator-name = "vcc-pa-gmac-2v5";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_rtc_ldo: rtc_ldo {
|
|
|
|
regulator-name = "vcc-rtc-vdd1v8-io";
|
|
|
|
};
|
2016-08-27 01:55:40 -06:00
|
|
|
|
|
|
|
sw {
|
|
|
|
/* unused */
|
|
|
|
};
|
2016-05-31 10:23:21 -06:00
|
|
|
};
|
|
|
|
};
|
2016-08-19 01:42:24 -06:00
|
|
|
|
2016-08-27 01:55:42 -06:00
|
|
|
axp806: pmic@745 {
|
|
|
|
compatible = "x-powers,axp806";
|
|
|
|
reg = <0x745>;
|
|
|
|
interrupt-parent = <&nmi_intc>;
|
|
|
|
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
interrupt-controller;
|
|
|
|
#interrupt-cells = <1>;
|
|
|
|
bldoin-supply = <®_dcdce>;
|
|
|
|
|
|
|
|
regulators {
|
|
|
|
reg_s_aldo1: aldo1 {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <3000000>;
|
|
|
|
regulator-max-microvolt = <3000000>;
|
|
|
|
regulator-name = "avcc";
|
|
|
|
};
|
|
|
|
|
|
|
|
aldo2 {
|
|
|
|
/*
|
|
|
|
* unused, but use a different name to
|
|
|
|
* avoid name clash with axp809's aldo's
|
|
|
|
*/
|
|
|
|
regulator-name = "s_aldo2";
|
|
|
|
};
|
|
|
|
|
|
|
|
aldo3 {
|
|
|
|
/*
|
|
|
|
* unused, but use a different name to
|
|
|
|
* avoid name clash with axp809's aldo's
|
|
|
|
*/
|
|
|
|
regulator-name = "s_aldo3";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_bldo1: bldo1 {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <1700000>;
|
|
|
|
regulator-max-microvolt = <1900000>;
|
|
|
|
regulator-name = "vcc18-efuse-adc-display-csi";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_bldo2: bldo2 {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <1700000>;
|
|
|
|
regulator-max-microvolt = <1900000>;
|
|
|
|
regulator-name =
|
|
|
|
"vdd18-drampll-vcc18-pll-cpvdd";
|
|
|
|
};
|
|
|
|
|
|
|
|
bldo3 {
|
|
|
|
/* unused */
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_bldo4: bldo4 {
|
|
|
|
regulator-min-microvolt = <1100000>;
|
|
|
|
regulator-max-microvolt = <1300000>;
|
|
|
|
regulator-name = "vcc12-hsic";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_cldo1: cldo1 {
|
|
|
|
/*
|
|
|
|
* This was 3V in the original design, but
|
|
|
|
* 3.3V is the recommended supply voltage
|
|
|
|
* for the Ethernet PHY.
|
|
|
|
*/
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
regulator-name = "vcc-gmac-phy";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_cldo2: cldo2 {
|
|
|
|
regulator-min-microvolt = <2800000>;
|
|
|
|
regulator-max-microvolt = <2800000>;
|
|
|
|
regulator-name = "afvcc-cam";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_cldo3: cldo3 {
|
|
|
|
regulator-min-microvolt = <3000000>;
|
|
|
|
regulator-max-microvolt = <3000000>;
|
|
|
|
regulator-name = "vcc-io-wifi-codec-io2";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_dcdca: dcdca {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <800000>;
|
|
|
|
regulator-max-microvolt = <1100000>;
|
|
|
|
regulator-name = "vdd-cpub";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_dcdcd: dcdcd {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <800000>;
|
|
|
|
regulator-max-microvolt = <1100000>;
|
|
|
|
regulator-name = "vdd-vpu";
|
|
|
|
};
|
|
|
|
|
|
|
|
reg_dcdce: dcdce {
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-min-microvolt = <2100000>;
|
|
|
|
regulator-max-microvolt = <2100000>;
|
|
|
|
regulator-name = "vcc-bldo-codec-ldoin";
|
|
|
|
};
|
|
|
|
|
|
|
|
sw {
|
|
|
|
/*
|
|
|
|
* unused, but use a different name to
|
|
|
|
* avoid name clash with axp809's sw
|
|
|
|
*/
|
|
|
|
regulator-name = "s_sw";
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2016-08-19 01:42:24 -06:00
|
|
|
ac100: codec@e89 {
|
|
|
|
compatible = "x-powers,ac100";
|
|
|
|
reg = <0xe89>;
|
|
|
|
|
|
|
|
ac100_codec: codec {
|
|
|
|
compatible = "x-powers,ac100-codec";
|
|
|
|
interrupt-parent = <&r_pio>;
|
|
|
|
interrupts = <0 9 IRQ_TYPE_LEVEL_LOW>; /* PL9 */
|
|
|
|
#clock-cells = <0>;
|
|
|
|
clock-output-names = "4M_adda";
|
|
|
|
};
|
|
|
|
|
|
|
|
ac100_rtc: rtc {
|
|
|
|
compatible = "x-powers,ac100-rtc";
|
|
|
|
interrupt-parent = <&nmi_intc>;
|
|
|
|
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
clocks = <&ac100_codec>;
|
|
|
|
#clock-cells = <1>;
|
|
|
|
clock-output-names = "cko1_rtc",
|
|
|
|
"cko2_rtc",
|
|
|
|
"cko3_rtc";
|
|
|
|
};
|
|
|
|
};
|
2015-11-30 22:47:25 -07:00
|
|
|
};
|
|
|
|
|
2016-05-31 10:23:21 -06:00
|
|
|
#include "axp809.dtsi"
|
|
|
|
|
2015-01-16 22:19:31 -07:00
|
|
|
&uart0 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&uart0_pins_a>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2015-02-02 15:22:03 -07:00
|
|
|
&usbphy1 {
|
2015-03-13 21:57:17 -06:00
|
|
|
phy-supply = <®_usb1_vbus>;
|
2015-02-02 15:22:03 -07:00
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usbphy2 {
|
2016-08-27 01:55:42 -06:00
|
|
|
phy-supply = <®_bldo4>;
|
2016-08-27 01:55:44 -06:00
|
|
|
/* Enable if HSIC peripheral is connected */
|
|
|
|
status = "disabled";
|
2015-02-02 15:22:03 -07:00
|
|
|
};
|
|
|
|
|
|
|
|
&usbphy3 {
|
2015-03-13 21:57:17 -06:00
|
|
|
phy-supply = <®_usb3_vbus>;
|
2015-02-02 15:22:03 -07:00
|
|
|
status = "okay";
|
|
|
|
};
|