2015-09-02 19:46:42 -06:00
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/*
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* FBTFT driver for the RA8875 LCD Controller
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* Copyright by Pf@nne & NOTRO
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*
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2014-12-31 02:11:22 -07:00
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include "fbtft.h"
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#define DRVNAME "fb_ra8875"
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static int write_spi(struct fbtft_par *par, void *buf, size_t len)
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{
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struct spi_transfer t = {
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.tx_buf = buf,
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.len = len,
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.speed_hz = 1000000,
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};
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struct spi_message m;
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fbtft_par_dbg_hex(DEBUG_WRITE, par, par->info->device, u8, buf, len,
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"%s(len=%d): ", __func__, len);
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if (!par->spi) {
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dev_err(par->info->device,
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"%s: par->spi is unexpectedly NULL\n", __func__);
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return -1;
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}
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spi_message_init(&m);
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if (par->txbuf.dma && buf == par->txbuf.buf) {
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t.tx_dma = par->txbuf.dma;
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m.is_dma_mapped = 1;
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}
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spi_message_add_tail(&t, &m);
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return spi_sync(par->spi, &m);
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}
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static int init_display(struct fbtft_par *par)
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{
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gpio_set_value(par->gpio.dc, 1);
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fbtft_par_dbg(DEBUG_INIT_DISPLAY, par,
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"%s()\n", __func__);
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fbtft_par_dbg(DEBUG_INIT_DISPLAY, par,
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2015-06-13 13:23:47 -06:00
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"display size %dx%d\n",
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par->info->var.xres,
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par->info->var.yres);
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2014-12-31 02:11:22 -07:00
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par->fbtftops.reset(par);
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if ((par->info->var.xres == 320) && (par->info->var.yres == 240)) {
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/* PLL clock frequency */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x88, 0x0A);
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write_reg(par, 0x89, 0x02);
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2014-12-31 02:11:22 -07:00
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mdelay(10);
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/* color deep / MCU Interface */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x10, 0x0C);
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2014-12-31 02:11:22 -07:00
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/* pixel clock period */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x04, 0x03);
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2014-12-31 02:11:22 -07:00
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mdelay(1);
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/* horizontal settings */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x14, 0x27);
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write_reg(par, 0x15, 0x00);
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write_reg(par, 0x16, 0x05);
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write_reg(par, 0x17, 0x04);
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write_reg(par, 0x18, 0x03);
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2014-12-31 02:11:22 -07:00
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/* vertical settings */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x19, 0xEF);
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write_reg(par, 0x1A, 0x00);
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write_reg(par, 0x1B, 0x05);
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write_reg(par, 0x1C, 0x00);
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write_reg(par, 0x1D, 0x0E);
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write_reg(par, 0x1E, 0x00);
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write_reg(par, 0x1F, 0x02);
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2015-06-13 13:23:47 -06:00
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} else if ((par->info->var.xres == 480) &&
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(par->info->var.yres == 272)) {
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2014-12-31 02:11:22 -07:00
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/* PLL clock frequency */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x88, 0x0A);
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write_reg(par, 0x89, 0x02);
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2014-12-31 02:11:22 -07:00
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mdelay(10);
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/* color deep / MCU Interface */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x10, 0x0C);
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2014-12-31 02:11:22 -07:00
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/* pixel clock period */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x04, 0x82);
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2014-12-31 02:11:22 -07:00
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mdelay(1);
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/* horizontal settings */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x14, 0x3B);
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write_reg(par, 0x15, 0x00);
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write_reg(par, 0x16, 0x01);
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write_reg(par, 0x17, 0x00);
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write_reg(par, 0x18, 0x05);
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2014-12-31 02:11:22 -07:00
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/* vertical settings */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x19, 0x0F);
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write_reg(par, 0x1A, 0x01);
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write_reg(par, 0x1B, 0x02);
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write_reg(par, 0x1C, 0x00);
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write_reg(par, 0x1D, 0x07);
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write_reg(par, 0x1E, 0x00);
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write_reg(par, 0x1F, 0x09);
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2015-06-13 13:23:47 -06:00
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} else if ((par->info->var.xres == 640) &&
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(par->info->var.yres == 480)) {
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2014-12-31 02:11:22 -07:00
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/* PLL clock frequency */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x88, 0x0B);
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write_reg(par, 0x89, 0x02);
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2014-12-31 02:11:22 -07:00
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mdelay(10);
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/* color deep / MCU Interface */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x10, 0x0C);
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2014-12-31 02:11:22 -07:00
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/* pixel clock period */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x04, 0x01);
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2014-12-31 02:11:22 -07:00
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mdelay(1);
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/* horizontal settings */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x14, 0x4F);
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write_reg(par, 0x15, 0x05);
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write_reg(par, 0x16, 0x0F);
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write_reg(par, 0x17, 0x01);
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write_reg(par, 0x18, 0x00);
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2014-12-31 02:11:22 -07:00
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/* vertical settings */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x19, 0xDF);
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write_reg(par, 0x1A, 0x01);
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write_reg(par, 0x1B, 0x0A);
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write_reg(par, 0x1C, 0x00);
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write_reg(par, 0x1D, 0x0E);
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write_reg(par, 0x1E, 0x00);
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write_reg(par, 0x1F, 0x01);
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2015-06-13 13:23:47 -06:00
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} else if ((par->info->var.xres == 800) &&
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(par->info->var.yres == 480)) {
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2014-12-31 02:11:22 -07:00
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/* PLL clock frequency */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x88, 0x0B);
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write_reg(par, 0x89, 0x02);
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2014-12-31 02:11:22 -07:00
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mdelay(10);
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/* color deep / MCU Interface */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x10, 0x0C);
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2014-12-31 02:11:22 -07:00
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/* pixel clock period */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x04, 0x81);
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2014-12-31 02:11:22 -07:00
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mdelay(1);
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/* horizontal settings */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x14, 0x63);
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write_reg(par, 0x15, 0x03);
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write_reg(par, 0x16, 0x03);
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write_reg(par, 0x17, 0x02);
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write_reg(par, 0x18, 0x00);
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2014-12-31 02:11:22 -07:00
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/* vertical settings */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x19, 0xDF);
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write_reg(par, 0x1A, 0x01);
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write_reg(par, 0x1B, 0x14);
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write_reg(par, 0x1C, 0x00);
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write_reg(par, 0x1D, 0x06);
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write_reg(par, 0x1E, 0x00);
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write_reg(par, 0x1F, 0x01);
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2014-12-31 02:11:22 -07:00
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} else {
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dev_err(par->info->device, "display size is not supported!!");
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return -1;
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}
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/* PWM clock */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x8a, 0x81);
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write_reg(par, 0x8b, 0xFF);
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2014-12-31 02:11:22 -07:00
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mdelay(10);
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/* Display ON */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x01, 0x80);
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2014-12-31 02:11:22 -07:00
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mdelay(10);
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return 0;
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}
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static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
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{
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/* Set_Active_Window */
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2015-02-18 19:48:34 -07:00
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write_reg(par, 0x30, xs & 0x00FF);
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write_reg(par, 0x31, (xs & 0xFF00) >> 8);
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write_reg(par, 0x32, ys & 0x00FF);
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write_reg(par, 0x33, (ys & 0xFF00) >> 8);
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2015-09-03 01:53:37 -06:00
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write_reg(par, 0x34, (xs + xe) & 0x00FF);
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write_reg(par, 0x35, ((xs + xe) & 0xFF00) >> 8);
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write_reg(par, 0x36, (ys + ye) & 0x00FF);
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write_reg(par, 0x37, ((ys + ye) & 0xFF00) >> 8);
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2014-12-31 02:11:22 -07:00
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/* Set_Memory_Write_Cursor */
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write_reg(par, 0x46, xs & 0xff);
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write_reg(par, 0x47, (xs >> 8) & 0x03);
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write_reg(par, 0x48, ys & 0xff);
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write_reg(par, 0x49, (ys >> 8) & 0x01);
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write_reg(par, 0x02);
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}
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static void write_reg8_bus8(struct fbtft_par *par, int len, ...)
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{
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va_list args;
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int i, ret;
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2015-10-16 10:19:01 -06:00
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u8 *buf = par->buf;
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2014-12-31 02:11:22 -07:00
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/* slow down spi-speed for writing registers */
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par->fbtftops.write = write_spi;
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if (unlikely(par->debug & DEBUG_WRITE_REGISTER)) {
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va_start(args, len);
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for (i = 0; i < len; i++)
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buf[i] = (u8)va_arg(args, unsigned int);
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va_end(args);
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fbtft_par_dbg_hex(DEBUG_WRITE_REGISTER, par, par->info->device,
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u8, buf, len, "%s: ", __func__);
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}
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va_start(args, len);
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*buf++ = 0x80;
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*buf = (u8)va_arg(args, unsigned int);
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ret = par->fbtftops.write(par, par->buf, 2);
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if (ret < 0) {
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va_end(args);
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Staging: fbtft: clean dev_err() logging
This patch removes __func__ from dev_err. dev_err includes information about:
(devcice, driver, specific instance of device, etc) in the log printout.
This was done using Coccinelle, with the following semantic patch:
@a@
expression E, R;
expression msg;
@@
dev_err(E, msg, __func__, R);
@script:python b@
e << a.msg;
y;
@@
if(e.find("%s: ") == True):
m = e.replace("%s: ", "", 1);
coccinelle.y = m;
elif(e.find("%s ") == True):
m = e.replace("%s ", "", 1);
coccinelle.y = m;
elif(e.find("%s:") == True):
m = e.replace("%s:", "", 1);
coccinelle.y = m;
else:
m = e.replace("%s", "",1);
coccinelle.y = m;
@c@
expression a.E, a.msg, a.R;
identifier b.y;
@@
- dev_err(E, msg, __func__, R);
+ dev_err(E, y, R);
Signed-off-by: Haneen Mohammed <hamohammed.sa@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-03-06 11:59:04 -07:00
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dev_err(par->info->device, "write() failed and returned %dn",
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ret);
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2014-12-31 02:11:22 -07:00
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return;
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}
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len--;
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udelay(100);
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if (len) {
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buf = (u8 *)par->buf;
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*buf++ = 0x00;
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i = len;
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while (i--)
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*buf++ = (u8)va_arg(args, unsigned int);
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ret = par->fbtftops.write(par, par->buf, len + 1);
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if (ret < 0) {
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va_end(args);
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Staging: fbtft: clean dev_err() logging
This patch removes __func__ from dev_err. dev_err includes information about:
(devcice, driver, specific instance of device, etc) in the log printout.
This was done using Coccinelle, with the following semantic patch:
@a@
expression E, R;
expression msg;
@@
dev_err(E, msg, __func__, R);
@script:python b@
e << a.msg;
y;
@@
if(e.find("%s: ") == True):
m = e.replace("%s: ", "", 1);
coccinelle.y = m;
elif(e.find("%s ") == True):
m = e.replace("%s ", "", 1);
coccinelle.y = m;
elif(e.find("%s:") == True):
m = e.replace("%s:", "", 1);
coccinelle.y = m;
else:
m = e.replace("%s", "",1);
coccinelle.y = m;
@c@
expression a.E, a.msg, a.R;
identifier b.y;
@@
- dev_err(E, msg, __func__, R);
+ dev_err(E, y, R);
Signed-off-by: Haneen Mohammed <hamohammed.sa@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-03-06 11:59:04 -07:00
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dev_err(par->info->device,
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"write() failed and returned %dn", ret);
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2014-12-31 02:11:22 -07:00
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return;
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}
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}
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va_end(args);
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/* restore user spi-speed */
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par->fbtftops.write = fbtft_write_spi;
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udelay(100);
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}
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static int write_vmem16_bus8(struct fbtft_par *par, size_t offset, size_t len)
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{
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u16 *vmem16;
|
2016-02-25 11:39:55 -07:00
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u16 *txbuf16 = par->txbuf.buf;
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2014-12-31 02:11:22 -07:00
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size_t remain;
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size_t to_copy;
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size_t tx_array_size;
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int i;
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int ret = 0;
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size_t startbyte_size = 0;
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fbtft_par_dbg(DEBUG_WRITE_VMEM, par, "%s(offset=%zu, len=%zu)\n",
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__func__, offset, len);
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remain = len / 2;
|
2015-10-07 01:20:13 -06:00
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|
vmem16 = (u16 *)(par->info->screen_buffer + offset);
|
2014-12-31 02:11:22 -07:00
|
|
|
tx_array_size = par->txbuf.len / 2;
|
2016-02-25 11:39:55 -07:00
|
|
|
txbuf16 = par->txbuf.buf + 1;
|
2014-12-31 02:11:22 -07:00
|
|
|
tx_array_size -= 2;
|
|
|
|
*(u8 *)(par->txbuf.buf) = 0x00;
|
|
|
|
startbyte_size = 1;
|
|
|
|
|
|
|
|
while (remain) {
|
2016-02-24 10:20:17 -07:00
|
|
|
to_copy = min(tx_array_size, remain);
|
2014-12-31 02:11:22 -07:00
|
|
|
dev_dbg(par->info->device, " to_copy=%zu, remain=%zu\n",
|
|
|
|
to_copy, remain - to_copy);
|
|
|
|
|
|
|
|
for (i = 0; i < to_copy; i++)
|
|
|
|
txbuf16[i] = cpu_to_be16(vmem16[i]);
|
|
|
|
|
|
|
|
vmem16 = vmem16 + to_copy;
|
|
|
|
ret = par->fbtftops.write(par, par->txbuf.buf,
|
|
|
|
startbyte_size + to_copy * 2);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
remain -= to_copy;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct fbtft_display display = {
|
|
|
|
.regwidth = 8,
|
|
|
|
.fbtftops = {
|
|
|
|
.init_display = init_display,
|
|
|
|
.set_addr_win = set_addr_win,
|
|
|
|
.write_register = write_reg8_bus8,
|
|
|
|
.write_vmem = write_vmem16_bus8,
|
|
|
|
.write = write_spi,
|
|
|
|
},
|
|
|
|
};
|
2015-09-03 01:53:36 -06:00
|
|
|
|
2014-12-31 02:11:22 -07:00
|
|
|
FBTFT_REGISTER_DRIVER(DRVNAME, "raio,ra8875", &display);
|
|
|
|
|
|
|
|
MODULE_ALIAS("spi:" DRVNAME);
|
|
|
|
MODULE_ALIAS("platform:" DRVNAME);
|
|
|
|
MODULE_ALIAS("spi:ra8875");
|
|
|
|
MODULE_ALIAS("platform:ra8875");
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("FB driver for the RA8875 LCD Controller");
|
|
|
|
MODULE_AUTHOR("Pf@nne");
|
|
|
|
MODULE_LICENSE("GPL");
|