2005-04-16 16:20:36 -06:00
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/*
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* IDE tuning and bus mastering support for the CS5510/CS5520
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* chipsets
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*
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* The CS5510/CS5520 are slightly unusual devices. Unlike the
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* typical IDE controllers they do bus mastering with the drive in
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* PIO mode and smarter silicon.
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*
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* The practical upshot of this is that we must always tune the
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* drive for the right PIO mode. We must also ignore all the blacklists
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* and the drive bus mastering DMA information.
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*
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* *** This driver is strictly experimental ***
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*
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* (c) Copyright Red Hat Inc 2002
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2, or (at your option) any
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* later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* For the avoidance of doubt the "preferred form" of this code is one which
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* is in an open non patent encumbered format. Where cryptographic key signing
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* forms part of the process of creating an executable the information
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* including keys needed to generate an equivalently functional executable
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* are deemed to be part of the source code.
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*
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/ide.h>
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#include <linux/dma-mapping.h>
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2008-07-24 14:53:32 -06:00
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#define DRV_NAME "cs5520"
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2005-04-16 16:20:36 -06:00
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struct pio_clocks
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{
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int address;
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int assert;
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int recovery;
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};
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static struct pio_clocks cs5520_pio_clocks[]={
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{3, 6, 11},
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{2, 5, 6},
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{1, 4, 3},
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{1, 3, 2},
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{1, 2, 1}
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};
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2007-10-11 15:54:02 -06:00
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static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
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2005-04-16 16:20:36 -06:00
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{
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2009-01-06 09:20:52 -07:00
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ide_hwif_t *hwif = drive->hwif;
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2008-02-01 15:09:31 -07:00
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struct pci_dev *pdev = to_pci_dev(hwif->dev);
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2005-04-16 16:20:36 -06:00
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int controller = drive->dn > 1 ? 1 : 0;
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2007-10-11 15:53:59 -06:00
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2005-04-16 16:20:36 -06:00
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/* 8bit CAT/CRT - 8bit command timing for channel */
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pci_write_config_byte(pdev, 0x62 + controller,
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(cs5520_pio_clocks[pio].recovery << 4) |
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(cs5520_pio_clocks[pio].assert));
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/* 0x64 - 16bit Primary, 0x68 - 16bit Secondary */
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/* FIXME: should these use address ? */
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/* Data read timing */
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pci_write_config_byte(pdev, 0x64 + 4*controller + (drive->dn&1),
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(cs5520_pio_clocks[pio].recovery << 4) |
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(cs5520_pio_clocks[pio].assert));
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/* Write command timing */
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pci_write_config_byte(pdev, 0x66 + 4*controller + (drive->dn&1),
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(cs5520_pio_clocks[pio].recovery << 4) |
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(cs5520_pio_clocks[pio].assert));
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2007-10-11 15:54:01 -06:00
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}
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2007-10-11 15:54:00 -06:00
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ide: move ide_config_drive_speed() calls to upper layers (take 2)
* Convert {ide_hwif_t,ide_pci_device_t}->host_flag to be u16.
* Add IDE_HFLAG_POST_SET_MODE host flag to indicate the need to program
the host for the transfer mode after programming the device. Set it
in au1xxx-ide, amd74xx, cs5530, cs5535, pdc202xx_new, sc1200, pmac
and via82cxxx host drivers.
* Add IDE_HFLAG_NO_SET_MODE host flag to indicate the need to completely
skip programming of host/device for the transfer mode ("smart" hosts).
Set it in it821x host driver and check it in ide_tune_dma().
* Add ide_set_pio_mode()/ide_set_dma_mode() helpers and convert all
direct ->set_pio_mode/->speedproc users to use these helpers.
* Move ide_config_drive_speed() calls from ->set_pio_mode/->speedproc
methods to callers.
* Rename ->speedproc method to ->set_dma_mode, make it void and update
all implementations accordingly.
* Update ide_set_xfer_rate() comments.
* Unexport ide_config_drive_speed().
v2:
* Fix issues noticed by Sergei:
- export ide_set_dma_mode() instead of moving ->set_pio_mode abuse wrt
to setting DMA modes from sc1200_set_pio_mode() to do_special()
- check IDE_HFLAG_NO_SET_MODE in ide_tune_dma()
- check for (hwif->set_pio_mode) == NULL in ide_set_pio_mode()
- check for (hwif->set_dma_mode) == NULL in ide_set_dma_mode()
- return -1 from ide_set_{pio,dma}_mode() if ->set_{pio,dma}_mode == NULL
- don't set ->set_{pio,dma}_mode on it821x in "smart" mode
- fix build problem in pmac.c
- minor fixes in au1xxx-ide.c/cs5530.c/siimage.c
- improve patch description
Changes in behavior caused by this patch:
- HDIO_SET_PIO_MODE ioctl would now return -ENOSYS for attempts to change
PIO mode if it821x controller is in "smart" mode
- removal of two debugging printk-s (from cs5530.c and sc1200.c)
- transfer modes 0x00-0x07 passed from user space may be programmed twice on
the device (not really an issue since 0x00 is not supported correctly by
any host driver ATM, 0x01 is not supported at all and 0x02-0x07 are invalid)
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-10-13 09:47:51 -06:00
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static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed)
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2005-04-16 16:20:36 -06:00
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{
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2007-10-11 15:54:02 -06:00
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printk(KERN_ERR "cs55x0: bad ide timing.\n");
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cs5520_set_pio_mode(drive, 0);
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2005-04-16 16:20:36 -06:00
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}
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2008-04-26 14:25:14 -06:00
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static const struct ide_port_ops cs5520_port_ops = {
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.set_pio_mode = cs5520_set_pio_mode,
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.set_dma_mode = cs5520_set_dma_mode,
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};
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2008-07-24 14:53:32 -06:00
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static const struct ide_port_info cyrix_chipset __devinitdata = {
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.name = DRV_NAME,
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2008-08-05 10:17:03 -06:00
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.enablebits = { { 0x60, 0x01, 0x01 }, { 0x60, 0x02, 0x02 } },
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2008-07-24 14:53:32 -06:00
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.port_ops = &cs5520_port_ops,
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.host_flags = IDE_HFLAG_ISA_PORTS | IDE_HFLAG_CS5520,
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.pio_mask = ATA_PIO4,
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2005-04-16 16:20:36 -06:00
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};
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/*
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* The 5510/5520 are a bit weird. They don't quite set up the way
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* the PCI helper layer expects so we must do much of the set up
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* work longhand.
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*/
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static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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2008-07-24 14:53:32 -06:00
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const struct ide_port_info *d = &cyrix_chipset;
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2009-05-17 11:12:24 -06:00
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hw_regs_t hw[2], *hws[] = { NULL, NULL };
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2005-04-16 16:20:36 -06:00
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ide_setup_pci_noise(dev, d);
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/* We must not grab the entire device, it has 'ISA' space in its
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2007-12-19 21:28:09 -07:00
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* BARS too and we will freak out other bits of the kernel
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*/
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if (pci_enable_device_io(dev)) {
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2005-04-16 16:20:36 -06:00
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printk(KERN_WARNING "%s: Unable to enable 55x0.\n", d->name);
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2005-11-18 15:03:19 -07:00
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return -ENODEV;
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2005-04-16 16:20:36 -06:00
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}
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pci_set_master(dev);
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2009-04-06 20:01:15 -06:00
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if (pci_set_dma_mask(dev, DMA_BIT_MASK(32))) {
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2008-07-24 14:53:32 -06:00
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printk(KERN_WARNING "%s: No suitable DMA available.\n",
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d->name);
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2005-04-16 16:20:36 -06:00
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return -ENODEV;
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}
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/*
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* Now the chipset is configured we can let the core
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* do all the device setup for us
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*/
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2009-03-24 16:22:53 -06:00
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ide_pci_setup_ports(dev, d, &hw[0], &hws[0]);
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hw[0].irq = 14;
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2007-05-09 16:01:11 -06:00
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2009-05-17 11:12:24 -06:00
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return ide_host_add(d, hws, 2, NULL);
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2005-04-16 16:20:36 -06:00
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}
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2007-10-16 14:29:56 -06:00
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static const struct pci_device_id cs5520_pci_tbl[] = {
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{ PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), 0 },
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{ PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), 1 },
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2005-04-16 16:20:36 -06:00
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, cs5520_pci_tbl);
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2008-10-13 13:39:41 -06:00
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static struct pci_driver cs5520_pci_driver = {
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2005-04-16 16:20:36 -06:00
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.name = "Cyrix_IDE",
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.id_table = cs5520_pci_tbl,
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.probe = cs5520_init_one,
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2008-10-10 14:39:32 -06:00
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.suspend = ide_pci_suspend,
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.resume = ide_pci_resume,
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2005-04-16 16:20:36 -06:00
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};
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2007-01-27 05:46:56 -07:00
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static int __init cs5520_ide_init(void)
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2005-04-16 16:20:36 -06:00
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{
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2008-10-13 13:39:41 -06:00
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return ide_pci_register_driver(&cs5520_pci_driver);
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2005-04-16 16:20:36 -06:00
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}
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module_init(cs5520_ide_init);
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("PCI driver module for Cyrix 5510/5520 IDE");
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MODULE_LICENSE("GPL");
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