2014-05-14 08:02:16 -06:00
|
|
|
/*
|
|
|
|
* Copyright © 2014 Intel Corporation
|
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
|
|
* to deal in the Software without restriction, including without limitation
|
|
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice (including the next
|
|
|
|
* paragraph) shall be included in all copies or substantial portions of the
|
|
|
|
* Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
|
|
|
|
* IN THE SOFTWARE.
|
|
|
|
*
|
|
|
|
* Authors:
|
|
|
|
* Mika Kuoppala <mika.kuoppala@intel.com>
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include "i915_drv.h"
|
|
|
|
#include "intel_renderstate.h"
|
|
|
|
|
|
|
|
static const struct intel_renderstate_rodata *
|
|
|
|
render_state_get_rodata(struct drm_device *dev, const int gen)
|
|
|
|
{
|
|
|
|
switch (gen) {
|
|
|
|
case 6:
|
|
|
|
return &gen6_null_state;
|
|
|
|
case 7:
|
|
|
|
return &gen7_null_state;
|
|
|
|
case 8:
|
|
|
|
return &gen8_null_state;
|
2014-10-23 09:34:28 -06:00
|
|
|
case 9:
|
|
|
|
return &gen9_null_state;
|
2014-05-14 08:02:16 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2014-06-10 04:23:33 -06:00
|
|
|
static int render_state_init(struct render_state *so, struct drm_device *dev)
|
2014-05-14 08:02:16 -06:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2014-06-10 04:23:33 -06:00
|
|
|
so->gen = INTEL_INFO(dev)->gen;
|
|
|
|
so->rodata = render_state_get_rodata(dev, so->gen);
|
|
|
|
if (so->rodata == NULL)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (so->rodata->batch_items * 4 > 4096)
|
2014-05-14 08:02:16 -06:00
|
|
|
return -EINVAL;
|
|
|
|
|
2014-06-10 04:23:33 -06:00
|
|
|
so->obj = i915_gem_alloc_object(dev, 4096);
|
|
|
|
if (so->obj == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
ret = i915_gem_obj_ggtt_pin(so->obj, 4096, 0);
|
|
|
|
if (ret)
|
|
|
|
goto free_gem;
|
|
|
|
|
|
|
|
so->ggtt_offset = i915_gem_obj_ggtt_offset(so->obj);
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
free_gem:
|
|
|
|
drm_gem_object_unreference(&so->obj->base);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int render_state_setup(struct render_state *so)
|
|
|
|
{
|
|
|
|
const struct intel_renderstate_rodata *rodata = so->rodata;
|
|
|
|
unsigned int i = 0, reloc_index = 0;
|
|
|
|
struct page *page;
|
|
|
|
u32 *d;
|
|
|
|
int ret;
|
|
|
|
|
2014-05-14 08:02:16 -06:00
|
|
|
ret = i915_gem_object_set_to_cpu_domain(so->obj, true);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2014-06-10 04:23:33 -06:00
|
|
|
page = sg_page(so->obj->pages->sgl);
|
|
|
|
d = kmap(page);
|
|
|
|
|
2014-05-14 08:02:16 -06:00
|
|
|
while (i < rodata->batch_items) {
|
|
|
|
u32 s = rodata->batch[i];
|
|
|
|
|
2014-06-10 04:23:33 -06:00
|
|
|
if (i * 4 == rodata->reloc[reloc_index]) {
|
|
|
|
u64 r = s + so->ggtt_offset;
|
|
|
|
s = lower_32_bits(r);
|
|
|
|
if (so->gen >= 8) {
|
2014-05-14 08:02:16 -06:00
|
|
|
if (i + 1 >= rodata->batch_items ||
|
2015-07-17 10:08:51 -06:00
|
|
|
rodata->batch[i + 1] != 0) {
|
|
|
|
ret = -EINVAL;
|
|
|
|
goto err_out;
|
|
|
|
}
|
2014-05-14 08:02:16 -06:00
|
|
|
|
2014-06-10 04:23:33 -06:00
|
|
|
d[i++] = s;
|
|
|
|
s = upper_32_bits(r);
|
2014-05-14 08:02:16 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
reloc_index++;
|
|
|
|
}
|
|
|
|
|
2014-06-10 04:23:33 -06:00
|
|
|
d[i++] = s;
|
2014-05-14 08:02:16 -06:00
|
|
|
}
|
2014-06-10 04:23:33 -06:00
|
|
|
kunmap(page);
|
2014-05-14 08:02:16 -06:00
|
|
|
|
|
|
|
ret = i915_gem_object_set_to_gtt_domain(so->obj, false);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2014-06-10 04:23:33 -06:00
|
|
|
if (rodata->reloc[reloc_index] != -1) {
|
|
|
|
DRM_ERROR("only %d relocs resolved\n", reloc_index);
|
2014-05-14 08:02:16 -06:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2015-07-17 10:08:51 -06:00
|
|
|
|
|
|
|
err_out:
|
|
|
|
kunmap(page);
|
|
|
|
return ret;
|
2014-05-14 08:02:16 -06:00
|
|
|
}
|
|
|
|
|
2014-08-21 04:40:54 -06:00
|
|
|
void i915_gem_render_state_fini(struct render_state *so)
|
2014-06-10 04:23:33 -06:00
|
|
|
{
|
|
|
|
i915_gem_object_ggtt_unpin(so->obj);
|
|
|
|
drm_gem_object_unreference(&so->obj->base);
|
|
|
|
}
|
|
|
|
|
2014-08-21 04:40:54 -06:00
|
|
|
int i915_gem_render_state_prepare(struct intel_engine_cs *ring,
|
|
|
|
struct render_state *so)
|
2014-05-14 08:02:16 -06:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2014-05-21 10:01:06 -06:00
|
|
|
if (WARN_ON(ring->id != RCS))
|
|
|
|
return -ENOENT;
|
|
|
|
|
2014-08-21 04:40:54 -06:00
|
|
|
ret = render_state_init(so, ring->dev);
|
2014-06-10 04:23:33 -06:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
2014-05-14 08:02:16 -06:00
|
|
|
|
2014-08-21 04:40:54 -06:00
|
|
|
if (so->rodata == NULL)
|
2014-06-10 04:23:33 -06:00
|
|
|
return 0;
|
2014-05-14 08:02:16 -06:00
|
|
|
|
2014-08-21 04:40:54 -06:00
|
|
|
ret = render_state_setup(so);
|
|
|
|
if (ret) {
|
|
|
|
i915_gem_render_state_fini(so);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-05-29 10:43:45 -06:00
|
|
|
int i915_gem_render_state_init(struct drm_i915_gem_request *req)
|
2014-08-21 04:40:54 -06:00
|
|
|
{
|
|
|
|
struct render_state so;
|
|
|
|
int ret;
|
|
|
|
|
2015-05-29 10:43:45 -06:00
|
|
|
ret = i915_gem_render_state_prepare(req->ring, &so);
|
2014-05-14 08:02:16 -06:00
|
|
|
if (ret)
|
2014-08-21 04:40:54 -06:00
|
|
|
return ret;
|
|
|
|
|
|
|
|
if (so.rodata == NULL)
|
|
|
|
return 0;
|
2014-05-14 08:02:16 -06:00
|
|
|
|
2015-05-29 10:44:02 -06:00
|
|
|
ret = req->ring->dispatch_execbuffer(req, so.ggtt_offset,
|
2015-05-29 10:43:45 -06:00
|
|
|
so.rodata->batch_items * 4,
|
|
|
|
I915_DISPATCH_SECURE);
|
2014-05-14 08:02:16 -06:00
|
|
|
if (ret)
|
|
|
|
goto out;
|
|
|
|
|
2015-05-29 10:43:50 -06:00
|
|
|
i915_vma_move_to_active(i915_gem_obj_to_ggtt(so.obj), req);
|
2014-05-14 08:02:16 -06:00
|
|
|
|
|
|
|
out:
|
2014-08-21 04:40:54 -06:00
|
|
|
i915_gem_render_state_fini(&so);
|
2014-05-14 08:02:16 -06:00
|
|
|
return ret;
|
|
|
|
}
|