2012-05-24 07:26:32 -06:00
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/*
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* Copyright (C) ST-Ericsson SA 2012
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*
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* Author: Ola Lilja <ola.o.lilja@stericsson.com>,
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* Roger Nilsson <roger.xr.nilsson@stericsson.com>
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* for ST-Ericsson.
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*
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* License terms:
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <asm/page.h>
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#include <linux/module.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmaengine.h>
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#include <linux/slab.h>
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2012-10-18 06:20:16 -06:00
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#include <linux/platform_data/dma-ste-dma40.h>
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2012-05-24 07:26:32 -06:00
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/dmaengine_pcm.h>
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#include "ux500_msp_i2s.h"
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#include "ux500_pcm.h"
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2013-04-03 03:02:55 -06:00
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#define UX500_PLATFORM_MIN_RATE 8000
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#define UX500_PLATFORM_MAX_RATE 48000
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#define UX500_PLATFORM_MIN_CHANNELS 1
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#define UX500_PLATFORM_MAX_CHANNELS 8
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#define UX500_PLATFORM_PERIODS_BYTES_MIN 128
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#define UX500_PLATFORM_PERIODS_BYTES_MAX (64 * PAGE_SIZE)
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#define UX500_PLATFORM_PERIODS_MIN 2
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#define UX500_PLATFORM_PERIODS_MAX 48
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#define UX500_PLATFORM_BUFFER_BYTES_MAX (2048 * PAGE_SIZE)
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2012-05-24 07:26:32 -06:00
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2013-04-15 11:20:04 -06:00
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static const struct snd_pcm_hardware ux500_pcm_hw = {
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2012-05-24 07:26:32 -06:00
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.info = SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_RESUME |
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SNDRV_PCM_INFO_PAUSE,
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.formats = SNDRV_PCM_FMTBIT_S16_LE |
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SNDRV_PCM_FMTBIT_U16_LE |
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SNDRV_PCM_FMTBIT_S16_BE |
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SNDRV_PCM_FMTBIT_U16_BE,
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.rates = SNDRV_PCM_RATE_KNOT,
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2013-04-03 03:02:55 -06:00
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.rate_min = UX500_PLATFORM_MIN_RATE,
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.rate_max = UX500_PLATFORM_MAX_RATE,
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2012-05-24 07:26:32 -06:00
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.channels_min = UX500_PLATFORM_MIN_CHANNELS,
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.channels_max = UX500_PLATFORM_MAX_CHANNELS,
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.buffer_bytes_max = UX500_PLATFORM_BUFFER_BYTES_MAX,
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.period_bytes_min = UX500_PLATFORM_PERIODS_BYTES_MIN,
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.period_bytes_max = UX500_PLATFORM_PERIODS_BYTES_MAX,
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.periods_min = UX500_PLATFORM_PERIODS_MIN,
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.periods_max = UX500_PLATFORM_PERIODS_MAX,
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};
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2013-04-15 11:20:04 -06:00
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static struct dma_chan *ux500_pcm_request_chan(struct snd_soc_pcm_runtime *rtd,
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struct snd_pcm_substream *substream)
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2012-05-24 07:26:32 -06:00
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{
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struct snd_soc_dai *dai = rtd->cpu_dai;
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u16 per_data_width, mem_data_width;
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struct stedma40_chan_cfg *dma_cfg;
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2013-04-15 11:20:04 -06:00
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struct ux500_msp_dma_params *dma_params;
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2012-05-24 07:26:32 -06:00
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2013-04-15 11:20:04 -06:00
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dma_params = snd_soc_dai_get_dma_data(dai, substream);
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dma_cfg = dma_params->dma_cfg;
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2012-05-24 07:26:32 -06:00
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2013-05-15 03:51:57 -06:00
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mem_data_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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2012-05-24 07:26:32 -06:00
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switch (dma_params->data_size) {
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case 32:
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2013-05-15 03:51:57 -06:00
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per_data_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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2012-05-24 07:26:32 -06:00
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break;
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case 16:
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2013-05-15 03:51:57 -06:00
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per_data_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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2012-05-24 07:26:32 -06:00
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break;
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case 8:
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2013-05-15 03:51:57 -06:00
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per_data_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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2012-05-24 07:26:32 -06:00
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break;
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default:
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2013-05-15 03:51:57 -06:00
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per_data_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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2012-05-24 07:26:32 -06:00
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}
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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dma_cfg->src_info.data_width = mem_data_width;
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dma_cfg->dst_info.data_width = per_data_width;
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} else {
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dma_cfg->src_info.data_width = per_data_width;
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dma_cfg->dst_info.data_width = mem_data_width;
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}
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2013-04-15 11:20:04 -06:00
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return snd_dmaengine_pcm_request_channel(stedma40_filter, dma_cfg);
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2012-05-24 07:26:32 -06:00
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}
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2013-06-12 01:57:59 -06:00
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static int ux500_pcm_prepare_slave_config(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct dma_slave_config *slave_config)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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2013-12-19 08:55:03 -07:00
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struct msp_i2s_platform_data *pdata = rtd->cpu_dai->dev->platform_data;
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struct snd_dmaengine_dai_dma_data *snd_dma_params;
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struct ux500_msp_dma_params *ste_dma_params;
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dma_addr_t dma_addr;
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2013-06-12 01:57:59 -06:00
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int ret;
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2013-12-19 08:55:03 -07:00
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if (pdata) {
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ste_dma_params =
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snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
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dma_addr = ste_dma_params->tx_rx_addr;
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} else {
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snd_dma_params =
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snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
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dma_addr = snd_dma_params->addr;
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}
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2013-06-12 01:57:59 -06:00
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ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config);
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if (ret)
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return ret;
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slave_config->dst_maxburst = 4;
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slave_config->src_maxburst = 4;
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2013-12-19 08:55:02 -07:00
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slave_config->src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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slave_config->dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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2013-06-12 01:57:59 -06:00
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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2013-12-19 08:55:03 -07:00
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slave_config->dst_addr = dma_addr;
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2013-06-12 01:57:59 -06:00
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else
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2013-12-19 08:55:03 -07:00
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slave_config->src_addr = dma_addr;
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2013-06-12 01:57:59 -06:00
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return 0;
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}
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2013-04-15 11:20:04 -06:00
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static const struct snd_dmaengine_pcm_config ux500_dmaengine_pcm_config = {
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.pcm_hardware = &ux500_pcm_hw,
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.compat_request_channel = ux500_pcm_request_chan,
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.prealloc_buffer_size = 128 * 1024,
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2013-06-12 01:57:59 -06:00
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.prepare_slave_config = ux500_pcm_prepare_slave_config,
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2012-05-24 07:26:32 -06:00
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};
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2012-12-07 07:26:35 -07:00
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int ux500_pcm_register_platform(struct platform_device *pdev)
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2012-05-24 07:26:32 -06:00
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{
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int ret;
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2013-04-15 11:20:04 -06:00
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ret = snd_dmaengine_pcm_register(&pdev->dev,
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&ux500_dmaengine_pcm_config,
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SND_DMAENGINE_PCM_FLAG_NO_RESIDUE |
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SND_DMAENGINE_PCM_FLAG_COMPAT |
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SND_DMAENGINE_PCM_FLAG_NO_DT);
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2012-05-24 07:26:32 -06:00
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if (ret < 0) {
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dev_err(&pdev->dev,
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"%s: ERROR: Failed to register platform '%s' (%d)!\n",
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__func__, pdev->name, ret);
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return ret;
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}
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return 0;
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}
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2012-11-23 06:05:41 -07:00
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EXPORT_SYMBOL_GPL(ux500_pcm_register_platform);
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2012-05-24 07:26:32 -06:00
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2012-12-07 07:26:35 -07:00
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int ux500_pcm_unregister_platform(struct platform_device *pdev)
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2012-05-24 07:26:32 -06:00
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{
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2013-04-15 11:20:04 -06:00
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snd_dmaengine_pcm_unregister(&pdev->dev);
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2012-05-24 07:26:32 -06:00
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return 0;
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}
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2012-11-23 06:05:41 -07:00
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EXPORT_SYMBOL_GPL(ux500_pcm_unregister_platform);
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