[PATCH] powerpc: Move xics.[ch] into platforms/pseries
This patch moves the XICS interrupt controller code into the platforms/pseries directory, since it only appears on pSeries machines. If it ever appears on some other machine we can move it to sysdev, although xics.c itself will need a bunch of changes in that case to remove pSeries specific assumptions. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
David Gibson
Paul Mackerras
parent
22b280324a
commit
007e8f51b2
|
|
@ -2,3 +2,4 @@ obj-y := pci.o lpar.o hvCall.o nvram.o reconfig.o \
|
|||
setup.o iommu.o rtas-fw.o ras.o
|
||||
obj-$(CONFIG_SMP) += smp.o
|
||||
obj-$(CONFIG_IBMVIO) += vio.o
|
||||
obj-$(CONFIG_XICS) += xics.o
|
||||
|
|
|
|||
|
|
@ -59,7 +59,7 @@
|
|||
#include <asm/time.h>
|
||||
#include <asm/nvram.h>
|
||||
#include <asm/plpar_wrappers.h>
|
||||
#include <asm/xics.h>
|
||||
#include "xics.h"
|
||||
#include <asm/firmware.h>
|
||||
#include <asm/pmc.h>
|
||||
#include <asm/mpic.h>
|
||||
|
|
|
|||
|
|
@ -39,7 +39,7 @@
|
|||
#include <asm/paca.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/xics.h>
|
||||
#include "xics.h"
|
||||
#include <asm/cputable.h>
|
||||
#include <asm/firmware.h>
|
||||
#include <asm/system.h>
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* arch/ppc64/kernel/xics.c
|
||||
/*
|
||||
* arch/powerpc/platforms/pseries/xics.c
|
||||
*
|
||||
* Copyright 2000 IBM Corporation.
|
||||
*
|
||||
|
|
@ -25,11 +25,12 @@
|
|||
#include <asm/pgtable.h>
|
||||
#include <asm/smp.h>
|
||||
#include <asm/rtas.h>
|
||||
#include <asm/xics.h>
|
||||
#include <asm/hvcall.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/i8259.h>
|
||||
|
||||
#include "xics.h"
|
||||
|
||||
static unsigned int xics_startup(unsigned int irq);
|
||||
static void xics_enable_irq(unsigned int irq);
|
||||
static void xics_disable_irq(unsigned int irq);
|
||||
|
|
@ -61,7 +62,7 @@ static struct radix_tree_root irq_map = RADIX_TREE_INIT(GFP_ATOMIC);
|
|||
/* Want a priority other than 0. Various HW issues require this. */
|
||||
#define DEFAULT_PRIORITY 5
|
||||
|
||||
/*
|
||||
/*
|
||||
* Mark IPIs as higher priority so we can take them inside interrupts that
|
||||
* arent marked SA_INTERRUPT
|
||||
*/
|
||||
|
|
@ -168,11 +169,11 @@ static inline long plpar_xirr(unsigned long *xirr_ret)
|
|||
static int pSeriesLP_xirr_info_get(int n_cpu)
|
||||
{
|
||||
unsigned long lpar_rc;
|
||||
unsigned long return_value;
|
||||
unsigned long return_value;
|
||||
|
||||
lpar_rc = plpar_xirr(&return_value);
|
||||
if (lpar_rc != H_Success)
|
||||
panic(" bad return code xirr - rc = %lx \n", lpar_rc);
|
||||
panic(" bad return code xirr - rc = %lx \n", lpar_rc);
|
||||
return (int)return_value;
|
||||
}
|
||||
|
||||
|
|
@ -184,7 +185,7 @@ static void pSeriesLP_xirr_info_set(int n_cpu, int value)
|
|||
lpar_rc = plpar_eoi(val64);
|
||||
if (lpar_rc != H_Success)
|
||||
panic("bad return code EOI - rc = %ld, value=%lx\n", lpar_rc,
|
||||
val64);
|
||||
val64);
|
||||
}
|
||||
|
||||
void pSeriesLP_cppr_info(int n_cpu, u8 value)
|
||||
|
|
@ -193,7 +194,7 @@ void pSeriesLP_cppr_info(int n_cpu, u8 value)
|
|||
|
||||
lpar_rc = plpar_cppr(value);
|
||||
if (lpar_rc != H_Success)
|
||||
panic("bad return code cppr - rc = %lx\n", lpar_rc);
|
||||
panic("bad return code cppr - rc = %lx\n", lpar_rc);
|
||||
}
|
||||
|
||||
static void pSeriesLP_qirr_info(int n_cpu , u8 value)
|
||||
|
|
@ -202,7 +203,7 @@ static void pSeriesLP_qirr_info(int n_cpu , u8 value)
|
|||
|
||||
lpar_rc = plpar_ipi(get_hard_smp_processor_id(n_cpu), value);
|
||||
if (lpar_rc != H_Success)
|
||||
panic("bad return code qirr - rc = %lx\n", lpar_rc);
|
||||
panic("bad return code qirr - rc = %lx\n", lpar_rc);
|
||||
}
|
||||
|
||||
xics_ops pSeriesLP_ops = {
|
||||
|
|
@ -461,7 +462,7 @@ void xics_init_IRQ(void)
|
|||
struct xics_interrupt_node {
|
||||
unsigned long addr;
|
||||
unsigned long size;
|
||||
} intnodes[NR_CPUS];
|
||||
} intnodes[NR_CPUS];
|
||||
|
||||
ppc64_boot_msg(0x20, "XICS Init");
|
||||
|
||||
|
|
@ -486,7 +487,7 @@ nextnode:
|
|||
ireg = (uint *)get_property(np, "reg", &ilen);
|
||||
if (!ireg)
|
||||
panic("xics_init_IRQ: can't find interrupt reg property");
|
||||
|
||||
|
||||
while (ilen) {
|
||||
intnodes[indx].addr = (unsigned long)*ireg++ << 32;
|
||||
ilen -= sizeof(uint);
|
||||
|
|
@ -554,7 +555,7 @@ nextnode:
|
|||
continue;
|
||||
|
||||
hard_id = get_hard_smp_processor_id(i);
|
||||
xics_per_cpu[i] = ioremap(intnodes[hard_id].addr,
|
||||
xics_per_cpu[i] = ioremap(intnodes[hard_id].addr,
|
||||
intnodes[hard_id].size);
|
||||
}
|
||||
#else
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* arch/ppc64/kernel/xics.h
|
||||
/*
|
||||
* arch/powerpc/platforms/pseries/xics.h
|
||||
*
|
||||
* Copyright 2000 IBM Corporation.
|
||||
*
|
||||
|
|
@ -9,8 +9,8 @@
|
|||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef _PPC64_KERNEL_XICS_H
|
||||
#define _PPC64_KERNEL_XICS_H
|
||||
#ifndef _POWERPC_KERNEL_XICS_H
|
||||
#define _POWERPC_KERNEL_XICS_H
|
||||
|
||||
#include <linux/cache.h>
|
||||
|
||||
|
|
@ -31,4 +31,4 @@ struct xics_ipi_struct {
|
|||
|
||||
extern struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
|
||||
|
||||
#endif /* _PPC64_KERNEL_XICS_H */
|
||||
#endif /* _POWERPC_KERNEL_XICS_H */
|
||||
|
|
@ -53,8 +53,6 @@ obj-$(CONFIG_BOOTX_TEXT) += btext.o
|
|||
endif
|
||||
obj-$(CONFIG_HVCS) += hvcserver.o
|
||||
|
||||
obj-$(CONFIG_XICS) += xics.o
|
||||
|
||||
obj-$(CONFIG_PPC_PMAC) += udbg_scc.o
|
||||
|
||||
obj-$(CONFIG_PPC_MAPLE) += maple_setup.o maple_pci.o maple_time.o \
|
||||
|
|
|
|||
Loading…
Reference in a new issue