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MLK-14012 pinctrl: imx: fix imx_pinctrl_parse_pin 

list is a local variable, each time imx_pinctrl_parse_pin is
invoked, list points to the first pin. Directly use list_p in
imx_pinctrl_parse_pin to fix it.

When splitting pinctrl-imx.c, two pieces code is correctly moved.
 - In imx_pmx_set_one_pin, when mux_reg is -1, need to return 0 to
   let the caller continue the loop.
 - In imx_pinctrl_parse_pin, need to use (mux_reg != -1) when calculating
   the pin_id.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
pull/10/head
Peng Fan 2017-02-21 10:51:23 +08:00 committed by Jason Liu
parent 36c16b2436
commit 014a30b7c6
2 changed files with 10 additions and 14 deletions
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17
drivers/pinctrl/freescale/pinctrl-memmap.c
View File

@ -45,7 +45,7 @@ int imx_pmx_set_one_pin(struct imx_pinctrl *ipctl, struct imx_pin *pin)
if (pin_reg->mux_reg == -1) {
dev_err(ipctl->dev, "Pin(%s) does not support mux function\n",
info->pins[pin_id].name);
return -EINVAL;
return 0;
}
if (info->flags & SHARE_MUX_CONF_REG) {
@ -171,8 +171,7 @@ int imx_pinctrl_parse_pin(struct imx_pinctrl_soc_info *info,
const __be32 **list_p, u32 generic_config)
{
struct imx_pin_memmap *pin_memmap = &pin->pin_conf.pin_memmap;
const __be32 *list = *list_p;
u32 mux_reg = be32_to_cpu(*list++);
u32 mux_reg = be32_to_cpu(*((*list_p)++));
u32 conf_reg;
u32 config;
unsigned int pin_id;
@ -181,27 +180,27 @@ int imx_pinctrl_parse_pin(struct imx_pinctrl_soc_info *info,
if (info->flags & SHARE_MUX_CONF_REG) {
conf_reg = mux_reg;
} else {
conf_reg = be32_to_cpu(*list++);
conf_reg = be32_to_cpu(*((*list_p)++));
if (!conf_reg)
conf_reg = -1;
}
pin_id = mux_reg ? mux_reg / 4 : conf_reg / 4;
pin_id = (mux_reg != -1) ? mux_reg / 4 : conf_reg / 4;
pin_reg = &info->pin_regs[pin_id];
pin->pin = pin_id;
*grp_pin_id = pin_id;
pin_reg->mux_reg = mux_reg;
pin_reg->conf_reg = conf_reg;
pin_memmap->input_reg = be32_to_cpu(*list++);
pin_memmap->mux_mode = be32_to_cpu(*list++);
pin_memmap->input_val = be32_to_cpu(*list++);
pin_memmap->input_reg = be32_to_cpu(*((*list_p)++));
pin_memmap->mux_mode = be32_to_cpu(*((*list_p)++));
pin_memmap->input_val = be32_to_cpu((*(*list_p)++));
if (info->generic_pinconf) {
/* generic pin config decoded */
pin_memmap->config = generic_config;
} else {
/* legacy pin config read from devicetree */
config = be32_to_cpu(*list++);
config = be32_to_cpu(*((*list_p)++));
/* SION bit is in mux register */
if (config & IMX_PAD_SION)

7
drivers/pinctrl/freescale/pinctrl-scu.c
View File

@ -87,14 +87,11 @@ int imx_pinctrl_parse_pin(struct imx_pinctrl_soc_info *info,
unsigned int *pin_id, struct imx_pin *pin,
const __be32 **list_p, u32 generic_config)
{
const __be32 *list = *list_p;
struct imx_pin_scu *pin_scu = &pin->pin_conf.pin_scu;
pin->pin = be32_to_cpu(*list++);
pin->pin = be32_to_cpu(*((*list_p)++));
*pin_id = pin->pin;
pin_scu->all = be32_to_cpu(*list++);
*list_p = list;
pin_scu->all = be32_to_cpu(*((*list_p)++));
dev_dbg(info->dev, "%s: 0x%x",
info->pins[pin->pin].name, pin_scu->all);