drm/i915: Sharing platform specific sequence between runtime and system suspend/ resume paths
On VLV, post S0i3 during i915_drm_thaw following issue is observed during ring initialization. [ 335.604039] [drm:stop_ring] ERROR render ring :timed out trying to stop ring [ 336.607340] [drm:stop_ring] ERROR render ring :timed out trying to stop ring [ 336.607345] [drm:init_ring_common] ERROR failed to set render ring head to zero ctl 00000000 head 00000000 tail 00000000 start 00000000 [ 337.610645] [drm:stop_ring] ERROR bsd ring :timed out trying to stop ring [ 338.613952] [drm:stop_ring] ERROR bsd ring :timed out trying to stop ring [ 338.613956] [drm:init_ring_common] ERROR failed to set bsd ring head to zero ctl 00000000 head 00000000 tail 00000000 start 00000000 [ 339.617256] [drm:stop_ring] ERROR render ring :timed out trying to stop ring [ 339.617258] -----------[ cut here ]----------- [ 339.617267] WARNING: CPU: 0 PID: 6 at drivers/gpu/drm/i915/intel_ringbuffer.c:1666 intel_cleanup_ring+0xe6/0xf0() [ 339.617396] --[ end trace 5ef5ed1a3c92e2a6 ]-- [ 339.617428] [drm:__i915_drm_thaw] ERROR failed to re-initialize GPU, declaring wedged! This is happening since wake is not enabled and Gunit registers are not restored. For this system suspend/resume paths need to follow save/restore and additional platform specific setup in suspend_complete and resume_prepare. suspend_complete is shared unconditionaly for VLV, HSW, BDW. resume_prepare for HSW and BDW has pc8 disabling which is needed during thaw_early so sharing uncondtionally. For VLV and SNB runtime resume specific sequence exists. Cc: Imre Deak <imre.deak@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Goel, Akash <akash.goel@intel.com> Signed-off-by: Sagar Kamble <sagar.a.kamble@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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ebc3282409
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@ -496,7 +496,8 @@ bool i915_semaphore_is_enabled(struct drm_device *dev)
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static int intel_suspend_complete(struct drm_i915_private *dev_priv);
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static int intel_resume_prepare(struct drm_i915_private *dev_priv);
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static int intel_resume_prepare(struct drm_i915_private *dev_priv,
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bool rpm_resume);
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static int i915_drm_freeze(struct drm_device *dev)
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{
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@ -604,15 +605,17 @@ int i915_suspend(struct drm_device *dev, pm_message_t state)
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static int i915_drm_thaw_early(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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int ret;
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if (IS_HASWELL(dev) || IS_BROADWELL(dev))
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hsw_disable_pc8(dev_priv);
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ret = intel_resume_prepare(dev_priv, false);
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if (ret)
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DRM_ERROR("Resume prepare failed: %d,Continuing resume\n", ret);
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intel_uncore_early_sanitize(dev, true);
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intel_uncore_sanitize(dev);
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intel_power_domains_init_hw(dev_priv);
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return 0;
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return ret;
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}
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static int __i915_drm_thaw(struct drm_device *dev, bool restore_gtt_mappings)
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@ -888,6 +891,7 @@ static int i915_pm_suspend_late(struct device *dev)
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struct pci_dev *pdev = to_pci_dev(dev);
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struct drm_device *drm_dev = pci_get_drvdata(pdev);
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struct drm_i915_private *dev_priv = drm_dev->dev_private;
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int ret;
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/*
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* We have a suspedn ordering issue with the snd-hda driver also
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@ -901,13 +905,16 @@ static int i915_pm_suspend_late(struct device *dev)
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if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
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return 0;
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if (IS_HASWELL(drm_dev) || IS_BROADWELL(drm_dev))
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hsw_enable_pc8(dev_priv);
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ret = intel_suspend_complete(dev_priv);
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pci_disable_device(pdev);
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pci_set_power_state(pdev, PCI_D3hot);
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if (ret)
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DRM_ERROR("Suspend complete failed: %d\n", ret);
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else {
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pci_disable_device(pdev);
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pci_set_power_state(pdev, PCI_D3hot);
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}
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return 0;
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return ret;
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}
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static int i915_pm_resume_early(struct device *dev)
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@ -970,16 +977,19 @@ static int hsw_suspend_complete(struct drm_i915_private *dev_priv)
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return 0;
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}
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static int snb_resume_prepare(struct drm_i915_private *dev_priv)
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static int snb_resume_prepare(struct drm_i915_private *dev_priv,
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bool rpm_resume)
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{
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struct drm_device *dev = dev_priv->dev;
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intel_init_pch_refclk(dev);
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if (rpm_resume)
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intel_init_pch_refclk(dev);
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return 0;
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}
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static int hsw_resume_prepare(struct drm_i915_private *dev_priv)
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static int hsw_resume_prepare(struct drm_i915_private *dev_priv,
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bool rpm_resume)
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{
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hsw_disable_pc8(dev_priv);
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@ -1315,7 +1325,8 @@ err1:
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return err;
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}
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static int vlv_resume_prepare(struct drm_i915_private *dev_priv)
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static int vlv_resume_prepare(struct drm_i915_private *dev_priv,
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bool rpm_resume)
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{
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struct drm_device *dev = dev_priv->dev;
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int err;
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@ -1340,8 +1351,10 @@ static int vlv_resume_prepare(struct drm_i915_private *dev_priv)
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vlv_check_no_gt_access(dev_priv);
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intel_init_clock_gating(dev);
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i915_gem_restore_fences(dev);
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if (rpm_resume) {
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intel_init_clock_gating(dev);
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i915_gem_restore_fences(dev);
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}
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return ret;
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}
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@ -1431,7 +1444,7 @@ static int intel_runtime_resume(struct device *device)
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intel_opregion_notify_adapter(dev, PCI_D0);
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dev_priv->pm.suspended = false;
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ret = intel_resume_prepare(dev_priv);
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ret = intel_resume_prepare(dev_priv, true);
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/*
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* No point of rolling back things in case of an error, as the best
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* we can do is to hope that things will still work (and disable RPM).
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@ -1450,6 +1463,10 @@ static int intel_runtime_resume(struct device *device)
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return ret;
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}
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/*
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* This function implements common functionality of runtime and system
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* suspend sequence.
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*/
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static int intel_suspend_complete(struct drm_i915_private *dev_priv)
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{
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struct drm_device *dev = dev_priv->dev;
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@ -1469,17 +1486,23 @@ static int intel_suspend_complete(struct drm_i915_private *dev_priv)
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return ret;
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}
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static int intel_resume_prepare(struct drm_i915_private *dev_priv)
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/*
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* This function implements common functionality of runtime and system
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* resume sequence. Variable rpm_resume used for implementing different
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* code paths.
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*/
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static int intel_resume_prepare(struct drm_i915_private *dev_priv,
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bool rpm_resume)
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{
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struct drm_device *dev = dev_priv->dev;
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int ret;
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if (IS_GEN6(dev)) {
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ret = snb_resume_prepare(dev_priv);
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ret = snb_resume_prepare(dev_priv, rpm_resume);
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} else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
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ret = hsw_resume_prepare(dev_priv);
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ret = hsw_resume_prepare(dev_priv, rpm_resume);
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} else if (IS_VALLEYVIEW(dev)) {
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ret = vlv_resume_prepare(dev_priv);
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ret = vlv_resume_prepare(dev_priv, rpm_resume);
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} else {
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WARN_ON(1);
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ret = -ENODEV;
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