MLK-17639-2: ARM64: dts: enable spdif rx for HDMI ARC
enable spdif rx for HDMI ARC Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>pull/10/head
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c7604e00a0
commit
0240e5e248
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@ -29,6 +29,13 @@
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sound-amix-sai {
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status = "disabled";
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};
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sound-hdmi-arc {
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compatible = "fsl,imx-audio-spdif";
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model = "imx-hdmi-arc";
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spdif-controller = <&spdif1>;
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spdif-in;
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};
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};
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&dpu1 {
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@ -85,3 +92,11 @@
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fsl,sai-asynchronous;
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status = "okay";
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};
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&spdif1 {
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assigned-clocks =<&clk IMX8QM_AUD_PLL0_DIV>,
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<&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
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<&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>;
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assigned-clock-rates = <786432000>, <49152000>, <12288000>;
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status = "okay";
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};
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@ -2617,6 +2617,8 @@
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<0x0 0x59270000 0x0 0x10000>, /* esai0 tx */
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<0x0 0x59280000 0x0 0x10000>, /* spdif0 rx */
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<0x0 0x59290000 0x0 0x10000>, /* spdif0 tx */
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<0x0 0x592A0000 0x0 0x10000>, /* spdif1 rx */
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<0x0 0x592B0000 0x0 0x10000>, /* spdif1 tx */
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<0x0 0x592c0000 0x0 0x10000>, /* sai0 rx */
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<0x0 0x592d0000 0x0 0x10000>, /* sai0 tx */
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<0x0 0x592e0000 0x0 0x10000>, /* sai1 rx */
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@ -2625,7 +2627,7 @@
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<0x0 0x59330000 0x0 0x10000>; /* sai5 tx */
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#dma-cells = <3>;
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shared-interrupt;
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dma-channels = <16>;
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dma-channels = <18>;
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interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, /* asrc0 */
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<GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
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@ -2636,6 +2638,8 @@
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<GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, /* spdif0 */
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<GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>, /* spdif1 */
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<GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, /* sai0 */
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<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, /* sai1 */
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@ -2647,6 +2651,7 @@
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"edma2-chan4-tx", "edma2-chan5-tx",
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"edma2-chan6-rx", "edma2-chan7-tx", /* esai0 */
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"edma2-chan8-rx", "edma2-chan9-tx", /* spdif0 */
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"edma2-chan10-rx", "edma2-chan11-tx", /* spdif1 */
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"edma2-chan12-rx", "edma2-chan13-tx", /* sai0 */
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"edma2-chan14-rx", "edma2-chan15-tx", /* sai1 */
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"edma2-chan18-rx", "edma2-chan19-tx"; /* sai4, sai5 */
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@ -3223,6 +3228,32 @@
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status = "disabled";
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};
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spdif1: spdif@59030000 {
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compatible = "fsl,imx8qm-spdif";
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reg = <0x0 0x59030000 0x0 0x10000>;
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interrupts = <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, /* rx */
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<GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>; /* tx */
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clocks = <&clk IMX8QM_AUD_SPDIF_1_GCLKW>, /* core */
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<&clk IMX8QM_CLK_DUMMY>, /* rxtx0 */
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<&clk IMX8QM_AUD_SPDIF_1_TX_CLK>, /* rxtx1 */
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<&clk IMX8QM_CLK_DUMMY>, /* rxtx2 */
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<&clk IMX8QM_CLK_DUMMY>, /* rxtx3 */
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<&clk IMX8QM_CLK_DUMMY>, /* rxtx4 */
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<&clk IMX8QM_IPG_AUD_CLK_ROOT>, /* rxtx5 */
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<&clk IMX8QM_CLK_DUMMY>, /* rxtx6 */
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<&clk IMX8QM_CLK_DUMMY>, /* rxtx7 */
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<&clk IMX8QM_CLK_DUMMY>; /* spba */
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clock-names = "core", "rxtx0",
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"rxtx1", "rxtx2",
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"rxtx3", "rxtx4",
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"rxtx5", "rxtx6",
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"rxtx7", "spba";
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dmas = <&edma2 10 0 5>, <&edma2 11 0 4>;
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dma-names = "rx", "tx";
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power-domains = <&pd_spdif1>;
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status = "disabled";
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};
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sai1: sai@59050000 {
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compatible = "fsl,imx8qm-sai";
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reg = <0x0 0x59050000 0x0 0x10000>;
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