MLK-13482 drivers: char: otp: support i.MX6SLL
Support i.MX6SLL OTP. There are 4 works in bank7/bank8. When read, use address offset. When prog, use bank/index, note that bank7/bank8 we treat them a single bank when prog. Tested GP41 and GP31 read/write on eng sample chip. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit f8698b66fcbec7409b738a4c5b05ba87f0342cf8)pull/10/head
parent
aa5b6e04b6
commit
024bf84a8f
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@ -99,6 +99,17 @@ static const char *imx6sl_otp_desc[][8] = {
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BANK8(GP_HI0, GP_HI1, GP_HI2, GP_HI3, GP_HI4, GP_HI5, GP_HI6, GP_HI7),
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};
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static const char *imx6sll_otp_desc[][8] = {
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BANK8(LOCK, CFG0, CFG1, CFG2, CFG3, CFG4, CFG5, CFG6),
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BANK8(MEM0, MEM1, MEM2, MEM3, MEM4, ANA0, ANA1, USB),
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BANK8(OTPMK0, OTPMK1, OTPMK2, OTPMK3, OTPMK4, OTPMK5, OTPMK6, OTPMK7),
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BANK8(SRK0, SRK1, SRK2, SRK3, SRK4, SRK5, SRK6, SRK7),
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BANK8(SJC_RESP0, SJC_RESP1, MAC0, MAC1, MAC2, CRC0, GP1, GP2),
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BANK8(SW_GP0, SW_GP1, SW_GP2, SW_GP3, SW_GP4, MISC_CONF, FIELD_RETURN, SRK_REVOKE),
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BANK8(ROM_PATCH0, ROM_PATCH1, ROM_PATCH2, ROM_PATCH3, ROM_PATCH4, ROM_PATCH5, ROM_PATCH6, ROM_PATCH7),
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BANK8(GP30, GP31, GP32, GP33, GP40, GP41, GP42, GP43),
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};
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static const char *imx6ul_otp_desc[][8] = {
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BANK8(LOCK, CFG0, CFG1, CFG2, CFG3, CFG4, CFG5, CFG6),
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BANK8(MEM0, MEM1, MEM2, MEM3, MEM4, ANA0, ANA1, ANA2),
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@ -160,6 +171,7 @@ enum fsl_otp_devtype {
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FSL_OTP_MX6DL,
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FSL_OTP_MX6SX,
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FSL_OTP_MX6SL,
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FSL_OTP_MX6SLL,
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FSL_OTP_MX6UL,
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FSL_OTP_MX6ULL,
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FSL_OTP_MX7D,
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@ -194,9 +206,12 @@ static struct fsl_otp_devtype_data *fsl_otp;
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* account for this hole in address space.
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*
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* Similar hole exists between bank 14 and bank 15 of size 0x80
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* on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX.
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* on iMX6QP, iMX6DQ, iMX6SDL, i.MX6SLL and iMX6SX.
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* Note: iMX6SL has only 0-7 banks and there is no hole.
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* Note: iMX6UL doesn't have this one.
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*
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* To i.MX6SLL, there are 9 banks. bank 7 and bank8 only contain 4 words
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* each. Other banks contains 8 words.
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*/
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static u32 fsl_otp_bank_physical(struct fsl_otp_devtype_data *d, int bank)
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{
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@ -205,7 +220,9 @@ static u32 fsl_otp_bank_physical(struct fsl_otp_devtype_data *d, int bank)
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if ((bank == 0) || (d->devtype == FSL_OTP_MX6SL) ||
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(d->devtype == FSL_OTP_MX7D))
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phy_bank = bank;
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else if ((d->devtype == FSL_OTP_MX6UL) || (d->devtype == FSL_OTP_MX6ULL)) {
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else if ((d->devtype == FSL_OTP_MX6UL) ||
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(d->devtype == FSL_OTP_MX6ULL) ||
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(d->devtype == FSL_OTP_MX6SLL)) {
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if (bank >= 6)
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phy_bank = fsl_otp_bank_physical(d, 5) + bank - 3;
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else
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@ -293,6 +310,14 @@ static struct fsl_otp_devtype_data imx6sl_data = {
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.set_otp_timing = imx6_set_otp_timing,
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};
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static struct fsl_otp_devtype_data imx6sll_data = {
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.devtype = FSL_OTP_MX6SLL,
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.bank_desc = (const char **)imx6sll_otp_desc,
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/* Bank 7 and Bank 8 are 4 words each */
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.fuse_nums = 8 * 8,
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.set_otp_timing = imx6_set_otp_timing,
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};
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static struct fsl_otp_devtype_data imx6ul_data = {
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.devtype = FSL_OTP_MX6UL,
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.bank_desc = (const char **)imx6ul_otp_desc,
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@ -477,6 +502,7 @@ out:
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static const struct of_device_id fsl_otp_dt_ids[] = {
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{ .compatible = "fsl,imx6q-ocotp", .data = (void *)&imx6q_data, },
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{ .compatible = "fsl,imx6sl-ocotp", .data = (void *)&imx6sl_data, },
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{ .compatible = "fsl,imx6sll-ocotp", .data = (void *)&imx6sll_data, },
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{ .compatible = "fsl,imx6ul-ocotp", .data = (void *)&imx6ul_data, },
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{ .compatible = "fsl,imx6ull-ocotp", .data = (void *)&imx6ull_data, },
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{ .compatible = "fsl,imx7d-ocotp", .data = (void *)&imx7d_data, },
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