MIPS: CMP: activate CMP support
Most of the CMP support was added before, this mostly correct compile problems but adds a platform specific translation for the interrupt number based on cpu number. Signed-off-by: Tim Anderson <tanderson@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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0365070f05
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@ -229,7 +229,7 @@ config MIPS_MALTA
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select SYS_SUPPORTS_64BIT_KERNEL
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select SYS_SUPPORTS_64BIT_KERNEL
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select SYS_SUPPORTS_BIG_ENDIAN
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select SYS_SUPPORTS_BIG_ENDIAN
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_SUPPORTS_LITTLE_ENDIAN
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select SYS_SUPPORTS_MIPS_CMP if BROKEN # because SYNC_R4K is broken
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select SYS_SUPPORTS_MIPS_CMP
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select SYS_SUPPORTS_MULTITHREADING
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select SYS_SUPPORTS_MULTITHREADING
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select SYS_SUPPORTS_SMARTMIPS
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select SYS_SUPPORTS_SMARTMIPS
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help
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help
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7
arch/mips/include/asm/amon.h
Normal file
7
arch/mips/include/asm/amon.h
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@ -0,0 +1,7 @@
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/*
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* Amon support
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*/
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int amon_cpu_avail(int);
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void amon_cpu_start(int, unsigned long, unsigned long,
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unsigned long, unsigned long);
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@ -487,5 +487,7 @@ extern void gic_init(unsigned long gic_base_addr,
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extern unsigned int gic_get_int(void);
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extern unsigned int gic_get_int(void);
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extern void gic_send_ipi(unsigned int intr);
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extern void gic_send_ipi(unsigned int intr);
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extern unsigned int plat_ipi_call_int_xlate(unsigned int);
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extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
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#endif /* _ASM_GICREGS_H */
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#endif /* _ASM_GICREGS_H */
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@ -37,80 +37,24 @@
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#include <asm/mipsregs.h>
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#include <asm/mipsregs.h>
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#include <asm/mipsmtregs.h>
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#include <asm/mipsmtregs.h>
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#include <asm/mips_mt.h>
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#include <asm/mips_mt.h>
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#include <asm/amon.h>
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/*
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#include <asm/gic.h>
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* Crude manipulation of the CPU masks to control which
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* which CPU's are brought online during initialisation
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*
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* Beware... this needs to be called after CPU discovery
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* but before CPU bringup
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*/
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static int __init allowcpus(char *str)
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{
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cpumask_t cpu_allow_map;
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char buf[256];
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int len;
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cpus_clear(cpu_allow_map);
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if (cpulist_parse(str, &cpu_allow_map) == 0) {
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cpu_set(0, cpu_allow_map);
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cpus_and(cpu_possible_map, cpu_possible_map, cpu_allow_map);
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len = cpulist_scnprintf(buf, sizeof(buf)-1, &cpu_possible_map);
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buf[len] = '\0';
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pr_debug("Allowable CPUs: %s\n", buf);
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return 1;
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} else
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return 0;
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}
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__setup("allowcpus=", allowcpus);
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static void ipi_call_function(unsigned int cpu)
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static void ipi_call_function(unsigned int cpu)
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{
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{
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unsigned int action = 0;
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pr_debug("CPU%d: %s cpu %d status %08x\n",
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pr_debug("CPU%d: %s cpu %d status %08x\n",
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smp_processor_id(), __func__, cpu, read_c0_status());
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smp_processor_id(), __func__, cpu, read_c0_status());
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switch (cpu) {
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gic_send_ipi(plat_ipi_call_int_xlate(cpu));
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case 0:
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action = GIC_IPI_EXT_INTR_CALLFNC_VPE0;
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break;
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case 1:
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action = GIC_IPI_EXT_INTR_CALLFNC_VPE1;
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break;
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case 2:
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action = GIC_IPI_EXT_INTR_CALLFNC_VPE2;
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break;
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case 3:
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action = GIC_IPI_EXT_INTR_CALLFNC_VPE3;
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break;
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}
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gic_send_ipi(action);
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}
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}
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static void ipi_resched(unsigned int cpu)
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static void ipi_resched(unsigned int cpu)
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{
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{
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unsigned int action = 0;
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pr_debug("CPU%d: %s cpu %d status %08x\n",
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pr_debug("CPU%d: %s cpu %d status %08x\n",
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smp_processor_id(), __func__, cpu, read_c0_status());
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smp_processor_id(), __func__, cpu, read_c0_status());
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switch (cpu) {
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gic_send_ipi(plat_ipi_resched_int_xlate(cpu));
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case 0:
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action = GIC_IPI_EXT_INTR_RESCHED_VPE0;
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break;
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case 1:
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action = GIC_IPI_EXT_INTR_RESCHED_VPE1;
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break;
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case 2:
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action = GIC_IPI_EXT_INTR_RESCHED_VPE2;
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break;
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case 3:
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action = GIC_IPI_EXT_INTR_RESCHED_VPE3;
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break;
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}
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gic_send_ipi(action);
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}
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}
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/*
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/*
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@ -206,7 +150,7 @@ static void cmp_boot_secondary(int cpu, struct task_struct *idle)
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(unsigned long)(gp + sizeof(struct thread_info)));
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(unsigned long)(gp + sizeof(struct thread_info)));
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#endif
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#endif
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amon_cpu_start(cpu, pc, sp, gp, a0);
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amon_cpu_start(cpu, pc, sp, (unsigned long)gp, a0);
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}
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}
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/*
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/*
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@ -336,6 +336,16 @@ static int gic_resched_int_base;
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static int gic_call_int_base;
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static int gic_call_int_base;
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#define GIC_RESCHED_INT(cpu) (gic_resched_int_base+(cpu))
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#define GIC_RESCHED_INT(cpu) (gic_resched_int_base+(cpu))
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#define GIC_CALL_INT(cpu) (gic_call_int_base+(cpu))
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#define GIC_CALL_INT(cpu) (gic_call_int_base+(cpu))
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unsigned int plat_ipi_call_int_xlate(unsigned int cpu)
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{
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return GIC_CALL_INT(cpu);
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}
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unsigned int plat_ipi_resched_int_xlate(unsigned int cpu)
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{
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return GIC_RESCHED_INT(cpu);
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}
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#endif /* CONFIG_MIPS_MT_SMP */
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#endif /* CONFIG_MIPS_MT_SMP */
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static struct irqaction i8259irq = {
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static struct irqaction i8259irq = {
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