Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into for-upstream
This commit is contained in:
commit
03806fa20f
1
.gitignore
vendored
1
.gitignore
vendored
|
@ -37,6 +37,7 @@ modules.builtin
|
|||
tags
|
||||
TAGS
|
||||
vmlinux
|
||||
vmlinuz
|
||||
System.map
|
||||
Module.markers
|
||||
Module.symvers
|
||||
|
|
|
@ -20,7 +20,7 @@ Description:
|
|||
lsm: [[subj_user=] [subj_role=] [subj_type=]
|
||||
[obj_user=] [obj_role=] [obj_type=]]
|
||||
|
||||
base: func:= [BPRM_CHECK][FILE_MMAP][INODE_PERMISSION]
|
||||
base: func:= [BPRM_CHECK][FILE_MMAP][FILE_CHECK]
|
||||
mask:= [MAY_READ] [MAY_WRITE] [MAY_APPEND] [MAY_EXEC]
|
||||
fsmagic:= hex value
|
||||
uid:= decimal value
|
||||
|
@ -40,11 +40,11 @@ Description:
|
|||
|
||||
measure func=BPRM_CHECK
|
||||
measure func=FILE_MMAP mask=MAY_EXEC
|
||||
measure func=INODE_PERM mask=MAY_READ uid=0
|
||||
measure func=FILE_CHECK mask=MAY_READ uid=0
|
||||
|
||||
The default policy measures all executables in bprm_check,
|
||||
all files mmapped executable in file_mmap, and all files
|
||||
open for read by root in inode_permission.
|
||||
open for read by root in do_filp_open.
|
||||
|
||||
Examples of LSM specific definitions:
|
||||
|
||||
|
@ -54,8 +54,8 @@ Description:
|
|||
|
||||
dont_measure obj_type=var_log_t
|
||||
dont_measure obj_type=auditd_log_t
|
||||
measure subj_user=system_u func=INODE_PERM mask=MAY_READ
|
||||
measure subj_role=system_r func=INODE_PERM mask=MAY_READ
|
||||
measure subj_user=system_u func=FILE_CHECK mask=MAY_READ
|
||||
measure subj_role=system_r func=FILE_CHECK mask=MAY_READ
|
||||
|
||||
Smack:
|
||||
measure subj_user=_ func=INODE_PERM mask=MAY_READ
|
||||
measure subj_user=_ func=FILE_CHECK mask=MAY_READ
|
||||
|
|
|
@ -145,8 +145,8 @@ show_sampling_rate_max: THIS INTERFACE IS DEPRECATED, DON'T USE IT.
|
|||
up_threshold: defines what the average CPU usage between the samplings
|
||||
of 'sampling_rate' needs to be for the kernel to make a decision on
|
||||
whether it should increase the frequency. For example when it is set
|
||||
to its default value of '80' it means that between the checking
|
||||
intervals the CPU needs to be on average more than 80% in use to then
|
||||
to its default value of '95' it means that between the checking
|
||||
intervals the CPU needs to be on average more than 95% in use to then
|
||||
decide that the CPU frequency needs to be increased.
|
||||
|
||||
ignore_nice_load: this parameter takes a value of '0' or '1'. When
|
||||
|
|
|
@ -143,8 +143,8 @@ o provide a way to configure fault attributes
|
|||
failslab, fail_page_alloc, and fail_make_request use this way.
|
||||
Helper functions:
|
||||
|
||||
init_fault_attr_entries(entries, attr, name);
|
||||
void cleanup_fault_attr_entries(entries);
|
||||
init_fault_attr_dentries(entries, attr, name);
|
||||
void cleanup_fault_attr_dentries(entries);
|
||||
|
||||
- module parameters
|
||||
|
||||
|
|
|
@ -493,3 +493,52 @@ Why: These two features use non-standard interfaces. There are the
|
|||
Who: Corentin Chary <corentin.chary@gmail.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: usbvideo quickcam_messenger driver
|
||||
When: 2.6.35
|
||||
Files: drivers/media/video/usbvideo/quickcam_messenger.[ch]
|
||||
Why: obsolete v4l1 driver replaced by gspca_stv06xx
|
||||
Who: Hans de Goede <hdegoede@redhat.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: ov511 v4l1 driver
|
||||
When: 2.6.35
|
||||
Files: drivers/media/video/ov511.[ch]
|
||||
Why: obsolete v4l1 driver replaced by gspca_ov519
|
||||
Who: Hans de Goede <hdegoede@redhat.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: w9968cf v4l1 driver
|
||||
When: 2.6.35
|
||||
Files: drivers/media/video/w9968cf*.[ch]
|
||||
Why: obsolete v4l1 driver replaced by gspca_ov519
|
||||
Who: Hans de Goede <hdegoede@redhat.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: ovcamchip sensor framework
|
||||
When: 2.6.35
|
||||
Files: drivers/media/video/ovcamchip/*
|
||||
Why: Only used by obsoleted v4l1 drivers
|
||||
Who: Hans de Goede <hdegoede@redhat.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: stv680 v4l1 driver
|
||||
When: 2.6.35
|
||||
Files: drivers/media/video/stv680.[ch]
|
||||
Why: obsolete v4l1 driver replaced by gspca_stv0680
|
||||
Who: Hans de Goede <hdegoede@redhat.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: zc0301 v4l driver
|
||||
When: 2.6.35
|
||||
Files: drivers/media/video/zc0301/*
|
||||
Why: Duplicate functionality with the gspca_zc3xx driver, zc0301 only
|
||||
supports 2 USB-ID's (because it only supports a limited set of
|
||||
sensors) wich are also supported by the gspca_zc3xx driver
|
||||
(which supports 53 USB-ID's in total)
|
||||
Who: Hans de Goede <hdegoede@redhat.com>
|
||||
|
|
|
@ -177,7 +177,6 @@ read the file /proc/PID/status:
|
|||
CapBnd: ffffffffffffffff
|
||||
voluntary_ctxt_switches: 0
|
||||
nonvoluntary_ctxt_switches: 1
|
||||
Stack usage: 12 kB
|
||||
|
||||
This shows you nearly the same information you would get if you viewed it with
|
||||
the ps command. In fact, ps uses the proc file system to obtain its
|
||||
|
@ -231,7 +230,6 @@ Table 1-2: Contents of the statm files (as of 2.6.30-rc7)
|
|||
Mems_allowed_list Same as previous, but in "list format"
|
||||
voluntary_ctxt_switches number of voluntary context switches
|
||||
nonvoluntary_ctxt_switches number of non voluntary context switches
|
||||
Stack usage: stack usage high water mark (round up to page size)
|
||||
..............................................................................
|
||||
|
||||
Table 1-3: Contents of the statm files (as of 2.6.8-rc3)
|
||||
|
|
102
Documentation/hwmon/amc6821
Normal file
102
Documentation/hwmon/amc6821
Normal file
|
@ -0,0 +1,102 @@
|
|||
Kernel driver amc6821
|
||||
=====================
|
||||
|
||||
Supported chips:
|
||||
Texas Instruments AMC6821
|
||||
Prefix: 'amc6821'
|
||||
Addresses scanned: 0x18, 0x19, 0x1a, 0x2c, 0x2d, 0x2e, 0x4c, 0x4d, 0x4e
|
||||
Datasheet: http://focus.ti.com/docs/prod/folders/print/amc6821.html
|
||||
|
||||
Authors:
|
||||
Tomaz Mertelj <tomaz.mertelj@guest.arnes.si>
|
||||
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
This driver implements support for the Texas Instruments amc6821 chip.
|
||||
The chip has one on-chip and one remote temperature sensor and one pwm fan
|
||||
regulator.
|
||||
The pwm can be controlled either from software or automatically.
|
||||
|
||||
The driver provides the following sensor accesses in sysfs:
|
||||
|
||||
temp1_input ro on-chip temperature
|
||||
temp1_min rw "
|
||||
temp1_max rw "
|
||||
temp1_crit rw "
|
||||
temp1_min_alarm ro "
|
||||
temp1_max_alarm ro "
|
||||
temp1_crit_alarm ro "
|
||||
|
||||
temp2_input ro remote temperature
|
||||
temp2_min rw "
|
||||
temp2_max rw "
|
||||
temp2_crit rw "
|
||||
temp2_min_alarm ro "
|
||||
temp2_max_alarm ro "
|
||||
temp2_crit_alarm ro "
|
||||
temp2_fault ro "
|
||||
|
||||
fan1_input ro tachometer speed
|
||||
fan1_min rw "
|
||||
fan1_max rw "
|
||||
fan1_fault ro "
|
||||
fan1_div rw Fan divisor can be either 2 or 4.
|
||||
|
||||
pwm1 rw pwm1
|
||||
pwm1_enable rw regulator mode, 1=open loop, 2=fan controlled
|
||||
by remote temperature, 3=fan controlled by
|
||||
combination of the on-chip temperature and
|
||||
remote-sensor temperature,
|
||||
pwm1_auto_channels_temp ro 1 if pwm_enable==2, 3 if pwm_enable==3
|
||||
pwm1_auto_point1_pwm ro Hardwired to 0, shared for both
|
||||
temperature channels.
|
||||
pwm1_auto_point2_pwm rw This value is shared for both temperature
|
||||
channels.
|
||||
pwm1_auto_point3_pwm rw Hardwired to 255, shared for both
|
||||
temperature channels.
|
||||
|
||||
temp1_auto_point1_temp ro Hardwired to temp2_auto_point1_temp
|
||||
which is rw. Below this temperature fan stops.
|
||||
temp1_auto_point2_temp rw The low-temperature limit of the proportional
|
||||
range. Below this temperature
|
||||
pwm1 = pwm1_auto_point2_pwm. It can go from
|
||||
0 degree C to 124 degree C in steps of
|
||||
4 degree C. Read it out after writing to get
|
||||
the actual value.
|
||||
temp1_auto_point3_temp rw Above this temperature fan runs at maximum
|
||||
speed. It can go from temp1_auto_point2_temp.
|
||||
It can only have certain discrete values
|
||||
which depend on temp1_auto_point2_temp and
|
||||
pwm1_auto_point2_pwm. Read it out after
|
||||
writing to get the actual value.
|
||||
|
||||
temp2_auto_point1_temp rw Must be between 0 degree C and 63 degree C and
|
||||
it defines the passive cooling temperature.
|
||||
Below this temperature the fan stops in
|
||||
the closed loop mode.
|
||||
temp2_auto_point2_temp rw The low-temperature limit of the proportional
|
||||
range. Below this temperature
|
||||
pwm1 = pwm1_auto_point2_pwm. It can go from
|
||||
0 degree C to 124 degree C in steps
|
||||
of 4 degree C.
|
||||
|
||||
temp2_auto_point3_temp rw Above this temperature fan runs at maximum
|
||||
speed. It can only have certain discrete
|
||||
values which depend on temp2_auto_point2_temp
|
||||
and pwm1_auto_point2_pwm. Read it out after
|
||||
writing to get actual value.
|
||||
|
||||
|
||||
Module parameters
|
||||
-----------------
|
||||
|
||||
If your board has a BIOS that initializes the amc6821 correctly, you should
|
||||
load the module with: init=0.
|
||||
|
||||
If your board BIOS doesn't initialize the chip, or you want
|
||||
different settings, you can set the following parameters:
|
||||
init=1,
|
||||
pwminv: 0 default pwm output, 1 inverts pwm output.
|
||||
|
|
@ -3,8 +3,8 @@ Kernel driver k10temp
|
|||
|
||||
Supported chips:
|
||||
* AMD Family 10h processors:
|
||||
Socket F: Quad-Core/Six-Core/Embedded Opteron
|
||||
Socket AM2+: Opteron, Phenom (II) X3/X4
|
||||
Socket F: Quad-Core/Six-Core/Embedded Opteron (but see below)
|
||||
Socket AM2+: Quad-Core Opteron, Phenom (II) X3/X4, Athlon X2 (but see below)
|
||||
Socket AM3: Quad-Core Opteron, Athlon/Phenom II X2/X3/X4, Sempron II
|
||||
Socket S1G3: Athlon II, Sempron, Turion II
|
||||
* AMD Family 11h processors:
|
||||
|
@ -36,10 +36,15 @@ Description
|
|||
This driver permits reading of the internal temperature sensor of AMD
|
||||
Family 10h and 11h processors.
|
||||
|
||||
All these processors have a sensor, but on older revisions of Family 10h
|
||||
processors, the sensor may return inconsistent values (erratum 319). The
|
||||
driver will refuse to load on these revisions unless you specify the
|
||||
"force=1" module parameter.
|
||||
All these processors have a sensor, but on those for Socket F or AM2+,
|
||||
the sensor may return inconsistent values (erratum 319). The driver
|
||||
will refuse to load on these revisions unless you specify the "force=1"
|
||||
module parameter.
|
||||
|
||||
Due to technical reasons, the driver can detect only the mainboard's
|
||||
socket type, not the processor's actual capabilities. Therefore, if you
|
||||
are using an AM3 processor on an AM2+ mainboard, you can safely use the
|
||||
"force=1" parameter.
|
||||
|
||||
There is one temperature measurement value, available as temp1_input in
|
||||
sysfs. It is measured in degrees Celsius with a resolution of 1/8th degree.
|
||||
|
|
|
@ -27,12 +27,30 @@ set of events/packets.
|
|||
|
||||
A set of ABS_MT events with the desired properties is defined. The events
|
||||
are divided into categories, to allow for partial implementation. The
|
||||
minimum set consists of ABS_MT_TOUCH_MAJOR, ABS_MT_POSITION_X and
|
||||
ABS_MT_POSITION_Y, which allows for multiple fingers to be tracked. If the
|
||||
device supports it, the ABS_MT_WIDTH_MAJOR may be used to provide the size
|
||||
of the approaching finger. Anisotropy and direction may be specified with
|
||||
ABS_MT_TOUCH_MINOR, ABS_MT_WIDTH_MINOR and ABS_MT_ORIENTATION. The
|
||||
ABS_MT_TOOL_TYPE may be used to specify whether the touching tool is a
|
||||
minimum set consists of ABS_MT_POSITION_X and ABS_MT_POSITION_Y, which
|
||||
allows for multiple fingers to be tracked. If the device supports it, the
|
||||
ABS_MT_TOUCH_MAJOR and ABS_MT_WIDTH_MAJOR may be used to provide the size
|
||||
of the contact area and approaching finger, respectively.
|
||||
|
||||
The TOUCH and WIDTH parameters have a geometrical interpretation; imagine
|
||||
looking through a window at someone gently holding a finger against the
|
||||
glass. You will see two regions, one inner region consisting of the part
|
||||
of the finger actually touching the glass, and one outer region formed by
|
||||
the perimeter of the finger. The diameter of the inner region is the
|
||||
ABS_MT_TOUCH_MAJOR, the diameter of the outer region is
|
||||
ABS_MT_WIDTH_MAJOR. Now imagine the person pressing the finger harder
|
||||
against the glass. The inner region will increase, and in general, the
|
||||
ratio ABS_MT_TOUCH_MAJOR / ABS_MT_WIDTH_MAJOR, which is always smaller than
|
||||
unity, is related to the finger pressure. For pressure-based devices,
|
||||
ABS_MT_PRESSURE may be used to provide the pressure on the contact area
|
||||
instead.
|
||||
|
||||
In addition to the MAJOR parameters, the oval shape of the finger can be
|
||||
described by adding the MINOR parameters, such that MAJOR and MINOR are the
|
||||
major and minor axis of an ellipse. Finally, the orientation of the oval
|
||||
shape can be describe with the ORIENTATION parameter.
|
||||
|
||||
The ABS_MT_TOOL_TYPE may be used to specify whether the touching tool is a
|
||||
finger or a pen or something else. Devices with more granular information
|
||||
may specify general shapes as blobs, i.e., as a sequence of rectangular
|
||||
shapes grouped together by an ABS_MT_BLOB_ID. Finally, for the few devices
|
||||
|
@ -42,11 +60,9 @@ report finger tracking from hardware [5].
|
|||
Here is what a minimal event sequence for a two-finger touch would look
|
||||
like:
|
||||
|
||||
ABS_MT_TOUCH_MAJOR
|
||||
ABS_MT_POSITION_X
|
||||
ABS_MT_POSITION_Y
|
||||
SYN_MT_REPORT
|
||||
ABS_MT_TOUCH_MAJOR
|
||||
ABS_MT_POSITION_X
|
||||
ABS_MT_POSITION_Y
|
||||
SYN_MT_REPORT
|
||||
|
@ -87,6 +103,12 @@ the contact. The ratio ABS_MT_TOUCH_MAJOR / ABS_MT_WIDTH_MAJOR approximates
|
|||
the notion of pressure. The fingers of the hand and the palm all have
|
||||
different characteristic widths [1].
|
||||
|
||||
ABS_MT_PRESSURE
|
||||
|
||||
The pressure, in arbitrary units, on the contact area. May be used instead
|
||||
of TOUCH and WIDTH for pressure-based devices or any device with a spatial
|
||||
signal intensity distribution.
|
||||
|
||||
ABS_MT_ORIENTATION
|
||||
|
||||
The orientation of the ellipse. The value should describe a signed quarter
|
||||
|
@ -170,6 +192,16 @@ There are a few devices that support trackingID in hardware. User space can
|
|||
make use of these native identifiers to reduce bandwidth and cpu usage.
|
||||
|
||||
|
||||
Gestures
|
||||
--------
|
||||
|
||||
In the specific application of creating gesture events, the TOUCH and WIDTH
|
||||
parameters can be used to, e.g., approximate finger pressure or distinguish
|
||||
between index finger and thumb. With the addition of the MINOR parameters,
|
||||
one can also distinguish between a sweeping finger and a pointing finger,
|
||||
and with ORIENTATION, one can detect twisting of fingers.
|
||||
|
||||
|
||||
Notes
|
||||
-----
|
||||
|
||||
|
|
|
@ -56,10 +56,11 @@ Following this convention is good because:
|
|||
(5) When following the convention, the driver code can use generic
|
||||
code to copy the parameters between user and kernel space.
|
||||
|
||||
This table lists ioctls visible from user land for Linux/i386. It contains
|
||||
most drivers up to 2.3.14, but I know I am missing some.
|
||||
This table lists ioctls visible from user land for Linux/x86. It contains
|
||||
most drivers up to 2.6.31, but I know I am missing some. There has been
|
||||
no attempt to list non-X86 architectures or ioctls from drivers/staging/.
|
||||
|
||||
Code Seq# Include File Comments
|
||||
Code Seq#(hex) Include File Comments
|
||||
========================================================
|
||||
0x00 00-1F linux/fs.h conflict!
|
||||
0x00 00-1F scsi/scsi_ioctl.h conflict!
|
||||
|
@ -69,119 +70,228 @@ Code Seq# Include File Comments
|
|||
0x03 all linux/hdreg.h
|
||||
0x04 D2-DC linux/umsdos_fs.h Dead since 2.6.11, but don't reuse these.
|
||||
0x06 all linux/lp.h
|
||||
0x09 all linux/md.h
|
||||
0x09 all linux/raid/md_u.h
|
||||
0x10 00-0F drivers/char/s390/vmcp.h
|
||||
0x12 all linux/fs.h
|
||||
linux/blkpg.h
|
||||
0x1b all InfiniBand Subsystem <http://www.openib.org/>
|
||||
0x20 all drivers/cdrom/cm206.h
|
||||
0x22 all scsi/sg.h
|
||||
'#' 00-3F IEEE 1394 Subsystem Block for the entire subsystem
|
||||
'$' 00-0F linux/perf_counter.h, linux/perf_event.h
|
||||
'1' 00-1F <linux/timepps.h> PPS kit from Ulrich Windl
|
||||
<ftp://ftp.de.kernel.org/pub/linux/daemons/ntp/PPS/>
|
||||
'2' 01-04 linux/i2o.h
|
||||
'3' 00-0F drivers/s390/char/raw3270.h conflict!
|
||||
'3' 00-1F linux/suspend_ioctls.h conflict!
|
||||
and kernel/power/user.c
|
||||
'8' all SNP8023 advanced NIC card
|
||||
<mailto:mcr@solidum.com>
|
||||
'A' 00-1F linux/apm_bios.h
|
||||
'@' 00-0F linux/radeonfb.h conflict!
|
||||
'@' 00-0F drivers/video/aty/aty128fb.c conflict!
|
||||
'A' 00-1F linux/apm_bios.h conflict!
|
||||
'A' 00-0F linux/agpgart.h conflict!
|
||||
and drivers/char/agp/compat_ioctl.h
|
||||
'A' 00-7F sound/asound.h conflict!
|
||||
'B' 00-1F linux/cciss_ioctl.h conflict!
|
||||
'B' 00-0F include/linux/pmu.h conflict!
|
||||
'B' C0-FF advanced bbus
|
||||
<mailto:maassen@uni-freiburg.de>
|
||||
'C' all linux/soundcard.h
|
||||
'C' all linux/soundcard.h conflict!
|
||||
'C' 01-2F linux/capi.h conflict!
|
||||
'C' F0-FF drivers/net/wan/cosa.h conflict!
|
||||
'D' all arch/s390/include/asm/dasd.h
|
||||
'E' all linux/input.h
|
||||
'F' all linux/fb.h
|
||||
'H' all linux/hiddev.h
|
||||
'I' all linux/isdn.h
|
||||
'D' 40-5F drivers/scsi/dpt/dtpi_ioctl.h
|
||||
'D' 05 drivers/scsi/pmcraid.h
|
||||
'E' all linux/input.h conflict!
|
||||
'E' 00-0F xen/evtchn.h conflict!
|
||||
'F' all linux/fb.h conflict!
|
||||
'F' 01-02 drivers/scsi/pmcraid.h conflict!
|
||||
'F' 20 drivers/video/fsl-diu-fb.h conflict!
|
||||
'F' 20 drivers/video/intelfb/intelfb.h conflict!
|
||||
'F' 20 linux/ivtvfb.h conflict!
|
||||
'F' 20 linux/matroxfb.h conflict!
|
||||
'F' 20 drivers/video/aty/atyfb_base.c conflict!
|
||||
'F' 00-0F video/da8xx-fb.h conflict!
|
||||
'F' 80-8F linux/arcfb.h conflict!
|
||||
'F' DD video/sstfb.h conflict!
|
||||
'G' 00-3F drivers/misc/sgi-gru/grulib.h conflict!
|
||||
'G' 00-0F linux/gigaset_dev.h conflict!
|
||||
'H' 00-7F linux/hiddev.h conflict!
|
||||
'H' 00-0F linux/hidraw.h conflict!
|
||||
'H' 00-0F sound/asound.h conflict!
|
||||
'H' 20-40 sound/asound_fm.h conflict!
|
||||
'H' 80-8F sound/sfnt_info.h conflict!
|
||||
'H' 10-8F sound/emu10k1.h conflict!
|
||||
'H' 10-1F sound/sb16_csp.h conflict!
|
||||
'H' 10-1F sound/hda_hwdep.h conflict!
|
||||
'H' 40-4F sound/hdspm.h conflict!
|
||||
'H' 40-4F sound/hdsp.h conflict!
|
||||
'H' 90 sound/usb/usx2y/usb_stream.h
|
||||
'H' C0-F0 net/bluetooth/hci.h conflict!
|
||||
'H' C0-DF net/bluetooth/hidp/hidp.h conflict!
|
||||
'H' C0-DF net/bluetooth/cmtp/cmtp.h conflict!
|
||||
'H' C0-DF net/bluetooth/bnep/bnep.h conflict!
|
||||
'I' all linux/isdn.h conflict!
|
||||
'I' 00-0F drivers/isdn/divert/isdn_divert.h conflict!
|
||||
'I' 40-4F linux/mISDNif.h conflict!
|
||||
'J' 00-1F drivers/scsi/gdth_ioctl.h
|
||||
'K' all linux/kd.h
|
||||
'L' 00-1F linux/loop.h
|
||||
'L' 20-2F driver/usb/misc/vstusb.h
|
||||
'L' 00-1F linux/loop.h conflict!
|
||||
'L' 10-1F drivers/scsi/mpt2sas/mpt2sas_ctl.h conflict!
|
||||
'L' 20-2F linux/usb/vstusb.h
|
||||
'L' E0-FF linux/ppdd.h encrypted disk device driver
|
||||
<http://linux01.gwdg.de/~alatham/ppdd.html>
|
||||
'M' all linux/soundcard.h
|
||||
'M' all linux/soundcard.h conflict!
|
||||
'M' 01-16 mtd/mtd-abi.h conflict!
|
||||
and drivers/mtd/mtdchar.c
|
||||
'M' 01-03 drivers/scsi/megaraid/megaraid_sas.h
|
||||
'M' 00-0F drivers/video/fsl-diu-fb.h conflict!
|
||||
'N' 00-1F drivers/usb/scanner.h
|
||||
'O' 00-02 include/mtd/ubi-user.h UBI
|
||||
'P' all linux/soundcard.h
|
||||
'O' 00-06 mtd/ubi-user.h UBI
|
||||
'P' all linux/soundcard.h conflict!
|
||||
'P' 60-6F sound/sscape_ioctl.h conflict!
|
||||
'P' 00-0F drivers/usb/class/usblp.c conflict!
|
||||
'Q' all linux/soundcard.h
|
||||
'R' 00-1F linux/random.h
|
||||
'R' 00-1F linux/random.h conflict!
|
||||
'R' 01 linux/rfkill.h conflict!
|
||||
'R' 01-0F media/rds.h conflict!
|
||||
'R' C0-DF net/bluetooth/rfcomm.h
|
||||
'S' all linux/cdrom.h conflict!
|
||||
'S' 80-81 scsi/scsi_ioctl.h conflict!
|
||||
'S' 82-FF scsi/scsi.h conflict!
|
||||
'S' 00-7F sound/asequencer.h conflict!
|
||||
'T' all linux/soundcard.h conflict!
|
||||
'T' 00-AF sound/asound.h conflict!
|
||||
'T' all arch/x86/include/asm/ioctls.h conflict!
|
||||
'U' 00-EF linux/drivers/usb/usb.h
|
||||
'V' all linux/vt.h
|
||||
'T' C0-DF linux/if_tun.h conflict!
|
||||
'U' all sound/asound.h conflict!
|
||||
'U' 00-0F drivers/media/video/uvc/uvcvideo.h conflict!
|
||||
'U' 00-CF linux/uinput.h conflict!
|
||||
'U' 00-EF linux/usbdevice_fs.h
|
||||
'U' C0-CF drivers/bluetooth/hci_uart.h
|
||||
'V' all linux/vt.h conflict!
|
||||
'V' all linux/videodev2.h conflict!
|
||||
'V' C0 linux/ivtvfb.h conflict!
|
||||
'V' C0 linux/ivtv.h conflict!
|
||||
'V' C0 media/davinci/vpfe_capture.h conflict!
|
||||
'V' C0 media/si4713.h conflict!
|
||||
'V' C0-CF drivers/media/video/mxb.h conflict!
|
||||
'W' 00-1F linux/watchdog.h conflict!
|
||||
'W' 00-1F linux/wanrouter.h conflict!
|
||||
'X' all linux/xfs_fs.h
|
||||
'W' 00-3F sound/asound.h conflict!
|
||||
'X' all fs/xfs/xfs_fs.h conflict!
|
||||
and fs/xfs/linux-2.6/xfs_ioctl32.h
|
||||
and include/linux/falloc.h
|
||||
and linux/fs.h
|
||||
'X' all fs/ocfs2/ocfs_fs.h conflict!
|
||||
'X' 01 linux/pktcdvd.h conflict!
|
||||
'Y' all linux/cyclades.h
|
||||
'[' 00-07 linux/usb/usbtmc.h USB Test and Measurement Devices
|
||||
'Z' 14-15 drivers/message/fusion/mptctl.h
|
||||
'[' 00-07 linux/usb/tmc.h USB Test and Measurement Devices
|
||||
<mailto:gregkh@suse.de>
|
||||
'a' all ATM on linux
|
||||
'a' all linux/atm*.h, linux/sonet.h ATM on linux
|
||||
<http://lrcwww.epfl.ch/linux-atm/magic.html>
|
||||
'b' 00-FF bit3 vme host bridge
|
||||
'b' 00-FF conflict! bit3 vme host bridge
|
||||
<mailto:natalia@nikhefk.nikhef.nl>
|
||||
'b' 00-0F media/bt819.h conflict!
|
||||
'c' all linux/cm4000_cs.h conflict!
|
||||
'c' 00-7F linux/comstats.h conflict!
|
||||
'c' 00-7F linux/coda.h conflict!
|
||||
'c' 80-9F arch/s390/include/asm/chsc.h
|
||||
'c' A0-AF arch/x86/include/asm/msr.h
|
||||
'c' 00-1F linux/chio.h conflict!
|
||||
'c' 80-9F arch/s390/include/asm/chsc.h conflict!
|
||||
'c' A0-AF arch/x86/include/asm/msr.h conflict!
|
||||
'd' 00-FF linux/char/drm/drm/h conflict!
|
||||
'd' 02-40 pcmcia/ds.h conflict!
|
||||
'd' 10-3F drivers/media/video/dabusb.h conflict!
|
||||
'd' C0-CF drivers/media/video/saa7191.h conflict!
|
||||
'd' F0-FF linux/digi1.h
|
||||
'e' all linux/digi1.h conflict!
|
||||
'e' 00-1F net/irda/irtty.h conflict!
|
||||
'f' 00-1F linux/ext2_fs.h
|
||||
'h' 00-7F Charon filesystem
|
||||
'e' 00-1F drivers/net/irda/irtty-sir.h conflict!
|
||||
'f' 00-1F linux/ext2_fs.h conflict!
|
||||
'f' 00-1F linux/ext3_fs.h conflict!
|
||||
'f' 00-0F fs/jfs/jfs_dinode.h conflict!
|
||||
'f' 00-0F fs/ext4/ext4.h conflict!
|
||||
'f' 00-0F linux/fs.h conflict!
|
||||
'f' 00-0F fs/ocfs2/ocfs2_fs.h conflict!
|
||||
'g' 00-0F linux/usb/gadgetfs.h
|
||||
'g' 20-2F linux/usb/g_printer.h
|
||||
'h' 00-7F conflict! Charon filesystem
|
||||
<mailto:zapman@interlan.net>
|
||||
'i' 00-3F linux/i2o.h
|
||||
'h' 00-1F linux/hpet.h conflict!
|
||||
'i' 00-3F linux/i2o-dev.h conflict!
|
||||
'i' 0B-1F linux/ipmi.h conflict!
|
||||
'i' 80-8F linux/i8k.h
|
||||
'j' 00-3F linux/joystick.h
|
||||
'k' 00-0F linux/spi/spidev.h conflict!
|
||||
'k' 00-05 video/kyro.h conflict!
|
||||
'l' 00-3F linux/tcfs_fs.h transparent cryptographic file system
|
||||
<http://mikonos.dia.unisa.it/tcfs>
|
||||
'l' 40-7F linux/udf_fs_i.h in development:
|
||||
<http://sourceforge.net/projects/linux-udf/>
|
||||
'm' 00-09 linux/mmtimer.h
|
||||
'm' 00-09 linux/mmtimer.h conflict!
|
||||
'm' all linux/mtio.h conflict!
|
||||
'm' all linux/soundcard.h conflict!
|
||||
'm' all linux/synclink.h conflict!
|
||||
'm' 00-19 drivers/message/fusion/mptctl.h conflict!
|
||||
'm' 00 drivers/scsi/megaraid/megaraid_ioctl.h conflict!
|
||||
'm' 00-1F net/irda/irmod.h conflict!
|
||||
'n' 00-7F linux/ncp_fs.h
|
||||
'n' 00-7F linux/ncp_fs.h and fs/ncpfs/ioctl.c
|
||||
'n' 80-8F linux/nilfs2_fs.h NILFS2
|
||||
'n' E0-FF video/matrox.h matroxfb
|
||||
'n' E0-FF linux/matroxfb.h matroxfb
|
||||
'o' 00-1F fs/ocfs2/ocfs2_fs.h OCFS2
|
||||
'o' 00-03 include/mtd/ubi-user.h conflict! (OCFS2 and UBI overlaps)
|
||||
'o' 40-41 include/mtd/ubi-user.h UBI
|
||||
'o' 01-A1 include/linux/dvb/*.h DVB
|
||||
'o' 00-03 mtd/ubi-user.h conflict! (OCFS2 and UBI overlaps)
|
||||
'o' 40-41 mtd/ubi-user.h UBI
|
||||
'o' 01-A1 linux/dvb/*.h DVB
|
||||
'p' 00-0F linux/phantom.h conflict! (OpenHaptics needs this)
|
||||
'p' 00-1F linux/rtc.h conflict!
|
||||
'p' 00-3F linux/mc146818rtc.h conflict!
|
||||
'p' 40-7F linux/nvram.h
|
||||
'p' 80-9F user-space parport
|
||||
'p' 80-9F linux/ppdev.h user-space parport
|
||||
<mailto:tim@cyberelk.net>
|
||||
'p' a1-a4 linux/pps.h LinuxPPS
|
||||
'p' A1-A4 linux/pps.h LinuxPPS
|
||||
<mailto:giometti@linux.it>
|
||||
'q' 00-1F linux/serio.h
|
||||
'q' 80-FF Internet PhoneJACK, Internet LineJACK
|
||||
<http://www.quicknet.net>
|
||||
'r' 00-1F linux/msdos_fs.h
|
||||
'q' 80-FF linux/telephony.h Internet PhoneJACK, Internet LineJACK
|
||||
linux/ixjuser.h <http://www.quicknet.net>
|
||||
'r' 00-1F linux/msdos_fs.h and fs/fat/dir.c
|
||||
's' all linux/cdk.h
|
||||
't' 00-7F linux/if_ppp.h
|
||||
't' 80-8F linux/isdn_ppp.h
|
||||
't' 90 linux/toshiba.h
|
||||
'u' 00-1F linux/smb_fs.h
|
||||
'v' 00-1F linux/ext2_fs.h conflict!
|
||||
'v' all linux/videodev.h conflict!
|
||||
'v' 00-1F linux/ext2_fs.h conflict!
|
||||
'v' 00-1F linux/fs.h conflict!
|
||||
'v' 00-0F linux/sonypi.h conflict!
|
||||
'v' C0-CF drivers/media/video/ov511.h conflict!
|
||||
'v' C0-DF media/pwc-ioctl.h conflict!
|
||||
'v' C0-FF linux/meye.h conflict!
|
||||
'v' C0-CF drivers/media/video/zoran/zoran.h conflict!
|
||||
'v' D0-DF drivers/media/video/cpia2/cpia2dev.h conflict!
|
||||
'w' all CERN SCI driver
|
||||
'y' 00-1F packet based user level communications
|
||||
<mailto:zapman@interlan.net>
|
||||
'z' 00-3F CAN bus card
|
||||
'z' 00-3F CAN bus card conflict!
|
||||
<mailto:hdstich@connectu.ulm.circular.de>
|
||||
'z' 40-7F CAN bus card
|
||||
'z' 40-7F CAN bus card conflict!
|
||||
<mailto:oe@port.de>
|
||||
'z' 10-4F drivers/s390/crypto/zcrypt_api.h conflict!
|
||||
0x80 00-1F linux/fb.h
|
||||
0x81 00-1F linux/videotext.h
|
||||
0x88 00-3F media/ovcamchip.h
|
||||
0x89 00-06 arch/x86/include/asm/sockios.h
|
||||
0x89 0B-DF linux/sockios.h
|
||||
0x89 E0-EF linux/sockios.h SIOCPROTOPRIVATE range
|
||||
0x89 E0-EF linux/dn.h PROTOPRIVATE range
|
||||
0x89 F0-FF linux/sockios.h SIOCDEVPRIVATE range
|
||||
0x8B all linux/wireless.h
|
||||
0x8C 00-3F WiNRADiO driver
|
||||
<http://www.proximity.com.au/~brian/winradio/>
|
||||
0x90 00 drivers/cdrom/sbpcd.h
|
||||
0x92 00-0F drivers/usb/mon/mon_bin.c
|
||||
0x93 60-7F linux/auto_fs.h
|
||||
0x94 all fs/btrfs/ioctl.h
|
||||
0x99 00-0F 537-Addinboard driver
|
||||
<mailto:buk@buks.ipn.de>
|
||||
0xA0 all linux/sdp/sdp.h Industrial Device Project
|
||||
|
@ -192,17 +302,22 @@ Code Seq# Include File Comments
|
|||
0xAB 00-1F linux/nbd.h
|
||||
0xAC 00-1F linux/raw.h
|
||||
0xAD 00 Netfilter device in development:
|
||||
<mailto:rusty@rustcorp.com.au>
|
||||
<mailto:rusty@rustcorp.com.au>
|
||||
0xAE all linux/kvm.h Kernel-based Virtual Machine
|
||||
<mailto:kvm@vger.kernel.org>
|
||||
0xB0 all RATIO devices in development:
|
||||
<mailto:vgo@ratio.de>
|
||||
0xB1 00-1F PPPoX <mailto:mostrows@styx.uwaterloo.ca>
|
||||
0xC0 00-0F linux/usb/iowarrior.h
|
||||
0xCB 00-1F CBM serial IEC bus in development:
|
||||
<mailto:michael.klein@puffin.lb.shuttle.de>
|
||||
0xCD 01 linux/reiserfs_fs.h
|
||||
0xCF 02 fs/cifs/ioctl.c
|
||||
0xDB 00-0F drivers/char/mwave/mwavepub.h
|
||||
0xDD 00-3F ZFCP device driver see drivers/s390/scsi/
|
||||
<mailto:aherrman@de.ibm.com>
|
||||
0xF3 00-3F video/sisfb.h sisfb (in development)
|
||||
0xF3 00-3F drivers/usb/misc/sisusbvga/sisusb.h sisfb (in development)
|
||||
<mailto:thomas@winischhofer.net>
|
||||
0xF4 00-1F video/mbxfb.h mbxfb
|
||||
<mailto:raph@8d.com>
|
||||
0xFD all linux/dm-ioctl.h
|
||||
|
|
|
@ -214,11 +214,13 @@ The format of the block comment is like this:
|
|||
* (section header: (section description)? )*
|
||||
(*)?*/
|
||||
|
||||
The short function description ***cannot be multiline***, but the other
|
||||
descriptions can be (and they can contain blank lines). If you continue
|
||||
that initial short description onto a second line, that second line will
|
||||
appear further down at the beginning of the description section, which is
|
||||
almost certainly not what you had in mind.
|
||||
All "description" text can span multiple lines, although the
|
||||
function_name & its short description are traditionally on a single line.
|
||||
Description text may also contain blank lines (i.e., lines that contain
|
||||
only a "*").
|
||||
|
||||
"section header:" names must be unique per function (or struct,
|
||||
union, typedef, enum).
|
||||
|
||||
Avoid putting a spurious blank line after the function name, or else the
|
||||
description will be repeated!
|
||||
|
|
|
@ -199,6 +199,10 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
acpi_display_output=video
|
||||
See above.
|
||||
|
||||
acpi_early_pdc_eval [HW,ACPI] Evaluate processor _PDC methods
|
||||
early. Needed on some platforms to properly
|
||||
initialize the EC.
|
||||
|
||||
acpi_irq_balance [HW,ACPI]
|
||||
ACPI will balance active IRQs
|
||||
default in APIC mode
|
||||
|
@ -311,6 +315,11 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
aic79xx= [HW,SCSI]
|
||||
See Documentation/scsi/aic79xx.txt.
|
||||
|
||||
alignment= [KNL,ARM]
|
||||
Allow the default userspace alignment fault handler
|
||||
behaviour to be specified. Bit 0 enables warnings,
|
||||
bit 1 enables fixups, and bit 2 sends a segfault.
|
||||
|
||||
amd_iommu= [HW,X86-84]
|
||||
Pass parameters to the AMD IOMMU driver in the system.
|
||||
Possible values are:
|
||||
|
|
|
@ -48,11 +48,11 @@ for LILO parameters for doing this:
|
|||
This configures the first found 3c509 card for IRQ 10, base I/O 0x310, and
|
||||
transceiver type 3 (10base2). The flag "0x3c509" must be set to avoid conflicts
|
||||
with other card types when overriding the I/O address. When the driver is
|
||||
loaded as a module, only the IRQ and transceiver setting may be overridden.
|
||||
For example, setting two cards to 10base2/IRQ10 and AUI/IRQ11 is done by using
|
||||
the xcvr and irq module options:
|
||||
loaded as a module, only the IRQ may be overridden. For example,
|
||||
setting two cards to IRQ10 and IRQ11 is done by using the irq module
|
||||
option:
|
||||
|
||||
options 3c509 xcvr=3,1 irq=10,11
|
||||
options 3c509 irq=10,11
|
||||
|
||||
|
||||
(2) Full-duplex mode
|
||||
|
@ -77,6 +77,8 @@ operation.
|
|||
itself full-duplex capable. This is almost certainly one of two things: a full-
|
||||
duplex-capable Ethernet switch (*not* a hub), or a full-duplex-capable NIC on
|
||||
another system that's connected directly to the 3c509B via a crossover cable.
|
||||
|
||||
Full-duplex mode can be enabled using 'ethtool'.
|
||||
|
||||
/////Extremely important caution concerning full-duplex mode/////
|
||||
Understand that the 3c509B's hardware's full-duplex support is much more
|
||||
|
@ -113,6 +115,8 @@ This insured that merely upgrading the driver from an earlier version would
|
|||
never automatically enable full-duplex mode in an existing installation;
|
||||
it must always be explicitly enabled via one of these code in order to be
|
||||
activated.
|
||||
|
||||
The transceiver type can be changed using 'ethtool'.
|
||||
|
||||
|
||||
(4a) Interpretation of error messages and common problems
|
||||
|
|
|
@ -1074,10 +1074,10 @@ regen_max_retry - INTEGER
|
|||
Default: 5
|
||||
|
||||
max_addresses - INTEGER
|
||||
Number of maximum addresses per interface. 0 disables limitation.
|
||||
It is recommended not set too large value (or 0) because it would
|
||||
be too easy way to crash kernel to allow to create too much of
|
||||
autoconfigured addresses.
|
||||
Maximum number of autoconfigured addresses per interface. Setting
|
||||
to zero disables the limitation. It is not recommended to set this
|
||||
value too large (or to zero) because it would be an easy way to
|
||||
crash the kernel by allowing too many addresses to be created.
|
||||
Default: 16
|
||||
|
||||
disable_ipv6 - BOOLEAN
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
function tracer guts
|
||||
====================
|
||||
By Mike Frysinger
|
||||
|
||||
Introduction
|
||||
------------
|
||||
|
@ -173,14 +174,16 @@ void ftrace_graph_caller(void)
|
|||
|
||||
unsigned long *frompc = &...;
|
||||
unsigned long selfpc = <return address> - MCOUNT_INSN_SIZE;
|
||||
prepare_ftrace_return(frompc, selfpc);
|
||||
/* passing frame pointer up is optional -- see below */
|
||||
prepare_ftrace_return(frompc, selfpc, frame_pointer);
|
||||
|
||||
/* restore all state needed by the ABI */
|
||||
}
|
||||
#endif
|
||||
|
||||
For information on how to implement prepare_ftrace_return(), simply look at
|
||||
the x86 version. The only architecture-specific piece in it is the setup of
|
||||
For information on how to implement prepare_ftrace_return(), simply look at the
|
||||
x86 version (the frame pointer passing is optional; see the next section for
|
||||
more information). The only architecture-specific piece in it is the setup of
|
||||
the fault recovery table (the asm(...) code). The rest should be the same
|
||||
across architectures.
|
||||
|
||||
|
@ -205,6 +208,23 @@ void return_to_handler(void)
|
|||
#endif
|
||||
|
||||
|
||||
HAVE_FUNCTION_GRAPH_FP_TEST
|
||||
---------------------------
|
||||
|
||||
An arch may pass in a unique value (frame pointer) to both the entering and
|
||||
exiting of a function. On exit, the value is compared and if it does not
|
||||
match, then it will panic the kernel. This is largely a sanity check for bad
|
||||
code generation with gcc. If gcc for your port sanely updates the frame
|
||||
pointer under different opitmization levels, then ignore this option.
|
||||
|
||||
However, adding support for it isn't terribly difficult. In your assembly code
|
||||
that calls prepare_ftrace_return(), pass the frame pointer as the 3rd argument.
|
||||
Then in the C version of that function, do what the x86 port does and pass it
|
||||
along to ftrace_push_return_trace() instead of a stub value of 0.
|
||||
|
||||
Similarly, when you call ftrace_return_to_handler(), pass it the frame pointer.
|
||||
|
||||
|
||||
HAVE_FTRACE_NMI_ENTER
|
||||
---------------------
|
||||
|
||||
|
|
|
@ -1625,7 +1625,7 @@ If I am only interested in sys_nanosleep and hrtimer_interrupt:
|
|||
|
||||
# echo sys_nanosleep hrtimer_interrupt \
|
||||
> set_ftrace_filter
|
||||
# echo ftrace > current_tracer
|
||||
# echo function > current_tracer
|
||||
# echo 1 > tracing_enabled
|
||||
# usleep 1
|
||||
# echo 0 > tracing_enabled
|
||||
|
|
|
@ -33,9 +33,9 @@ head_page - a pointer to the page that the reader will use next
|
|||
|
||||
tail_page - a pointer to the page that will be written to next
|
||||
|
||||
commit_page - a pointer to the page with the last finished non nested write.
|
||||
commit_page - a pointer to the page with the last finished non-nested write.
|
||||
|
||||
cmpxchg - hardware assisted atomic transaction that performs the following:
|
||||
cmpxchg - hardware-assisted atomic transaction that performs the following:
|
||||
|
||||
A = B iff previous A == C
|
||||
|
||||
|
@ -52,15 +52,15 @@ The Generic Ring Buffer
|
|||
The ring buffer can be used in either an overwrite mode or in
|
||||
producer/consumer mode.
|
||||
|
||||
Producer/consumer mode is where the producer were to fill up the
|
||||
Producer/consumer mode is where if the producer were to fill up the
|
||||
buffer before the consumer could free up anything, the producer
|
||||
will stop writing to the buffer. This will lose most recent events.
|
||||
|
||||
Overwrite mode is where the produce were to fill up the buffer
|
||||
Overwrite mode is where if the producer were to fill up the buffer
|
||||
before the consumer could free up anything, the producer will
|
||||
overwrite the older data. This will lose the oldest events.
|
||||
|
||||
No two writers can write at the same time (on the same per cpu buffer),
|
||||
No two writers can write at the same time (on the same per-cpu buffer),
|
||||
but a writer may interrupt another writer, but it must finish writing
|
||||
before the previous writer may continue. This is very important to the
|
||||
algorithm. The writers act like a "stack". The way interrupts works
|
||||
|
@ -79,16 +79,16 @@ the interrupt doing a write as well.
|
|||
|
||||
Readers can happen at any time. But no two readers may run at the
|
||||
same time, nor can a reader preempt/interrupt another reader. A reader
|
||||
can not preempt/interrupt a writer, but it may read/consume from the
|
||||
cannot preempt/interrupt a writer, but it may read/consume from the
|
||||
buffer at the same time as a writer is writing, but the reader must be
|
||||
on another processor to do so. A reader may read on its own processor
|
||||
and can be preempted by a writer.
|
||||
|
||||
A writer can preempt a reader, but a reader can not preempt a writer.
|
||||
A writer can preempt a reader, but a reader cannot preempt a writer.
|
||||
But a reader can read the buffer at the same time (on another processor)
|
||||
as a writer.
|
||||
|
||||
The ring buffer is made up of a list of pages held together by a link list.
|
||||
The ring buffer is made up of a list of pages held together by a linked list.
|
||||
|
||||
At initialization a reader page is allocated for the reader that is not
|
||||
part of the ring buffer.
|
||||
|
@ -102,7 +102,7 @@ the head page.
|
|||
|
||||
The reader has its own page to use. At start up time, this page is
|
||||
allocated but is not attached to the list. When the reader wants
|
||||
to read from the buffer, if its page is empty (like it is on start up)
|
||||
to read from the buffer, if its page is empty (like it is on start-up),
|
||||
it will swap its page with the head_page. The old reader page will
|
||||
become part of the ring buffer and the head_page will be removed.
|
||||
The page after the inserted page (old reader_page) will become the
|
||||
|
@ -206,7 +206,7 @@ The main pointers:
|
|||
|
||||
commit page - the page that last finished a write.
|
||||
|
||||
The commit page only is updated by the outer most writer in the
|
||||
The commit page only is updated by the outermost writer in the
|
||||
writer stack. A writer that preempts another writer will not move the
|
||||
commit page.
|
||||
|
||||
|
@ -281,7 +281,7 @@ with the previous write.
|
|||
The commit pointer points to the last write location that was
|
||||
committed without preempting another write. When a write that
|
||||
preempted another write is committed, it only becomes a pending commit
|
||||
and will not be a full commit till all writes have been committed.
|
||||
and will not be a full commit until all writes have been committed.
|
||||
|
||||
The commit page points to the page that has the last full commit.
|
||||
The tail page points to the page with the last write (before
|
||||
|
@ -292,7 +292,7 @@ be several pages ahead. If the tail page catches up to the commit
|
|||
page then no more writes may take place (regardless of the mode
|
||||
of the ring buffer: overwrite and produce/consumer).
|
||||
|
||||
The order of pages are:
|
||||
The order of pages is:
|
||||
|
||||
head page
|
||||
commit page
|
||||
|
@ -311,7 +311,7 @@ Possible scenario:
|
|||
There is a special case that the head page is after either the commit page
|
||||
and possibly the tail page. That is when the commit (and tail) page has been
|
||||
swapped with the reader page. This is because the head page is always
|
||||
part of the ring buffer, but the reader page is not. When ever there
|
||||
part of the ring buffer, but the reader page is not. Whenever there
|
||||
has been less than a full page that has been committed inside the ring buffer,
|
||||
and a reader swaps out a page, it will be swapping out the commit page.
|
||||
|
||||
|
@ -338,7 +338,7 @@ and a reader swaps out a page, it will be swapping out the commit page.
|
|||
In this case, the head page will not move when the tail and commit
|
||||
move back into the ring buffer.
|
||||
|
||||
The reader can not swap a page into the ring buffer if the commit page
|
||||
The reader cannot swap a page into the ring buffer if the commit page
|
||||
is still on that page. If the read meets the last commit (real commit
|
||||
not pending or reserved), then there is nothing more to read.
|
||||
The buffer is considered empty until another full commit finishes.
|
||||
|
@ -395,7 +395,7 @@ The main idea behind the lockless algorithm is to combine the moving
|
|||
of the head_page pointer with the swapping of pages with the reader.
|
||||
State flags are placed inside the pointer to the page. To do this,
|
||||
each page must be aligned in memory by 4 bytes. This will allow the 2
|
||||
least significant bits of the address to be used as flags. Since
|
||||
least significant bits of the address to be used as flags, since
|
||||
they will always be zero for the address. To get the address,
|
||||
simply mask out the flags.
|
||||
|
||||
|
@ -460,7 +460,7 @@ When the reader tries to swap the page with the ring buffer, it
|
|||
will also use cmpxchg. If the flag bit in the pointer to the
|
||||
head page does not have the HEADER flag set, the compare will fail
|
||||
and the reader will need to look for the new head page and try again.
|
||||
Note, the flag UPDATE and HEADER are never set at the same time.
|
||||
Note, the flags UPDATE and HEADER are never set at the same time.
|
||||
|
||||
The reader swaps the reader page as follows:
|
||||
|
||||
|
@ -539,7 +539,7 @@ updated to the reader page.
|
|||
| +-----------------------------+ |
|
||||
+------------------------------------+
|
||||
|
||||
Another important point. The page that the reader page points back to
|
||||
Another important point: The page that the reader page points back to
|
||||
by its previous pointer (the one that now points to the new head page)
|
||||
never points back to the reader page. That is because the reader page is
|
||||
not part of the ring buffer. Traversing the ring buffer via the next pointers
|
||||
|
@ -572,7 +572,7 @@ not be able to swap the head page from the buffer, nor will it be able to
|
|||
move the head page, until the writer is finished with the move.
|
||||
|
||||
This eliminates any races that the reader can have on the writer. The reader
|
||||
must spin, and this is why the reader can not preempt the writer.
|
||||
must spin, and this is why the reader cannot preempt the writer.
|
||||
|
||||
tail page
|
||||
|
|
||||
|
@ -659,9 +659,9 @@ before pushing the head page. If it is, then it can be assumed that the
|
|||
tail page wrapped the buffer, and we must drop new writes.
|
||||
|
||||
This is not a race condition, because the commit page can only be moved
|
||||
by the outter most writer (the writer that was preempted).
|
||||
by the outermost writer (the writer that was preempted).
|
||||
This means that the commit will not move while a writer is moving the
|
||||
tail page. The reader can not swap the reader page if it is also being
|
||||
tail page. The reader cannot swap the reader page if it is also being
|
||||
used as the commit page. The reader can simply check that the commit
|
||||
is off the reader page. Once the commit page leaves the reader page
|
||||
it will never go back on it unless a reader does another swap with the
|
||||
|
@ -733,7 +733,7 @@ The write converts the head page pointer to UPDATE.
|
|||
--->| |<---| |<---| |<---| |<---
|
||||
+---+ +---+ +---+ +---+
|
||||
|
||||
But if a nested writer preempts here. It will see that the next
|
||||
But if a nested writer preempts here, it will see that the next
|
||||
page is a head page, but it is also nested. It will detect that
|
||||
it is nested and will save that information. The detection is the
|
||||
fact that it sees the UPDATE flag instead of a HEADER or NORMAL
|
||||
|
@ -761,7 +761,7 @@ to NORMAL.
|
|||
--->| |<---| |<---| |<---| |<---
|
||||
+---+ +---+ +---+ +---+
|
||||
|
||||
After the nested writer finishes, the outer most writer will convert
|
||||
After the nested writer finishes, the outermost writer will convert
|
||||
the UPDATE pointer to NORMAL.
|
||||
|
||||
|
||||
|
@ -812,7 +812,7 @@ head page.
|
|||
+---+ +---+ +---+ +---+
|
||||
|
||||
The nested writer moves the tail page forward. But does not set the old
|
||||
update page to NORMAL because it is not the outer most writer.
|
||||
update page to NORMAL because it is not the outermost writer.
|
||||
|
||||
tail page
|
||||
|
|
||||
|
@ -892,7 +892,7 @@ It will return to the first writer.
|
|||
--->| |<---| |<---| |<---| |<---
|
||||
+---+ +---+ +---+ +---+
|
||||
|
||||
The first writer can not know atomically test if the tail page moved
|
||||
The first writer cannot know atomically if the tail page moved
|
||||
while it updates the HEAD page. It will then update the head page to
|
||||
what it thinks is the new head page.
|
||||
|
||||
|
@ -923,9 +923,9 @@ if the tail page is either where it use to be or on the next page:
|
|||
--->| |<---| |<---| |<---| |<---
|
||||
+---+ +---+ +---+ +---+
|
||||
|
||||
If tail page != A and tail page does not equal B, then it must reset the
|
||||
pointer back to NORMAL. The fact that it only needs to worry about
|
||||
nested writers, it only needs to check this after setting the HEAD page.
|
||||
If tail page != A and tail page != B, then it must reset the pointer
|
||||
back to NORMAL. The fact that it only needs to worry about nested
|
||||
writers means that it only needs to check this after setting the HEAD page.
|
||||
|
||||
|
||||
(first writer)
|
||||
|
@ -939,7 +939,7 @@ nested writers, it only needs to check this after setting the HEAD page.
|
|||
+---+ +---+ +---+ +---+
|
||||
|
||||
Now the writer can update the head page. This is also why the head page must
|
||||
remain in UPDATE and only reset by the outer most writer. This prevents
|
||||
remain in UPDATE and only reset by the outermost writer. This prevents
|
||||
the reader from seeing the incorrect head page.
|
||||
|
||||
|
||||
|
|
57
MAINTAINERS
57
MAINTAINERS
|
@ -410,9 +410,8 @@ F: drivers/i2c/busses/i2c-ali1563.c
|
|||
|
||||
ALPHA PORT
|
||||
M: Richard Henderson <rth@twiddle.net>
|
||||
S: Odd Fixes for 2.4; Maintained for 2.6.
|
||||
M: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
|
||||
S: Maintained for 2.4; PCI support for 2.6.
|
||||
M: Matt Turner <mattst88@gmail.com>
|
||||
L: linux-alpha@vger.kernel.org
|
||||
F: arch/alpha/
|
||||
|
||||
|
@ -617,10 +616,10 @@ M: Richard Purdie <rpurdie@rpsys.net>
|
|||
S: Maintained
|
||||
|
||||
ARM/CORTINA SYSTEMS GEMINI ARM ARCHITECTURE
|
||||
M: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
|
||||
M: Paulius Zaleckas <paulius.zaleckas@gmail.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
T: git git://gitorious.org/linux-gemini/mainline.git
|
||||
S: Maintained
|
||||
S: Odd Fixes
|
||||
F: arch/arm/mach-gemini/
|
||||
|
||||
ARM/EBSA110 MACHINE SUPPORT
|
||||
|
@ -642,9 +641,9 @@ T: topgit git://git.openezx.org/openezx.git
|
|||
F: arch/arm/mach-pxa/ezx.c
|
||||
|
||||
ARM/FARADAY FA526 PORT
|
||||
M: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
|
||||
M: Paulius Zaleckas <paulius.zaleckas@gmail.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
S: Odd Fixes
|
||||
F: arch/arm/mm/*-fa*
|
||||
|
||||
ARM/FOOTBRIDGE ARCHITECTURE
|
||||
|
@ -988,7 +987,6 @@ F: drivers/platform/x86/asus-laptop.c
|
|||
|
||||
ASYNCHRONOUS TRANSFERS/TRANSFORMS (IOAT) API
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
M: Maciej Sosnowski <maciej.sosnowski@intel.com>
|
||||
W: http://sourceforge.net/projects/xscaleiop
|
||||
S: Supported
|
||||
F: Documentation/crypto/async-tx-api.txt
|
||||
|
@ -1638,9 +1636,8 @@ S: Maintained
|
|||
F: sound/pci/cs5535audio/
|
||||
|
||||
CX18 VIDEO4LINUX DRIVER
|
||||
M: Hans Verkuil <hverkuil@xs4all.nl>
|
||||
M: Andy Walls <awalls@radix.net>
|
||||
L: ivtv-devel@ivtvdriver.org
|
||||
L: ivtv-devel@ivtvdriver.org (moderated for non-subscribers)
|
||||
L: linux-media@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git
|
||||
W: http://linuxtv.org
|
||||
|
@ -1736,10 +1733,9 @@ F: include/linux/tfrc.h
|
|||
F: net/dccp/
|
||||
|
||||
DECnet NETWORK LAYER
|
||||
M: Christine Caulfield <christine.caulfield@googlemail.com>
|
||||
W: http://linux-decnet.sourceforge.net
|
||||
L: linux-decnet-user@lists.sourceforge.net
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: Documentation/networking/decnet.txt
|
||||
F: net/decnet/
|
||||
|
||||
|
@ -1825,7 +1821,6 @@ S: Supported
|
|||
F: fs/dlm/
|
||||
|
||||
DMA GENERIC OFFLOAD ENGINE SUBSYSTEM
|
||||
M: Maciej Sosnowski <maciej.sosnowski@intel.com>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
S: Supported
|
||||
F: drivers/dma/
|
||||
|
@ -2788,7 +2783,7 @@ F: arch/x86/kernel/microcode_core.c
|
|||
F: arch/x86/kernel/microcode_intel.c
|
||||
|
||||
INTEL I/OAT DMA DRIVER
|
||||
M: Maciej Sosnowski <maciej.sosnowski@intel.com>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
S: Supported
|
||||
F: drivers/dma/ioat*
|
||||
|
||||
|
@ -2826,10 +2821,11 @@ L: netdev@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/net/ixp2000/
|
||||
|
||||
INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/ixgb/ixgbe)
|
||||
INTEL ETHERNET DRIVERS (e100/e1000/e1000e/igb/igbvf/ixgb/ixgbe)
|
||||
M: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
|
||||
M: Jesse Brandeburg <jesse.brandeburg@intel.com>
|
||||
M: Bruce Allan <bruce.w.allan@intel.com>
|
||||
M: Alex Duyck <alexander.h.duyck@intel.com>
|
||||
M: PJ Waskiewicz <peter.p.waskiewicz.jr@intel.com>
|
||||
M: John Ronciak <john.ronciak@intel.com>
|
||||
L: e1000-devel@lists.sourceforge.net
|
||||
|
@ -2839,6 +2835,7 @@ F: drivers/net/e100.c
|
|||
F: drivers/net/e1000/
|
||||
F: drivers/net/e1000e/
|
||||
F: drivers/net/igb/
|
||||
F: drivers/net/igbvf/
|
||||
F: drivers/net/ixgb/
|
||||
F: drivers/net/ixgbe/
|
||||
|
||||
|
@ -3012,8 +3009,8 @@ S: Maintained
|
|||
F: drivers/isdn/hardware/eicon/
|
||||
|
||||
IVTV VIDEO4LINUX DRIVER
|
||||
M: Hans Verkuil <hverkuil@xs4all.nl>
|
||||
L: ivtv-devel@ivtvdriver.org
|
||||
M: Andy Walls <awalls@radix.net>
|
||||
L: ivtv-devel@ivtvdriver.org (moderated for non-subscribers)
|
||||
L: linux-media@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-2.6.git
|
||||
W: http://www.ivtvdriver.org
|
||||
|
@ -3413,8 +3410,10 @@ S: Maintained
|
|||
F: drivers/scsi/sym53c8xx_2/
|
||||
|
||||
LTP (Linux Test Project)
|
||||
M: Subrata Modak <subrata@linux.vnet.ibm.com>
|
||||
M: Mike Frysinger <vapier@gentoo.org>
|
||||
M: Rishikesh K Rajak <risrajak@linux.vnet.ibm.com>
|
||||
M: Garrett Cooper <yanegomi@gmail.com>
|
||||
M: Mike Frysinger <vapier@gentoo.org>
|
||||
M: Subrata Modak <subrata@linux.vnet.ibm.com>
|
||||
L: ltp-list@lists.sourceforge.net (subscribers-only)
|
||||
W: http://ltp.sourceforge.net/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/galak/ltp.git
|
||||
|
@ -3490,9 +3489,9 @@ S: Maintained
|
|||
F: drivers/net/wireless/libertas/
|
||||
|
||||
MARVELL MV643XX ETHERNET DRIVER
|
||||
M: Lennert Buytenhek <buytenh@marvell.com>
|
||||
M: Lennert Buytenhek <buytenh@wantstofly.org>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
S: Maintained
|
||||
F: drivers/net/mv643xx_eth.*
|
||||
F: include/linux/mv643xx.h
|
||||
|
||||
|
@ -3838,6 +3837,7 @@ NETWORKING DRIVERS
|
|||
L: netdev@vger.kernel.org
|
||||
W: http://www.linuxfoundation.org/en/Net
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6.git
|
||||
S: Odd Fixes
|
||||
F: drivers/net/
|
||||
F: include/linux/if_*
|
||||
|
@ -3940,29 +3940,20 @@ S: Maintained
|
|||
F: sound/soc/omap/
|
||||
|
||||
OMAP FRAMEBUFFER SUPPORT
|
||||
M: Imre Deak <imre.deak@nokia.com>
|
||||
M: Tomi Valkeinen <tomi.valkeinen@nokia.com>
|
||||
L: linux-fbdev@vger.kernel.org
|
||||
L: linux-omap@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/video/omap/
|
||||
|
||||
OMAP DISPLAY SUBSYSTEM SUPPORT (DSS2)
|
||||
OMAP DISPLAY SUBSYSTEM and FRAMEBUFFER SUPPORT (DSS2)
|
||||
M: Tomi Valkeinen <tomi.valkeinen@nokia.com>
|
||||
L: linux-omap@vger.kernel.org
|
||||
L: linux-fbdev@vger.kernel.org (moderated for non-subscribers)
|
||||
L: linux-fbdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/video/omap2/dss/
|
||||
F: drivers/video/omap2/vrfb.c
|
||||
F: drivers/video/omap2/vram.c
|
||||
F: drivers/video/omap2/
|
||||
F: Documentation/arm/OMAP/DSS
|
||||
|
||||
OMAP FRAMEBUFFER SUPPORT (FOR DSS2)
|
||||
M: Tomi Valkeinen <tomi.valkeinen@nokia.com>
|
||||
L: linux-omap@vger.kernel.org
|
||||
L: linux-fbdev@vger.kernel.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: drivers/video/omap2/omapfb/
|
||||
|
||||
OMAP MMC SUPPORT
|
||||
M: Jarkko Lavinen <jarkko.lavinen@nokia.com>
|
||||
L: linux-omap@vger.kernel.org
|
||||
|
|
5
Makefile
5
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 33
|
||||
EXTRAVERSION = -rc3
|
||||
EXTRAVERSION =
|
||||
NAME = Man-Eating Seals of Antiquity
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
@ -18,10 +18,9 @@ MAKEFLAGS += -rR --no-print-directory
|
|||
|
||||
# Avoid funny character set dependencies
|
||||
unexport LC_ALL
|
||||
LC_CTYPE=C
|
||||
LC_COLLATE=C
|
||||
LC_NUMERIC=C
|
||||
export LC_CTYPE LC_COLLATE LC_NUMERIC
|
||||
export LC_COLLATE LC_NUMERIC
|
||||
|
||||
# We are using a recursive build, so we need to do a little thinking
|
||||
# to get the ordering right.
|
||||
|
|
|
@ -28,6 +28,9 @@ static const struct cpumask *cpumask_of_node(int node)
|
|||
{
|
||||
int cpu;
|
||||
|
||||
if (node == -1)
|
||||
return cpu_all_mask;
|
||||
|
||||
cpumask_clear(&node_to_cpumask_map[node]);
|
||||
|
||||
for_each_online_cpu(cpu) {
|
||||
|
|
|
@ -18,6 +18,8 @@ config ARM
|
|||
select HAVE_KRETPROBES if (HAVE_KPROBES)
|
||||
select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
|
||||
select HAVE_GENERIC_DMA_COHERENT
|
||||
select HAVE_KERNEL_GZIP
|
||||
select HAVE_KERNEL_LZO
|
||||
help
|
||||
The ARM series is a line of low-power-consumption RISC chip designs
|
||||
licensed by ARM Ltd and targeted at embedded applications and
|
||||
|
@ -700,6 +702,7 @@ config ARCH_OMAP
|
|||
select ARCH_HAS_CPUFREQ
|
||||
select GENERIC_TIME
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
help
|
||||
Support for TI's OMAP platform (OMAP1 and OMAP2).
|
||||
|
||||
|
@ -727,14 +730,26 @@ config ARCH_U8500
|
|||
|
||||
endchoice
|
||||
|
||||
source "arch/arm/mach-aaec2000/Kconfig"
|
||||
|
||||
source "arch/arm/mach-at91/Kconfig"
|
||||
|
||||
source "arch/arm/mach-bcmring/Kconfig"
|
||||
|
||||
source "arch/arm/mach-clps711x/Kconfig"
|
||||
|
||||
source "arch/arm/mach-davinci/Kconfig"
|
||||
|
||||
source "arch/arm/mach-dove/Kconfig"
|
||||
|
||||
source "arch/arm/mach-ep93xx/Kconfig"
|
||||
|
||||
source "arch/arm/mach-footbridge/Kconfig"
|
||||
|
||||
source "arch/arm/mach-gemini/Kconfig"
|
||||
|
||||
source "arch/arm/mach-h720x/Kconfig"
|
||||
|
||||
source "arch/arm/mach-integrator/Kconfig"
|
||||
|
||||
source "arch/arm/mach-iop32x/Kconfig"
|
||||
|
@ -749,16 +764,26 @@ source "arch/arm/mach-ixp2000/Kconfig"
|
|||
|
||||
source "arch/arm/mach-ixp23xx/Kconfig"
|
||||
|
||||
source "arch/arm/mach-kirkwood/Kconfig"
|
||||
|
||||
source "arch/arm/mach-ks8695/Kconfig"
|
||||
|
||||
source "arch/arm/mach-lh7a40x/Kconfig"
|
||||
|
||||
source "arch/arm/mach-loki/Kconfig"
|
||||
|
||||
source "arch/arm/mach-msm/Kconfig"
|
||||
|
||||
source "arch/arm/mach-mv78xx0/Kconfig"
|
||||
|
||||
source "arch/arm/mach-pxa/Kconfig"
|
||||
source "arch/arm/plat-pxa/Kconfig"
|
||||
source "arch/arm/plat-mxc/Kconfig"
|
||||
|
||||
source "arch/arm/mach-mmp/Kconfig"
|
||||
source "arch/arm/mach-netx/Kconfig"
|
||||
|
||||
source "arch/arm/mach-sa1100/Kconfig"
|
||||
source "arch/arm/mach-nomadik/Kconfig"
|
||||
source "arch/arm/plat-nomadik/Kconfig"
|
||||
|
||||
source "arch/arm/mach-ns9xxx/Kconfig"
|
||||
|
||||
source "arch/arm/plat-omap/Kconfig"
|
||||
|
||||
|
@ -768,9 +793,14 @@ source "arch/arm/mach-omap2/Kconfig"
|
|||
|
||||
source "arch/arm/mach-orion5x/Kconfig"
|
||||
|
||||
source "arch/arm/mach-kirkwood/Kconfig"
|
||||
source "arch/arm/mach-pxa/Kconfig"
|
||||
source "arch/arm/plat-pxa/Kconfig"
|
||||
|
||||
source "arch/arm/mach-dove/Kconfig"
|
||||
source "arch/arm/mach-mmp/Kconfig"
|
||||
|
||||
source "arch/arm/mach-realview/Kconfig"
|
||||
|
||||
source "arch/arm/mach-sa1100/Kconfig"
|
||||
|
||||
source "arch/arm/plat-samsung/Kconfig"
|
||||
source "arch/arm/plat-s3c24xx/Kconfig"
|
||||
|
@ -798,41 +828,14 @@ if ARCH_S5PC1XX
|
|||
source "arch/arm/mach-s5pc100/Kconfig"
|
||||
endif
|
||||
|
||||
source "arch/arm/mach-lh7a40x/Kconfig"
|
||||
source "arch/arm/mach-u300/Kconfig"
|
||||
|
||||
source "arch/arm/mach-h720x/Kconfig"
|
||||
source "arch/arm/mach-ux500/Kconfig"
|
||||
|
||||
source "arch/arm/mach-versatile/Kconfig"
|
||||
|
||||
source "arch/arm/mach-aaec2000/Kconfig"
|
||||
|
||||
source "arch/arm/mach-realview/Kconfig"
|
||||
|
||||
source "arch/arm/mach-at91/Kconfig"
|
||||
|
||||
source "arch/arm/plat-mxc/Kconfig"
|
||||
|
||||
source "arch/arm/mach-nomadik/Kconfig"
|
||||
source "arch/arm/plat-nomadik/Kconfig"
|
||||
|
||||
source "arch/arm/mach-netx/Kconfig"
|
||||
|
||||
source "arch/arm/mach-ns9xxx/Kconfig"
|
||||
|
||||
source "arch/arm/mach-davinci/Kconfig"
|
||||
|
||||
source "arch/arm/mach-ks8695/Kconfig"
|
||||
|
||||
source "arch/arm/mach-msm/Kconfig"
|
||||
|
||||
source "arch/arm/mach-u300/Kconfig"
|
||||
|
||||
source "arch/arm/mach-w90x900/Kconfig"
|
||||
|
||||
source "arch/arm/mach-bcmring/Kconfig"
|
||||
|
||||
source "arch/arm/mach-ux500/Kconfig"
|
||||
|
||||
# Definitions to make life easier
|
||||
config ARCH_ACORN
|
||||
bool
|
||||
|
|
|
@ -94,7 +94,7 @@ CFLAGS_ABI +=-funwind-tables
|
|||
endif
|
||||
|
||||
ifeq ($(CONFIG_THUMB2_KERNEL),y)
|
||||
AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=thumb,-Wa$(comma)-mauto-it)
|
||||
AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it)
|
||||
AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W)
|
||||
CFLAGS_THUMB2 :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN)
|
||||
AFLAGS_THUMB2 :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb
|
||||
|
@ -146,6 +146,7 @@ machine-$(CONFIG_ARCH_MX1) := mx1
|
|||
machine-$(CONFIG_ARCH_MX2) := mx2
|
||||
machine-$(CONFIG_ARCH_MX25) := mx25
|
||||
machine-$(CONFIG_ARCH_MX3) := mx3
|
||||
machine-$(CONFIG_ARCH_MXC91231) := mxc91231
|
||||
machine-$(CONFIG_ARCH_NETX) := netx
|
||||
machine-$(CONFIG_ARCH_NOMADIK) := nomadik
|
||||
machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx
|
||||
|
@ -171,12 +172,12 @@ machine-$(CONFIG_ARCH_U8500) := ux500
|
|||
machine-$(CONFIG_ARCH_VERSATILE) := versatile
|
||||
machine-$(CONFIG_ARCH_W90X900) := w90x900
|
||||
machine-$(CONFIG_FOOTBRIDGE) := footbridge
|
||||
machine-$(CONFIG_ARCH_MXC91231) := mxc91231
|
||||
|
||||
# Platform directory name. This list is sorted alphanumerically
|
||||
# by CONFIG_* macro name.
|
||||
plat-$(CONFIG_ARCH_MXC) := mxc
|
||||
plat-$(CONFIG_ARCH_OMAP) := omap
|
||||
plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx
|
||||
plat-$(CONFIG_PLAT_IOP) := iop
|
||||
plat-$(CONFIG_PLAT_NOMADIK) := nomadik
|
||||
plat-$(CONFIG_PLAT_ORION) := orion
|
||||
|
@ -184,7 +185,6 @@ plat-$(CONFIG_PLAT_PXA) := pxa
|
|||
plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx s3c samsung
|
||||
plat-$(CONFIG_PLAT_S3C64XX) := s3c64xx s3c samsung
|
||||
plat-$(CONFIG_PLAT_S5PC1XX) := s5pc1xx s3c samsung
|
||||
plat-$(CONFIG_ARCH_STMP3XXX) := stmp3xxx
|
||||
|
||||
ifeq ($(CONFIG_ARCH_EBSA110),y)
|
||||
# This is what happens if you forget the IOCS16 line.
|
||||
|
|
|
@ -63,8 +63,12 @@ endif
|
|||
|
||||
SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
|
||||
|
||||
targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \
|
||||
head.o misc.o $(OBJS)
|
||||
suffix_$(CONFIG_KERNEL_GZIP) = gzip
|
||||
suffix_$(CONFIG_KERNEL_LZO) = lzo
|
||||
|
||||
targets := vmlinux vmlinux.lds \
|
||||
piggy.$(suffix_y) piggy.$(suffix_y).o \
|
||||
font.o font.c head.o misc.o $(OBJS)
|
||||
|
||||
ifeq ($(CONFIG_FUNCTION_TRACER),y)
|
||||
ORIG_CFLAGS := $(KBUILD_CFLAGS)
|
||||
|
@ -87,22 +91,34 @@ endif
|
|||
ifneq ($(PARAMS_PHYS),)
|
||||
LDFLAGS_vmlinux += --defsym params_phys=$(PARAMS_PHYS)
|
||||
endif
|
||||
LDFLAGS_vmlinux += -p --no-undefined -X \
|
||||
$(shell $(CC) $(KBUILD_CFLAGS) --print-libgcc-file-name) -T
|
||||
# ?
|
||||
LDFLAGS_vmlinux += -p
|
||||
# Report unresolved symbol references
|
||||
LDFLAGS_vmlinux += --no-undefined
|
||||
# Delete all temporary local symbols
|
||||
LDFLAGS_vmlinux += -X
|
||||
# Next argument is a linker script
|
||||
LDFLAGS_vmlinux += -T
|
||||
|
||||
# For __aeabi_uidivmod
|
||||
lib1funcs = $(obj)/lib1funcs.o
|
||||
|
||||
$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S FORCE
|
||||
$(call cmd,shipped)
|
||||
|
||||
# Don't allow any static data in misc.o, which
|
||||
# would otherwise mess up our GOT table
|
||||
CFLAGS_misc.o := -Dstatic=
|
||||
|
||||
$(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.o \
|
||||
$(addprefix $(obj)/, $(OBJS)) FORCE
|
||||
$(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \
|
||||
$(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE
|
||||
$(call if_changed,ld)
|
||||
@:
|
||||
|
||||
$(obj)/piggy.gz: $(obj)/../Image FORCE
|
||||
$(call if_changed,gzip)
|
||||
$(obj)/piggy.$(suffix_y): $(obj)/../Image FORCE
|
||||
$(call if_changed,$(suffix_y))
|
||||
|
||||
$(obj)/piggy.o: $(obj)/piggy.gz FORCE
|
||||
$(obj)/piggy.$(suffix_y).o: $(obj)/piggy.$(suffix_y) FORCE
|
||||
|
||||
CFLAGS_font.o := -Dstatic=
|
||||
|
||||
|
|
|
@ -27,6 +27,14 @@
|
|||
.macro writeb, ch, rb
|
||||
mcr p14, 0, \ch, c0, c5, 0
|
||||
.endm
|
||||
#elif defined(CONFIG_CPU_V7)
|
||||
.macro loadsp, rb
|
||||
.endm
|
||||
.macro writeb, ch, rb
|
||||
wait: mrc p14, 0, pc, c0, c1, 0
|
||||
bcs wait
|
||||
mcr p14, 0, \ch, c0, c5, 0
|
||||
.endm
|
||||
#elif defined(CONFIG_CPU_XSCALE)
|
||||
.macro loadsp, rb
|
||||
.endm
|
||||
|
|
|
@ -18,10 +18,15 @@
|
|||
|
||||
unsigned int __machine_arch_type;
|
||||
|
||||
#define _LINUX_STRING_H_
|
||||
|
||||
#include <linux/compiler.h> /* for inline */
|
||||
#include <linux/types.h> /* for size_t */
|
||||
#include <linux/stddef.h> /* for NULL */
|
||||
#include <asm/string.h>
|
||||
#include <linux/linkage.h>
|
||||
|
||||
#include <asm/unaligned.h>
|
||||
|
||||
#ifdef STANDALONE_DEBUG
|
||||
#define putstr printf
|
||||
|
@ -48,6 +53,18 @@ static void icedcc_putc(int ch)
|
|||
|
||||
asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch));
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_CPU_V7)
|
||||
|
||||
static void icedcc_putc(int ch)
|
||||
{
|
||||
asm(
|
||||
"wait: mrc p14, 0, pc, c0, c1, 0 \n\
|
||||
bcs wait \n\
|
||||
mcr p14, 0, %0, c0, c5, 0 "
|
||||
: : "r" (ch));
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_CPU_XSCALE)
|
||||
|
||||
static void icedcc_putc(int ch)
|
||||
|
@ -83,7 +100,6 @@ static void icedcc_putc(int ch)
|
|||
#endif
|
||||
|
||||
#define putc(ch) icedcc_putc(ch)
|
||||
#define flush() do { } while (0)
|
||||
#endif
|
||||
|
||||
static void putstr(const char *ptr)
|
||||
|
@ -188,34 +204,8 @@ static inline __ptr_t memcpy(__ptr_t __dest, __const __ptr_t __src,
|
|||
/*
|
||||
* gzip delarations
|
||||
*/
|
||||
#define OF(args) args
|
||||
#define STATIC static
|
||||
|
||||
typedef unsigned char uch;
|
||||
typedef unsigned short ush;
|
||||
typedef unsigned long ulg;
|
||||
|
||||
#define WSIZE 0x8000 /* Window size must be at least 32k, */
|
||||
/* and a power of two */
|
||||
|
||||
static uch *inbuf; /* input buffer */
|
||||
static uch window[WSIZE]; /* Sliding window buffer */
|
||||
|
||||
static unsigned insize; /* valid bytes in inbuf */
|
||||
static unsigned inptr; /* index of next byte to be processed in inbuf */
|
||||
static unsigned outcnt; /* bytes in output buffer */
|
||||
|
||||
/* gzip flag byte */
|
||||
#define ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */
|
||||
#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
|
||||
#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
|
||||
#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
|
||||
#define COMMENT 0x10 /* bit 4 set: file comment present */
|
||||
#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
|
||||
#define RESERVED 0xC0 /* bit 6,7: reserved */
|
||||
|
||||
#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
|
||||
|
||||
/* Diagnostic functions */
|
||||
#ifdef DEBUG
|
||||
# define Assert(cond,msg) {if(!(cond)) error(msg);}
|
||||
|
@ -233,24 +223,20 @@ static unsigned outcnt; /* bytes in output buffer */
|
|||
# define Tracecv(c,x)
|
||||
#endif
|
||||
|
||||
static int fill_inbuf(void);
|
||||
static void flush_window(void);
|
||||
static void error(char *m);
|
||||
|
||||
extern char input_data[];
|
||||
extern char input_data_end[];
|
||||
|
||||
static uch *output_data;
|
||||
static ulg output_ptr;
|
||||
static ulg bytes_out;
|
||||
static unsigned char *output_data;
|
||||
static unsigned long output_ptr;
|
||||
|
||||
static void error(char *m);
|
||||
|
||||
static void putstr(const char *);
|
||||
|
||||
extern int end;
|
||||
static ulg free_mem_ptr;
|
||||
static ulg free_mem_end_ptr;
|
||||
static unsigned long free_mem_ptr;
|
||||
static unsigned long free_mem_end_ptr;
|
||||
|
||||
#ifdef STANDALONE_DEBUG
|
||||
#define NO_INFLATE_MALLOC
|
||||
|
@ -258,46 +244,13 @@ static ulg free_mem_end_ptr;
|
|||
|
||||
#define ARCH_HAS_DECOMP_WDOG
|
||||
|
||||
#include "../../../../lib/inflate.c"
|
||||
#ifdef CONFIG_KERNEL_GZIP
|
||||
#include "../../../../lib/decompress_inflate.c"
|
||||
#endif
|
||||
|
||||
/* ===========================================================================
|
||||
* Fill the input buffer. This is called only when the buffer is empty
|
||||
* and at least one byte is really needed.
|
||||
*/
|
||||
int fill_inbuf(void)
|
||||
{
|
||||
if (insize != 0)
|
||||
error("ran out of input data");
|
||||
|
||||
inbuf = input_data;
|
||||
insize = &input_data_end[0] - &input_data[0];
|
||||
|
||||
inptr = 1;
|
||||
return inbuf[0];
|
||||
}
|
||||
|
||||
/* ===========================================================================
|
||||
* Write the output window window[0..outcnt-1] and update crc and bytes_out.
|
||||
* (Used for the decompressed data only.)
|
||||
*/
|
||||
void flush_window(void)
|
||||
{
|
||||
ulg c = crc;
|
||||
unsigned n;
|
||||
uch *in, *out, ch;
|
||||
|
||||
in = window;
|
||||
out = &output_data[output_ptr];
|
||||
for (n = 0; n < outcnt; n++) {
|
||||
ch = *out++ = *in++;
|
||||
c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
|
||||
}
|
||||
crc = c;
|
||||
bytes_out += (ulg)outcnt;
|
||||
output_ptr += (ulg)outcnt;
|
||||
outcnt = 0;
|
||||
putstr(".");
|
||||
}
|
||||
#ifdef CONFIG_KERNEL_LZO
|
||||
#include "../../../../lib/decompress_unlzo.c"
|
||||
#endif
|
||||
|
||||
#ifndef arch_error
|
||||
#define arch_error(x)
|
||||
|
@ -314,22 +267,33 @@ static void error(char *x)
|
|||
while(1); /* Halt */
|
||||
}
|
||||
|
||||
asmlinkage void __div0(void)
|
||||
{
|
||||
error("Attempting division by 0!");
|
||||
}
|
||||
|
||||
#ifndef STANDALONE_DEBUG
|
||||
|
||||
ulg
|
||||
decompress_kernel(ulg output_start, ulg free_mem_ptr_p, ulg free_mem_ptr_end_p,
|
||||
int arch_id)
|
||||
unsigned long
|
||||
decompress_kernel(unsigned long output_start, unsigned long free_mem_ptr_p,
|
||||
unsigned long free_mem_ptr_end_p,
|
||||
int arch_id)
|
||||
{
|
||||
output_data = (uch *)output_start; /* Points to kernel start */
|
||||
unsigned char *tmp;
|
||||
|
||||
output_data = (unsigned char *)output_start;
|
||||
free_mem_ptr = free_mem_ptr_p;
|
||||
free_mem_end_ptr = free_mem_ptr_end_p;
|
||||
__machine_arch_type = arch_id;
|
||||
|
||||
arch_decomp_setup();
|
||||
|
||||
makecrc();
|
||||
tmp = (unsigned char *) (((unsigned long)input_data_end) - 4);
|
||||
output_ptr = get_unaligned_le32(tmp);
|
||||
|
||||
putstr("Uncompressing Linux...");
|
||||
gunzip();
|
||||
decompress(input_data, input_data_end - input_data,
|
||||
NULL, NULL, output_data, NULL, error);
|
||||
putstr(" done, booting the kernel.\n");
|
||||
return output_ptr;
|
||||
}
|
||||
|
@ -341,11 +305,10 @@ int main()
|
|||
{
|
||||
output_data = output_buffer;
|
||||
|
||||
makecrc();
|
||||
putstr("Uncompressing Linux...");
|
||||
gunzip();
|
||||
decompress(input_data, input_data_end - input_data,
|
||||
NULL, NULL, output_data, NULL, error);
|
||||
putstr("done.\n");
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
6
arch/arm/boot/compressed/piggy.gzip.S
Normal file
6
arch/arm/boot/compressed/piggy.gzip.S
Normal file
|
@ -0,0 +1,6 @@
|
|||
.section .piggydata,#alloc
|
||||
.globl input_data
|
||||
input_data:
|
||||
.incbin "arch/arm/boot/compressed/piggy.gzip"
|
||||
.globl input_data_end
|
||||
input_data_end:
|
|
@ -1,6 +1,6 @@
|
|||
.section .piggydata,#alloc
|
||||
.globl input_data
|
||||
input_data:
|
||||
.incbin "arch/arm/boot/compressed/piggy.gz"
|
||||
.incbin "arch/arm/boot/compressed/piggy.lzo"
|
||||
.globl input_data_end
|
||||
input_data_end:
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.32-rc5
|
||||
# Sat Oct 17 23:32:24 2009
|
||||
# Linux kernel version: 2.6.33-rc2
|
||||
# Wed Jan 6 00:01:36 2010
|
||||
#
|
||||
CONFIG_ARM=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
|
@ -46,6 +46,7 @@ CONFIG_SYSVIPC_SYSCTL=y
|
|||
#
|
||||
CONFIG_TREE_RCU=y
|
||||
# CONFIG_TREE_PREEMPT_RCU is not set
|
||||
# CONFIG_TINY_RCU is not set
|
||||
# CONFIG_RCU_TRACE is not set
|
||||
CONFIG_RCU_FANOUT=32
|
||||
# CONFIG_RCU_FANOUT_EXACT is not set
|
||||
|
@ -119,14 +120,41 @@ CONFIG_BLOCK=y
|
|||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
# CONFIG_IOSCHED_AS is not set
|
||||
CONFIG_IOSCHED_DEADLINE=y
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
# CONFIG_DEFAULT_AS is not set
|
||||
CONFIG_DEFAULT_DEADLINE=y
|
||||
# CONFIG_DEFAULT_CFQ is not set
|
||||
# CONFIG_DEFAULT_NOOP is not set
|
||||
CONFIG_DEFAULT_IOSCHED="deadline"
|
||||
# CONFIG_INLINE_SPIN_TRYLOCK is not set
|
||||
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
|
||||
# CONFIG_INLINE_SPIN_UNLOCK is not set
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
|
||||
# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_READ_TRYLOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK is not set
|
||||
# CONFIG_INLINE_READ_LOCK_BH is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
|
||||
# CONFIG_INLINE_READ_UNLOCK is not set
|
||||
# CONFIG_INLINE_READ_UNLOCK_BH is not set
|
||||
# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
|
||||
# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_INLINE_WRITE_TRYLOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_BH is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
|
||||
# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
|
||||
# CONFIG_INLINE_WRITE_UNLOCK is not set
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
|
||||
# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
|
||||
# CONFIG_MUTEX_SPIN_ON_OWNER is not set
|
||||
# CONFIG_FREEZER is not set
|
||||
|
||||
#
|
||||
|
@ -155,6 +183,7 @@ CONFIG_MMU=y
|
|||
# CONFIG_ARCH_IXP2000 is not set
|
||||
# CONFIG_ARCH_IXP4XX is not set
|
||||
# CONFIG_ARCH_L7200 is not set
|
||||
# CONFIG_ARCH_DOVE is not set
|
||||
# CONFIG_ARCH_KIRKWOOD is not set
|
||||
# CONFIG_ARCH_LOKI is not set
|
||||
# CONFIG_ARCH_MV78XX0 is not set
|
||||
|
@ -177,6 +206,7 @@ CONFIG_ARCH_U300=y
|
|||
# CONFIG_ARCH_DAVINCI is not set
|
||||
# CONFIG_ARCH_OMAP is not set
|
||||
# CONFIG_ARCH_BCMRING is not set
|
||||
# CONFIG_ARCH_U8500 is not set
|
||||
|
||||
#
|
||||
# ST-Ericsson AB U300/U330/U335/U365 Platform
|
||||
|
@ -265,12 +295,10 @@ CONFIG_FLATMEM_MANUAL=y
|
|||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4096
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=999999
|
||||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
|
||||
# CONFIG_KSM is not set
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
|
@ -499,14 +527,21 @@ CONFIG_MTD_NAND_IDS=y
|
|||
CONFIG_BLK_DEV=y
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
# CONFIG_BLK_DEV_LOOP is not set
|
||||
|
||||
#
|
||||
# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
|
||||
#
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
# CONFIG_BLK_DEV_RAM is not set
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
CONFIG_MISC_DEVICES=y
|
||||
# CONFIG_AD525X_DPOT is not set
|
||||
# CONFIG_ICS932S401 is not set
|
||||
# CONFIG_ENCLOSURE_SERVICES is not set
|
||||
# CONFIG_ISL29003 is not set
|
||||
# CONFIG_DS1682 is not set
|
||||
# CONFIG_TI_DAC7512 is not set
|
||||
# CONFIG_C2PORT is not set
|
||||
|
||||
#
|
||||
|
@ -517,6 +552,7 @@ CONFIG_MISC_DEVICES=y
|
|||
# CONFIG_EEPROM_LEGACY is not set
|
||||
# CONFIG_EEPROM_MAX6875 is not set
|
||||
# CONFIG_EEPROM_93CX6 is not set
|
||||
# CONFIG_IWMC3200TOP is not set
|
||||
CONFIG_HAVE_IDE=y
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
|
@ -539,6 +575,7 @@ CONFIG_HAVE_IDE=y
|
|||
CONFIG_INPUT=y
|
||||
# CONFIG_INPUT_FF_MEMLESS is not set
|
||||
# CONFIG_INPUT_POLLDEV is not set
|
||||
# CONFIG_INPUT_SPARSEKMAP is not set
|
||||
|
||||
#
|
||||
# Userland interfaces
|
||||
|
@ -645,7 +682,6 @@ CONFIG_I2C_STU300=y
|
|||
#
|
||||
# Miscellaneous I2C Chip support
|
||||
#
|
||||
# CONFIG_DS1682 is not set
|
||||
# CONFIG_SENSORS_TSL2550 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
|
@ -661,6 +697,8 @@ CONFIG_SPI_MASTER=y
|
|||
# CONFIG_SPI_BITBANG is not set
|
||||
# CONFIG_SPI_GPIO is not set
|
||||
CONFIG_SPI_PL022=y
|
||||
# CONFIG_SPI_XILINX is not set
|
||||
# CONFIG_SPI_DESIGNWARE is not set
|
||||
|
||||
#
|
||||
# SPI Protocol Masters
|
||||
|
@ -708,6 +746,7 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# CONFIG_MFD_T7L66XB is not set
|
||||
# CONFIG_MFD_TC6387XB is not set
|
||||
# CONFIG_PMIC_DA903X is not set
|
||||
# CONFIG_PMIC_ADP5520 is not set
|
||||
# CONFIG_MFD_WM8400 is not set
|
||||
# CONFIG_MFD_WM831X is not set
|
||||
# CONFIG_MFD_WM8350_I2C is not set
|
||||
|
@ -716,6 +755,8 @@ CONFIG_SSB_POSSIBLE=y
|
|||
CONFIG_AB3100_CORE=y
|
||||
CONFIG_AB3100_OTP=y
|
||||
# CONFIG_EZX_PCAP is not set
|
||||
# CONFIG_MFD_88PM8607 is not set
|
||||
# CONFIG_AB4500_CORE is not set
|
||||
CONFIG_REGULATOR=y
|
||||
# CONFIG_REGULATOR_DEBUG is not set
|
||||
# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
|
||||
|
@ -723,6 +764,7 @@ CONFIG_REGULATOR=y
|
|||
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
|
||||
# CONFIG_REGULATOR_BQ24022 is not set
|
||||
# CONFIG_REGULATOR_MAX1586 is not set
|
||||
# CONFIG_REGULATOR_MAX8660 is not set
|
||||
# CONFIG_REGULATOR_LP3971 is not set
|
||||
CONFIG_REGULATOR_AB3100=y
|
||||
# CONFIG_REGULATOR_TPS65023 is not set
|
||||
|
@ -840,7 +882,9 @@ CONFIG_LEDS_CLASS=y
|
|||
# CONFIG_LEDS_LP3944 is not set
|
||||
# CONFIG_LEDS_PCA955X is not set
|
||||
# CONFIG_LEDS_DAC124S085 is not set
|
||||
# CONFIG_LEDS_REGULATOR is not set
|
||||
# CONFIG_LEDS_BD2802 is not set
|
||||
# CONFIG_LEDS_LT3593 is not set
|
||||
|
||||
#
|
||||
# LED Triggers
|
||||
|
@ -882,6 +926,7 @@ CONFIG_RTC_INTF_DEV=y
|
|||
# CONFIG_RTC_DRV_PCF8563 is not set
|
||||
# CONFIG_RTC_DRV_PCF8583 is not set
|
||||
# CONFIG_RTC_DRV_M41T80 is not set
|
||||
# CONFIG_RTC_DRV_BQ32K is not set
|
||||
# CONFIG_RTC_DRV_S35390A is not set
|
||||
# CONFIG_RTC_DRV_FM3130 is not set
|
||||
# CONFIG_RTC_DRV_RX8581 is not set
|
||||
|
@ -911,7 +956,9 @@ CONFIG_RTC_INTF_DEV=y
|
|||
# CONFIG_RTC_DRV_M48T86 is not set
|
||||
# CONFIG_RTC_DRV_M48T35 is not set
|
||||
# CONFIG_RTC_DRV_M48T59 is not set
|
||||
# CONFIG_RTC_DRV_MSM6242 is not set
|
||||
# CONFIG_RTC_DRV_BQ4802 is not set
|
||||
# CONFIG_RTC_DRV_RP5C01 is not set
|
||||
# CONFIG_RTC_DRV_V3020 is not set
|
||||
CONFIG_RTC_DRV_AB3100=y
|
||||
|
||||
|
@ -926,6 +973,15 @@ CONFIG_DMADEVICES=y
|
|||
#
|
||||
# DMA Devices
|
||||
#
|
||||
CONFIG_COH901318=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
|
||||
#
|
||||
# DMA Clients
|
||||
#
|
||||
# CONFIG_NET_DMA is not set
|
||||
# CONFIG_ASYNC_TX_DMA is not set
|
||||
# CONFIG_DMATEST is not set
|
||||
# CONFIG_AUXDISPLAY is not set
|
||||
# CONFIG_UIO is not set
|
||||
|
||||
|
@ -1018,7 +1074,7 @@ CONFIG_MISC_FILESYSTEMS=y
|
|||
CONFIG_MSDOS_PARTITION=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_DEFAULT="iso8859-1"
|
||||
# CONFIG_NLS_CODEPAGE_437 is not set
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
# CONFIG_NLS_CODEPAGE_737 is not set
|
||||
# CONFIG_NLS_CODEPAGE_775 is not set
|
||||
# CONFIG_NLS_CODEPAGE_850 is not set
|
||||
|
@ -1135,6 +1191,7 @@ CONFIG_ARM_UNWIND=y
|
|||
# CONFIG_DEBUG_ERRORS is not set
|
||||
# CONFIG_DEBUG_STACK_USAGE is not set
|
||||
# CONFIG_DEBUG_LL is not set
|
||||
# CONFIG_OC_ETM is not set
|
||||
|
||||
#
|
||||
# Security options
|
||||
|
@ -1142,7 +1199,11 @@ CONFIG_ARM_UNWIND=y
|
|||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_SECURITYFS is not set
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SELINUX is not set
|
||||
# CONFIG_DEFAULT_SECURITY_SMACK is not set
|
||||
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
|
||||
CONFIG_DEFAULT_SECURITY_DAC=y
|
||||
CONFIG_DEFAULT_SECURITY=""
|
||||
# CONFIG_CRYPTO is not set
|
||||
# CONFIG_BINARY_PRINTF is not set
|
||||
|
||||
|
|
|
@ -42,7 +42,8 @@
|
|||
#endif
|
||||
|
||||
#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \
|
||||
defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020)
|
||||
defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) || \
|
||||
defined(CONFIG_CPU_ARM1026)
|
||||
# define MULTI_CACHE 1
|
||||
#endif
|
||||
|
||||
|
@ -154,16 +155,16 @@
|
|||
* Please note that the implementation of these, and the required
|
||||
* effects are cache-type (VIVT/VIPT/PIPT) specific.
|
||||
*
|
||||
* flush_cache_kern_all()
|
||||
* flush_kern_all()
|
||||
*
|
||||
* Unconditionally clean and invalidate the entire cache.
|
||||
*
|
||||
* flush_cache_user_mm(mm)
|
||||
* flush_user_all()
|
||||
*
|
||||
* Clean and invalidate all user space cache entries
|
||||
* before a change of page tables.
|
||||
*
|
||||
* flush_cache_user_range(start, end, flags)
|
||||
* flush_user_range(start, end, flags)
|
||||
*
|
||||
* Clean and invalidate a range of cache entries in the
|
||||
* specified address space before a change of page tables.
|
||||
|
@ -179,6 +180,20 @@
|
|||
* - start - virtual start address
|
||||
* - end - virtual end address
|
||||
*
|
||||
* coherent_user_range(start, end)
|
||||
*
|
||||
* Ensure coherency between the Icache and the Dcache in the
|
||||
* region described by start, end. If you have non-snooping
|
||||
* Harvard caches, you need to implement this function.
|
||||
* - start - virtual start address
|
||||
* - end - virtual end address
|
||||
*
|
||||
* flush_kern_dcache_area(kaddr, size)
|
||||
*
|
||||
* Ensure that the data held in page is written back.
|
||||
* - kaddr - page address
|
||||
* - size - region size
|
||||
*
|
||||
* DMA Cache Coherency
|
||||
* ===================
|
||||
*
|
||||
|
|
|
@ -11,6 +11,7 @@
|
|||
#define __ASM_ARM_CPU_H
|
||||
|
||||
#include <linux/percpu.h>
|
||||
#include <linux/cpu.h>
|
||||
|
||||
struct cpuinfo_arm {
|
||||
struct cpu cpu;
|
||||
|
|
|
@ -138,12 +138,12 @@ extern int get_dma_residue(unsigned int chan);
|
|||
#define NO_DMA 255
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_ISA_DMA_API */
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
extern int isa_dma_bridge_buggy;
|
||||
#else
|
||||
#define isa_dma_bridge_buggy (0)
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_ISA_DMA_API */
|
||||
|
||||
#endif /* __ASM_ARM_DMA_H */
|
||||
|
|
|
@ -97,9 +97,15 @@
|
|||
* stack during a system call. Note that sizeof(struct pt_regs)
|
||||
* has to be a multiple of 8.
|
||||
*/
|
||||
#ifndef __KERNEL__
|
||||
struct pt_regs {
|
||||
long uregs[18];
|
||||
};
|
||||
#else /* __KERNEL__ */
|
||||
struct pt_regs {
|
||||
unsigned long uregs[18];
|
||||
};
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#define ARM_cpsr uregs[16]
|
||||
#define ARM_pc uregs[15]
|
||||
|
|
|
@ -391,6 +391,7 @@
|
|||
#define __NR_pwritev (__NR_SYSCALL_BASE+362)
|
||||
#define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363)
|
||||
#define __NR_perf_event_open (__NR_SYSCALL_BASE+364)
|
||||
#define __NR_recvmmsg (__NR_SYSCALL_BASE+365)
|
||||
|
||||
/*
|
||||
* The following SWIs are ARM private.
|
||||
|
|
|
@ -49,6 +49,26 @@
|
|||
1002:
|
||||
.endm
|
||||
|
||||
#elif defined(CONFIG_CPU_V7)
|
||||
|
||||
.macro addruart, rx
|
||||
.endm
|
||||
|
||||
.macro senduart, rd, rx
|
||||
mcr p14, 0, \rd, c0, c5, 0
|
||||
.endm
|
||||
|
||||
.macro busyuart, rd, rx
|
||||
busy: mrc p14, 0, pc, c0, c1, 0
|
||||
bcs busy
|
||||
.endm
|
||||
|
||||
.macro waituart, rd, rx
|
||||
wait: mrc p14, 0, pc, c0, c1, 0
|
||||
bcs wait
|
||||
|
||||
.endm
|
||||
|
||||
#elif defined(CONFIG_CPU_XSCALE)
|
||||
|
||||
.macro addruart, rx
|
||||
|
|
|
@ -78,15 +78,6 @@ int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack)
|
|||
return 1;
|
||||
if (cpu_architecture() < CPU_ARCH_ARMv6)
|
||||
return 1;
|
||||
#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
|
||||
/*
|
||||
* If we have support for OABI programs, we can never allow NX
|
||||
* support - our signal syscall restart mechanism relies upon
|
||||
* being able to execute code placed on the user stack.
|
||||
*/
|
||||
return 1;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
EXPORT_SYMBOL(arm_elf_read_implies_exec);
|
||||
|
|
|
@ -957,9 +957,7 @@ kuser_cmpxchg_fixup:
|
|||
|
||||
#else
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
mcr p15, 0, r0, c7, c10, 5 @ dmb
|
||||
#endif
|
||||
smp_dmb
|
||||
1: ldrex r3, [r2]
|
||||
subs r3, r3, r0
|
||||
strexeq r3, r1, [r2]
|
||||
|
|
|
@ -212,7 +212,8 @@ void __show_regs(struct pt_regs *regs)
|
|||
char buf[64];
|
||||
|
||||
printk("CPU: %d %s (%s %.*s)\n",
|
||||
smp_processor_id(), print_tainted(), init_utsname()->release,
|
||||
raw_smp_processor_id(), print_tainted(),
|
||||
init_utsname()->release,
|
||||
(int)strcspn(init_utsname()->version, " "),
|
||||
init_utsname()->version);
|
||||
print_symbol("PC is at %s\n", instruction_pointer(regs));
|
||||
|
|
|
@ -102,6 +102,7 @@ struct cpu_cache_fns cpu_cache;
|
|||
#endif
|
||||
#ifdef CONFIG_OUTER_CACHE
|
||||
struct outer_cache_fns outer_cache;
|
||||
EXPORT_SYMBOL(outer_cache);
|
||||
#endif
|
||||
|
||||
struct stack {
|
||||
|
|
|
@ -29,6 +29,7 @@ enum davinci_matrix_types {
|
|||
};
|
||||
|
||||
struct davinci_ks_platform_data {
|
||||
int (*device_enable)(struct device *dev);
|
||||
unsigned short *keymap;
|
||||
u32 keymapsize;
|
||||
u8 rep:1;
|
||||
|
|
|
@ -86,7 +86,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type)
|
|||
unsigned int reg_both, reg_level, reg_type;
|
||||
|
||||
reg_type = __raw_readl(base + GPIO_INT_TYPE);
|
||||
reg_level = __raw_readl(base + GPIO_INT_BOTH_EDGE);
|
||||
reg_level = __raw_readl(base + GPIO_INT_LEVEL);
|
||||
reg_both = __raw_readl(base + GPIO_INT_BOTH_EDGE);
|
||||
|
||||
switch (type) {
|
||||
|
@ -117,7 +117,7 @@ static int gpio_set_irq_type(unsigned int irq, unsigned int type)
|
|||
}
|
||||
|
||||
__raw_writel(reg_type, base + GPIO_INT_TYPE);
|
||||
__raw_writel(reg_level, base + GPIO_INT_BOTH_EDGE);
|
||||
__raw_writel(reg_level, base + GPIO_INT_LEVEL);
|
||||
__raw_writel(reg_both, base + GPIO_INT_BOTH_EDGE);
|
||||
|
||||
gpio_ack_irq(irq);
|
||||
|
|
|
@ -30,7 +30,9 @@ static inline void putc(char c)
|
|||
UART[UART_TX] = c;
|
||||
}
|
||||
|
||||
#define flush() do { } while (0)
|
||||
static inline void flush(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
* nothing to do
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/platform_device.h>
|
||||
#include <linux/ata_platform.h>
|
||||
#include <linux/mv643xx_eth.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/spi/flash.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/orion_spi.h>
|
||||
|
@ -53,6 +54,11 @@ static void __init rd88f6192_init(void)
|
|||
*/
|
||||
kirkwood_init();
|
||||
|
||||
orion_gpio_set_valid(RD88F6192_GPIO_USB_VBUS, 1);
|
||||
if (gpio_request(RD88F6192_GPIO_USB_VBUS, "USB VBUS") != 0 ||
|
||||
gpio_direction_output(RD88F6192_GPIO_USB_VBUS, 1) != 0)
|
||||
pr_err("RD-88F6192-NAS: failed to setup USB VBUS GPIO\n");
|
||||
|
||||
kirkwood_ehci_init();
|
||||
kirkwood_ge00_init(&rd88f6192_ge00_data);
|
||||
kirkwood_sata_init(&rd88f6192_sata_data);
|
||||
|
|
|
@ -10,6 +10,8 @@
|
|||
#include <mach/hardware.h>
|
||||
#include <mach/clocks.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/string.h>
|
||||
|
||||
struct module;
|
||||
|
||||
|
|
|
@ -119,6 +119,11 @@ static unsigned long get_rate_nfc(struct clk *clk)
|
|||
return get_rate_per(8);
|
||||
}
|
||||
|
||||
static unsigned long get_rate_gpt(struct clk *clk)
|
||||
{
|
||||
return get_rate_per(5);
|
||||
}
|
||||
|
||||
static unsigned long get_rate_otg(struct clk *clk)
|
||||
{
|
||||
return 48000000; /* FIXME */
|
||||
|
@ -144,7 +149,7 @@ static void clk_cgcr_disable(struct clk *clk)
|
|||
__raw_writel(reg, clk->enable_reg);
|
||||
}
|
||||
|
||||
#define DEFINE_CLOCK(name, i, er, es, gr, sr) \
|
||||
#define DEFINE_CLOCK(name, i, er, es, gr, sr, s) \
|
||||
static struct clk name = { \
|
||||
.id = i, \
|
||||
.enable_reg = CRM_BASE + er, \
|
||||
|
@ -153,27 +158,30 @@ static void clk_cgcr_disable(struct clk *clk)
|
|||
.set_rate = sr, \
|
||||
.enable = clk_cgcr_enable, \
|
||||
.disable = clk_cgcr_disable, \
|
||||
.secondary = s, \
|
||||
}
|
||||
|
||||
DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL);
|
||||
DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL);
|
||||
DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL);
|
||||
DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL);
|
||||
DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL);
|
||||
DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL);
|
||||
DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL);
|
||||
DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL);
|
||||
DEFINE_CLOCK(fec_clk, 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
|
||||
DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_gpt, NULL, NULL);
|
||||
DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL);
|
||||
DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL);
|
||||
DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk);
|
||||
DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk);
|
||||
DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk);
|
||||
DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL, &uart_per_clk);
|
||||
DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL, &uart_per_clk);
|
||||
DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL, NULL);
|
||||
DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL, NULL);
|
||||
DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL);
|
||||
DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL);
|
||||
DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk);
|
||||
|
||||
#define _REGISTER_CLOCK(d, n, c) \
|
||||
{ \
|
||||
|
@ -208,13 +216,21 @@ static struct clk_lookup lookups[] = {
|
|||
_REGISTER_CLOCK("fec.0", NULL, fec_clk)
|
||||
};
|
||||
|
||||
int __init mx25_clocks_init(unsigned long fref)
|
||||
int __init mx25_clocks_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(lookups); i++)
|
||||
clkdev_add(&lookups[i]);
|
||||
|
||||
/* Turn off all clocks except the ones we need to survive, namely:
|
||||
* EMI, GPIO1-3 (CCM_CGCR1[18:16]), GPT1, IOMUXC (CCM_CGCR1[27]), IIM,
|
||||
* SCC
|
||||
*/
|
||||
__raw_writel((1 << 19), CRM_BASE + CCM_CGCR0);
|
||||
__raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1);
|
||||
__raw_writel((1 << 5), CRM_BASE + CCM_CGCR2);
|
||||
|
||||
mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -91,7 +91,7 @@ static void __init mx25pdk_init(void)
|
|||
|
||||
static void __init mx25pdk_timer_init(void)
|
||||
{
|
||||
mx25_clocks_init(26000000);
|
||||
mx25_clocks_init();
|
||||
}
|
||||
|
||||
static struct sys_timer mx25pdk_timer = {
|
||||
|
|
|
@ -173,6 +173,7 @@ static void expio_unmask_irq(u32 irq)
|
|||
}
|
||||
|
||||
static struct irq_chip expio_irq_chip = {
|
||||
.name = "EXPIO(CPLD)",
|
||||
.ack = expio_ack_irq,
|
||||
.mask = expio_mask_irq,
|
||||
.unmask = expio_unmask_irq,
|
||||
|
@ -302,6 +303,7 @@ static struct regulator_init_data ldo1_data = {
|
|||
.min_uV = 2800000,
|
||||
.max_uV = 2800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
.apply_uV = 1,
|
||||
},
|
||||
};
|
||||
|
@ -322,6 +324,7 @@ static struct regulator_init_data ldo2_data = {
|
|||
.min_uV = 3300000,
|
||||
.max_uV = 3300000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
.apply_uV = 1,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(ldo2_consumers),
|
||||
|
@ -459,6 +462,7 @@ static int mx31_wm8350_init(struct wm8350 *wm8350)
|
|||
|
||||
static struct wm8350_platform_data __initdata mx31_wm8350_pdata = {
|
||||
.init = mx31_wm8350_init,
|
||||
.irq_base = MXC_BOARD_IRQ_START + MXC_MAX_EXP_IO_LINES,
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
|
@ -214,8 +214,8 @@ int omap1_select_table_rate(struct clk *clk, unsigned long rate)
|
|||
struct mpu_rate * ptr;
|
||||
unsigned long dpll1_rate, ref_rate;
|
||||
|
||||
dpll1_rate = clk_get_rate(ck_dpll1_p);
|
||||
ref_rate = clk_get_rate(ck_ref_p);
|
||||
dpll1_rate = ck_dpll1_p->rate;
|
||||
ref_rate = ck_ref_p->rate;
|
||||
|
||||
for (ptr = omap1_rate_table; ptr->rate; ptr++) {
|
||||
if (ptr->xtal != ref_rate)
|
||||
|
@ -306,7 +306,7 @@ long omap1_round_to_table_rate(struct clk *clk, unsigned long rate)
|
|||
long highest_rate;
|
||||
unsigned long ref_rate;
|
||||
|
||||
ref_rate = clk_get_rate(ck_ref_p);
|
||||
ref_rate = ck_ref_p->rate;
|
||||
|
||||
highest_rate = -EINVAL;
|
||||
|
||||
|
|
|
@ -599,7 +599,7 @@ static struct clk i2c_ick = {
|
|||
static struct omap_clk omap_clks[] = {
|
||||
/* non-ULPD clocks */
|
||||
CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310 | CK_7XX),
|
||||
CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310),
|
||||
CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310 | CK_7XX),
|
||||
/* CK_GEN1 clocks */
|
||||
CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX),
|
||||
CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX),
|
||||
|
@ -627,7 +627,7 @@ static struct omap_clk omap_clks[] = {
|
|||
CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX),
|
||||
CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310),
|
||||
CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX),
|
||||
CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310),
|
||||
CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX),
|
||||
CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310),
|
||||
CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX),
|
||||
CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX),
|
||||
|
@ -658,6 +658,10 @@ static struct omap_clk omap_clks[] = {
|
|||
CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310 | CK_7XX),
|
||||
CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX),
|
||||
CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310 | CK_7XX),
|
||||
CLK("omap1_spi100k.1", "fck", &dummy_ck, CK_7XX),
|
||||
CLK("omap1_spi100k.1", "ick", &dummy_ck, CK_7XX),
|
||||
CLK("omap1_spi100k.2", "fck", &dummy_ck, CK_7XX),
|
||||
CLK("omap1_spi100k.2", "ick", &dummy_ck, CK_7XX),
|
||||
CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
|
||||
CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX),
|
||||
CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310),
|
||||
|
@ -674,7 +678,7 @@ static struct omap_clk omap_clks[] = {
|
|||
* init
|
||||
*/
|
||||
|
||||
static struct clk_functions omap1_clk_functions __initdata = {
|
||||
static struct clk_functions omap1_clk_functions = {
|
||||
.clk_enable = omap1_clk_enable,
|
||||
.clk_disable = omap1_clk_disable,
|
||||
.clk_round_rate = omap1_clk_round_rate,
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/spi/spi.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
@ -23,6 +24,7 @@
|
|||
#include <plat/mux.h>
|
||||
#include <mach/gpio.h>
|
||||
#include <plat/mmc.h>
|
||||
#include <plat/omap7xx.h>
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
|
@ -196,6 +198,38 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
|||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/* OMAP7xx SPI support */
|
||||
#if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE)
|
||||
|
||||
struct platform_device omap_spi1 = {
|
||||
.name = "omap1_spi100k",
|
||||
.id = 1,
|
||||
};
|
||||
|
||||
struct platform_device omap_spi2 = {
|
||||
.name = "omap1_spi100k",
|
||||
.id = 2,
|
||||
};
|
||||
|
||||
static void omap_init_spi100k(void)
|
||||
{
|
||||
omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
|
||||
if (omap_spi1.dev.platform_data)
|
||||
platform_device_register(&omap_spi1);
|
||||
|
||||
omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
|
||||
if (omap_spi2.dev.platform_data)
|
||||
platform_device_register(&omap_spi2);
|
||||
}
|
||||
|
||||
#else
|
||||
static inline void omap_init_spi100k(void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
#if defined(CONFIG_OMAP_STI)
|
||||
|
||||
#define OMAP1_STI_BASE 0xfffea000
|
||||
|
@ -263,6 +297,7 @@ static int __init omap1_init_devices(void)
|
|||
|
||||
omap_init_mbox();
|
||||
omap_init_rtc();
|
||||
omap_init_spi100k();
|
||||
omap_init_sti();
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -62,6 +62,14 @@ MUX_CFG_7XX("MMC_7XX_DAT0", 2, 17, 0, 16, 1, 0)
|
|||
/* I2C interface */
|
||||
MUX_CFG_7XX("I2C_7XX_SCL", 5, 1, 0, 0, 1, 0)
|
||||
MUX_CFG_7XX("I2C_7XX_SDA", 5, 5, 0, 0, 1, 0)
|
||||
|
||||
/* SPI pins */
|
||||
MUX_CFG_7XX("SPI_7XX_1", 6, 5, 4, 4, 1, 0)
|
||||
MUX_CFG_7XX("SPI_7XX_2", 6, 9, 4, 8, 1, 0)
|
||||
MUX_CFG_7XX("SPI_7XX_3", 6, 13, 4, 12, 1, 0)
|
||||
MUX_CFG_7XX("SPI_7XX_4", 6, 17, 4, 16, 1, 0)
|
||||
MUX_CFG_7XX("SPI_7XX_5", 8, 25, 0, 24, 0, 0)
|
||||
MUX_CFG_7XX("SPI_7XX_6", 9, 5, 0, 4, 0, 0)
|
||||
};
|
||||
#define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins)
|
||||
#else
|
||||
|
|
|
@ -80,6 +80,7 @@ config MACH_OVERO
|
|||
config MACH_OMAP3EVM
|
||||
bool "OMAP 3530 EVM board"
|
||||
depends on ARCH_OMAP3 && ARCH_OMAP34XX
|
||||
select OMAP_PACKAGE_CBB
|
||||
|
||||
config MACH_OMAP3517EVM
|
||||
bool "OMAP3517/ AM3517 EVM board"
|
||||
|
|
|
@ -63,21 +63,21 @@ static int board_keymap[] = {
|
|||
KEY(5, 1, KEY_H),
|
||||
KEY(5, 2, KEY_J),
|
||||
KEY(5, 3, KEY_F3),
|
||||
KEY(5, 4, KEY_UNKNOWN),
|
||||
KEY(5, 5, KEY_VOLUMEDOWN),
|
||||
KEY(5, 6, KEY_M),
|
||||
KEY(5, 7, KEY_ENTER),
|
||||
KEY(5, 7, KEY_RIGHT),
|
||||
KEY(6, 0, KEY_Q),
|
||||
KEY(6, 1, KEY_A),
|
||||
KEY(6, 2, KEY_N),
|
||||
KEY(6, 3, KEY_BACKSPACE),
|
||||
KEY(6, 6, KEY_P),
|
||||
KEY(6, 7, KEY_SELECT),
|
||||
KEY(6, 7, KEY_UP),
|
||||
KEY(7, 0, KEY_PROG1), /*MACRO 1 <User defined> */
|
||||
KEY(7, 1, KEY_PROG2), /*MACRO 2 <User defined> */
|
||||
KEY(7, 2, KEY_PROG3), /*MACRO 3 <User defined> */
|
||||
KEY(7, 3, KEY_PROG4), /*MACRO 4 <User defined> */
|
||||
KEY(7, 5, KEY_RIGHT),
|
||||
KEY(7, 6, KEY_UP),
|
||||
KEY(7, 6, KEY_SELECT),
|
||||
KEY(7, 7, KEY_DOWN)
|
||||
};
|
||||
|
||||
|
|
|
@ -449,18 +449,56 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
|
|||
#ifdef CONFIG_CPU_FREQ
|
||||
/*
|
||||
* Walk PRCM rate table and fillout cpufreq freq_table
|
||||
* XXX This should be replaced by an OPP layer in the near future
|
||||
*/
|
||||
static struct cpufreq_frequency_table freq_table[ARRAY_SIZE(rate_table)];
|
||||
static struct cpufreq_frequency_table *freq_table;
|
||||
|
||||
void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
|
||||
{
|
||||
struct prcm_config *prcm;
|
||||
const struct prcm_config *prcm;
|
||||
long sys_ck_rate;
|
||||
int i = 0;
|
||||
int tbl_sz = 0;
|
||||
|
||||
sys_ck_rate = clk_get_rate(sclk);
|
||||
|
||||
for (prcm = rate_table; prcm->mpu_speed; prcm++) {
|
||||
if (!(prcm->flags & cpu_mask))
|
||||
continue;
|
||||
if (prcm->xtal_speed != sys_ck.rate)
|
||||
if (prcm->xtal_speed != sys_ck_rate)
|
||||
continue;
|
||||
|
||||
/* don't put bypass rates in table */
|
||||
if (prcm->dpll_speed == prcm->xtal_speed)
|
||||
continue;
|
||||
|
||||
tbl_sz++;
|
||||
}
|
||||
|
||||
/*
|
||||
* XXX Ensure that we're doing what CPUFreq expects for this error
|
||||
* case and the following one
|
||||
*/
|
||||
if (tbl_sz == 0) {
|
||||
pr_warning("%s: no matching entries in rate_table\n",
|
||||
__func__);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Include the CPUFREQ_TABLE_END terminator entry */
|
||||
tbl_sz++;
|
||||
|
||||
freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz,
|
||||
GFP_ATOMIC);
|
||||
if (!freq_table) {
|
||||
pr_err("%s: could not kzalloc frequency table\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
for (prcm = rate_table; prcm->mpu_speed; prcm++) {
|
||||
if (!(prcm->flags & cpu_mask))
|
||||
continue;
|
||||
if (prcm->xtal_speed != sys_ck_rate)
|
||||
continue;
|
||||
|
||||
/* don't put bypass rates in table */
|
||||
|
@ -472,17 +510,17 @@ void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
|
|||
i++;
|
||||
}
|
||||
|
||||
if (i == 0) {
|
||||
printk(KERN_WARNING "%s: failed to initialize frequency "
|
||||
"table\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
freq_table[i].index = i;
|
||||
freq_table[i].frequency = CPUFREQ_TABLE_END;
|
||||
|
||||
*table = &freq_table[0];
|
||||
}
|
||||
|
||||
void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
|
||||
{
|
||||
kfree(freq_table);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
struct clk_functions omap2_clk_functions = {
|
||||
|
@ -494,6 +532,7 @@ struct clk_functions omap2_clk_functions = {
|
|||
.clk_disable_unused = omap2_clk_disable_unused,
|
||||
#ifdef CONFIG_CPU_FREQ
|
||||
.clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
|
||||
.clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
@ -34,7 +34,6 @@
|
|||
#include <asm/div64.h>
|
||||
#include <asm/clkdev.h>
|
||||
|
||||
#include <plat/sdrc.h>
|
||||
#include "clock.h"
|
||||
#include "clock34xx.h"
|
||||
#include "sdrc.h"
|
||||
|
|
|
@ -671,7 +671,6 @@ static struct clk dpll4_m3x2_ck = {
|
|||
.name = "dpll4_m3x2_ck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &dpll4_m3_ck,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
|
||||
.enable_bit = OMAP3430_PWRDN_TV_SHIFT,
|
||||
.flags = INVERT_ENABLE,
|
||||
|
@ -776,6 +775,8 @@ static struct clk dpll4_m5_ck = {
|
|||
.clksel_mask = OMAP3430_CLKSEL_CAM_MASK,
|
||||
.clksel = div16_dpll4_clksel,
|
||||
.clkdm_name = "dpll4_clkdm",
|
||||
.set_rate = &omap2_clksel_set_rate,
|
||||
.round_rate = &omap2_clksel_round_rate,
|
||||
.recalc = &omap2_clksel_recalc,
|
||||
};
|
||||
|
||||
|
@ -809,7 +810,6 @@ static struct clk dpll4_m6x2_ck = {
|
|||
.name = "dpll4_m6x2_ck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &dpll4_m6_ck,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
|
||||
.enable_bit = OMAP3430_PWRDN_EMU_PERIPH_SHIFT,
|
||||
.flags = INVERT_ENABLE,
|
||||
|
@ -1045,7 +1045,6 @@ static struct clk iva2_ck = {
|
|||
.name = "iva2_ck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &dpll2_m2_ck,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN),
|
||||
.enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
|
||||
.clkdm_name = "iva2_clkdm",
|
||||
|
@ -1119,7 +1118,6 @@ static struct clk gfx_l3_ck = {
|
|||
.name = "gfx_l3_ck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &l3_ick,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
|
||||
.enable_bit = OMAP_EN_GFX_SHIFT,
|
||||
.recalc = &followparent_recalc,
|
||||
|
@ -1500,6 +1498,7 @@ static struct clk uart2_fck = {
|
|||
.parent = &core_48m_fck,
|
||||
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
|
||||
.enable_bit = OMAP3430_EN_UART2_SHIFT,
|
||||
.clkdm_name = "core_l4_clkdm",
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
|
@ -1509,6 +1508,7 @@ static struct clk uart1_fck = {
|
|||
.parent = &core_48m_fck,
|
||||
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
|
||||
.enable_bit = OMAP3430_EN_UART1_SHIFT,
|
||||
.clkdm_name = "core_l4_clkdm",
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
|
@ -2745,7 +2745,7 @@ static struct clk mcbsp4_ick = {
|
|||
};
|
||||
|
||||
static const struct clksel mcbsp_234_clksel[] = {
|
||||
{ .parent = &core_96m_fck, .rates = common_mcbsp_96m_rates },
|
||||
{ .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates },
|
||||
{ .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates },
|
||||
{ .parent = NULL }
|
||||
};
|
||||
|
|
|
@ -346,37 +346,37 @@ static struct clk aess_fclk = {
|
|||
};
|
||||
|
||||
static const struct clksel_rate div31_1to31_rates[] = {
|
||||
{ .div = 1, .val = 0, .flags = RATE_IN_4430 },
|
||||
{ .div = 2, .val = 1, .flags = RATE_IN_4430 },
|
||||
{ .div = 3, .val = 2, .flags = RATE_IN_4430 },
|
||||
{ .div = 4, .val = 3, .flags = RATE_IN_4430 },
|
||||
{ .div = 5, .val = 4, .flags = RATE_IN_4430 },
|
||||
{ .div = 6, .val = 5, .flags = RATE_IN_4430 },
|
||||
{ .div = 7, .val = 6, .flags = RATE_IN_4430 },
|
||||
{ .div = 8, .val = 7, .flags = RATE_IN_4430 },
|
||||
{ .div = 9, .val = 8, .flags = RATE_IN_4430 },
|
||||
{ .div = 10, .val = 9, .flags = RATE_IN_4430 },
|
||||
{ .div = 11, .val = 10, .flags = RATE_IN_4430 },
|
||||
{ .div = 12, .val = 11, .flags = RATE_IN_4430 },
|
||||
{ .div = 13, .val = 12, .flags = RATE_IN_4430 },
|
||||
{ .div = 14, .val = 13, .flags = RATE_IN_4430 },
|
||||
{ .div = 15, .val = 14, .flags = RATE_IN_4430 },
|
||||
{ .div = 16, .val = 15, .flags = RATE_IN_4430 },
|
||||
{ .div = 17, .val = 16, .flags = RATE_IN_4430 },
|
||||
{ .div = 18, .val = 17, .flags = RATE_IN_4430 },
|
||||
{ .div = 19, .val = 18, .flags = RATE_IN_4430 },
|
||||
{ .div = 20, .val = 19, .flags = RATE_IN_4430 },
|
||||
{ .div = 21, .val = 20, .flags = RATE_IN_4430 },
|
||||
{ .div = 22, .val = 21, .flags = RATE_IN_4430 },
|
||||
{ .div = 23, .val = 22, .flags = RATE_IN_4430 },
|
||||
{ .div = 24, .val = 23, .flags = RATE_IN_4430 },
|
||||
{ .div = 25, .val = 24, .flags = RATE_IN_4430 },
|
||||
{ .div = 26, .val = 25, .flags = RATE_IN_4430 },
|
||||
{ .div = 27, .val = 26, .flags = RATE_IN_4430 },
|
||||
{ .div = 28, .val = 27, .flags = RATE_IN_4430 },
|
||||
{ .div = 29, .val = 28, .flags = RATE_IN_4430 },
|
||||
{ .div = 30, .val = 29, .flags = RATE_IN_4430 },
|
||||
{ .div = 31, .val = 30, .flags = RATE_IN_4430 },
|
||||
{ .div = 1, .val = 1, .flags = RATE_IN_4430 },
|
||||
{ .div = 2, .val = 2, .flags = RATE_IN_4430 },
|
||||
{ .div = 3, .val = 3, .flags = RATE_IN_4430 },
|
||||
{ .div = 4, .val = 4, .flags = RATE_IN_4430 },
|
||||
{ .div = 5, .val = 5, .flags = RATE_IN_4430 },
|
||||
{ .div = 6, .val = 6, .flags = RATE_IN_4430 },
|
||||
{ .div = 7, .val = 7, .flags = RATE_IN_4430 },
|
||||
{ .div = 8, .val = 8, .flags = RATE_IN_4430 },
|
||||
{ .div = 9, .val = 9, .flags = RATE_IN_4430 },
|
||||
{ .div = 10, .val = 10, .flags = RATE_IN_4430 },
|
||||
{ .div = 11, .val = 11, .flags = RATE_IN_4430 },
|
||||
{ .div = 12, .val = 12, .flags = RATE_IN_4430 },
|
||||
{ .div = 13, .val = 13, .flags = RATE_IN_4430 },
|
||||
{ .div = 14, .val = 14, .flags = RATE_IN_4430 },
|
||||
{ .div = 15, .val = 15, .flags = RATE_IN_4430 },
|
||||
{ .div = 16, .val = 16, .flags = RATE_IN_4430 },
|
||||
{ .div = 17, .val = 17, .flags = RATE_IN_4430 },
|
||||
{ .div = 18, .val = 18, .flags = RATE_IN_4430 },
|
||||
{ .div = 19, .val = 19, .flags = RATE_IN_4430 },
|
||||
{ .div = 20, .val = 20, .flags = RATE_IN_4430 },
|
||||
{ .div = 21, .val = 21, .flags = RATE_IN_4430 },
|
||||
{ .div = 22, .val = 22, .flags = RATE_IN_4430 },
|
||||
{ .div = 23, .val = 23, .flags = RATE_IN_4430 },
|
||||
{ .div = 24, .val = 24, .flags = RATE_IN_4430 },
|
||||
{ .div = 25, .val = 25, .flags = RATE_IN_4430 },
|
||||
{ .div = 26, .val = 26, .flags = RATE_IN_4430 },
|
||||
{ .div = 27, .val = 27, .flags = RATE_IN_4430 },
|
||||
{ .div = 28, .val = 28, .flags = RATE_IN_4430 },
|
||||
{ .div = 29, .val = 29, .flags = RATE_IN_4430 },
|
||||
{ .div = 30, .val = 30, .flags = RATE_IN_4430 },
|
||||
{ .div = 31, .val = 31, .flags = RATE_IN_4430 },
|
||||
{ .div = 0 },
|
||||
};
|
||||
|
||||
|
|
|
@ -559,7 +559,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
|
|||
* downstream clocks for debugging purposes?
|
||||
*/
|
||||
|
||||
if (!clkdm || !clk)
|
||||
if (!clkdm || !clk || !clkdm->clktrctrl_mask)
|
||||
return -EINVAL;
|
||||
|
||||
if (atomic_inc_return(&clkdm->usecount) > 1)
|
||||
|
@ -610,7 +610,7 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
|
|||
* downstream clocks for debugging purposes?
|
||||
*/
|
||||
|
||||
if (!clkdm || !clk)
|
||||
if (!clkdm || !clk || !clkdm->clktrctrl_mask)
|
||||
return -EINVAL;
|
||||
|
||||
#ifdef DEBUG
|
||||
|
|
|
@ -137,7 +137,7 @@ return_sleep_time:
|
|||
local_irq_enable();
|
||||
local_fiq_enable();
|
||||
|
||||
return (u32)timespec_to_ns(&ts_idle)/1000;
|
||||
return ts_idle.tv_nsec / NSEC_PER_USEC + ts_idle.tv_sec * USEC_PER_SEC;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -505,7 +505,7 @@ static void __init gpmc_mem_init(void)
|
|||
void __init gpmc_init(void)
|
||||
{
|
||||
u32 l;
|
||||
char *ck;
|
||||
char *ck = NULL;
|
||||
|
||||
if (cpu_is_omap24xx()) {
|
||||
ck = "core_l3_ck";
|
||||
|
@ -521,6 +521,9 @@ void __init gpmc_init(void)
|
|||
l = OMAP44XX_GPMC_BASE;
|
||||
}
|
||||
|
||||
if (WARN_ON(!ck))
|
||||
return;
|
||||
|
||||
gpmc_l3_clk = clk_get(NULL, ck);
|
||||
if (IS_ERR(gpmc_l3_clk)) {
|
||||
printk(KERN_ERR "Could not get GPMC clock %s\n", ck);
|
||||
|
@ -534,6 +537,8 @@ void __init gpmc_init(void)
|
|||
BUG();
|
||||
}
|
||||
|
||||
clk_enable(gpmc_l3_clk);
|
||||
|
||||
l = gpmc_read_reg(GPMC_REVISION);
|
||||
printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
|
||||
/* Set smart idle mode and automatic L3 clock gating */
|
||||
|
|
|
@ -188,6 +188,8 @@ void __init omap3_check_revision(void)
|
|||
u16 hawkeye;
|
||||
u8 rev;
|
||||
|
||||
omap_chip.oc = CHIP_IS_OMAP3430;
|
||||
|
||||
/*
|
||||
* We cannot access revision registers on ES1.0.
|
||||
* If the processor type is Cortex-A8 and the revision is 0x0
|
||||
|
@ -196,6 +198,7 @@ void __init omap3_check_revision(void)
|
|||
cpuid = read_cpuid(CPUID_ID);
|
||||
if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
|
||||
omap_revision = OMAP3430_REV_ES1_0;
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES1;
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -216,18 +219,28 @@ void __init omap3_check_revision(void)
|
|||
case 0: /* Take care of early samples */
|
||||
case 1:
|
||||
omap_revision = OMAP3430_REV_ES2_0;
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES2;
|
||||
break;
|
||||
case 2:
|
||||
omap_revision = OMAP3430_REV_ES2_1;
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES2;
|
||||
break;
|
||||
case 3:
|
||||
omap_revision = OMAP3430_REV_ES3_0;
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
|
||||
break;
|
||||
case 4:
|
||||
omap_revision = OMAP3430_REV_ES3_1;
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
|
||||
break;
|
||||
case 7:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
/* Use the latest known revision as default */
|
||||
omap_revision = OMAP3430_REV_ES3_1;
|
||||
omap_revision = OMAP3430_REV_ES3_1_2;
|
||||
|
||||
/* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
|
||||
}
|
||||
break;
|
||||
case 0xb868:
|
||||
|
@ -235,14 +248,18 @@ void __init omap3_check_revision(void)
|
|||
*
|
||||
* Set the device to be OMAP3505 here. Actual device
|
||||
* is identified later based on the features.
|
||||
*
|
||||
* REVISIT: AM3505/AM3517 should have their own CHIP_IS
|
||||
*/
|
||||
omap_revision = OMAP3505_REV(rev);
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
|
||||
break;
|
||||
case 0xb891:
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
/* Unknown default to latest silicon rev as default*/
|
||||
omap_revision = OMAP3630_REV_ES1_0;
|
||||
omap_chip.oc |= CHIP_IS_OMAP3630ES1;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -360,6 +377,7 @@ void __init omap2_check_revision(void)
|
|||
omap3_check_revision();
|
||||
omap3_check_features();
|
||||
omap3_cpuinfo();
|
||||
return;
|
||||
} else if (cpu_is_omap44xx()) {
|
||||
omap4_check_revision();
|
||||
return;
|
||||
|
@ -374,27 +392,14 @@ void __init omap2_check_revision(void)
|
|||
if (cpu_is_omap243x()) {
|
||||
/* Currently only supports 2430ES2.1 and 2430-all */
|
||||
omap_chip.oc |= CHIP_IS_OMAP2430;
|
||||
return;
|
||||
} else if (cpu_is_omap242x()) {
|
||||
/* Currently only supports 2420ES2.1.1 and 2420-all */
|
||||
omap_chip.oc |= CHIP_IS_OMAP2420;
|
||||
} else if (cpu_is_omap3505() || cpu_is_omap3517()) {
|
||||
omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1;
|
||||
} else if (cpu_is_omap343x()) {
|
||||
omap_chip.oc = CHIP_IS_OMAP3430;
|
||||
if (omap_rev() == OMAP3430_REV_ES1_0)
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES1;
|
||||
else if (omap_rev() >= OMAP3430_REV_ES2_0 &&
|
||||
omap_rev() <= OMAP3430_REV_ES2_1)
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES2;
|
||||
else if (omap_rev() == OMAP3430_REV_ES3_0)
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
|
||||
else if (omap_rev() == OMAP3430_REV_ES3_1)
|
||||
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
|
||||
else if (omap_rev() == OMAP3630_REV_ES1_0)
|
||||
omap_chip.oc |= CHIP_IS_OMAP3630ES1;
|
||||
} else {
|
||||
pr_err("Uninitialized omap_chip, please fix!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
pr_err("Uninitialized omap_chip, please fix!\n");
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -33,7 +33,6 @@
|
|||
#include <plat/sdrc.h>
|
||||
#include <plat/gpmc.h>
|
||||
#include <plat/serial.h>
|
||||
#include <plat/mux.h>
|
||||
#include <plat/vram.h>
|
||||
|
||||
#include "clock.h"
|
||||
|
@ -73,21 +72,21 @@ static struct map_desc omap24xx_io_desc[] __initdata = {
|
|||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
static struct map_desc omap242x_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = DSP_MEM_24XX_VIRT,
|
||||
.pfn = __phys_to_pfn(DSP_MEM_24XX_PHYS),
|
||||
.length = DSP_MEM_24XX_SIZE,
|
||||
.virtual = DSP_MEM_2420_VIRT,
|
||||
.pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
|
||||
.length = DSP_MEM_2420_SIZE,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
{
|
||||
.virtual = DSP_IPI_24XX_VIRT,
|
||||
.pfn = __phys_to_pfn(DSP_IPI_24XX_PHYS),
|
||||
.length = DSP_IPI_24XX_SIZE,
|
||||
.virtual = DSP_IPI_2420_VIRT,
|
||||
.pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
|
||||
.length = DSP_IPI_2420_SIZE,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
{
|
||||
.virtual = DSP_MMU_24XX_VIRT,
|
||||
.pfn = __phys_to_pfn(DSP_MMU_24XX_PHYS),
|
||||
.length = DSP_MMU_24XX_SIZE,
|
||||
.virtual = DSP_MMU_2420_VIRT,
|
||||
.pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
|
||||
.length = DSP_MMU_2420_SIZE,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
};
|
||||
|
|
|
@ -194,7 +194,7 @@ void __init omap_init_irq(void)
|
|||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
|
||||
unsigned long base;
|
||||
unsigned long base = 0;
|
||||
struct omap_irq_bank *bank = irq_banks + i;
|
||||
|
||||
if (cpu_is_omap24xx())
|
||||
|
@ -202,6 +202,8 @@ void __init omap_init_irq(void)
|
|||
else if (cpu_is_omap34xx())
|
||||
base = OMAP34XX_IC_BASE;
|
||||
|
||||
BUG_ON(!base);
|
||||
|
||||
/* Static mapping, never released */
|
||||
bank->base_reg = ioremap(base, SZ_4K);
|
||||
if (!bank->base_reg) {
|
||||
|
@ -274,4 +276,22 @@ void omap_intc_restore_context(void)
|
|||
}
|
||||
/* MIRs are saved and restore with other PRCM registers */
|
||||
}
|
||||
|
||||
void omap3_intc_suspend(void)
|
||||
{
|
||||
/* A pending interrupt would prevent OMAP from entering suspend */
|
||||
omap_ack_irq(0);
|
||||
}
|
||||
|
||||
void omap3_intc_prepare_idle(void)
|
||||
{
|
||||
/* Disable autoidle as it can stall interrupt controller */
|
||||
intc_bank_write_reg(0, &irq_banks[0], INTC_SYSCONFIG);
|
||||
}
|
||||
|
||||
void omap3_intc_resume_idle(void)
|
||||
{
|
||||
/* Re-enable autoidle */
|
||||
intc_bank_write_reg(1, &irq_banks[0], INTC_SYSCONFIG);
|
||||
}
|
||||
#endif /* CONFIG_ARCH_OMAP3 */
|
||||
|
|
|
@ -408,6 +408,7 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
|
|||
{
|
||||
struct twl4030_hsmmc_info *c;
|
||||
int nr_hsmmc = ARRAY_SIZE(hsmmc_data);
|
||||
int i;
|
||||
|
||||
if (cpu_is_omap2430()) {
|
||||
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
|
||||
|
@ -434,7 +435,7 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
|
|||
mmc = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL);
|
||||
if (!mmc) {
|
||||
pr_err("Cannot allocate memory for mmc device!\n");
|
||||
return;
|
||||
goto done;
|
||||
}
|
||||
|
||||
if (c->name)
|
||||
|
@ -532,6 +533,10 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
|
|||
continue;
|
||||
c->dev = mmc->dev;
|
||||
}
|
||||
|
||||
done:
|
||||
for (i = 0; i < nr_hsmmc; i++)
|
||||
kfree(hsmmc_data[i]);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
@ -51,7 +51,7 @@ struct omap_mux_entry {
|
|||
static unsigned long mux_phys;
|
||||
static void __iomem *mux_base;
|
||||
|
||||
static inline u16 omap_mux_read(u16 reg)
|
||||
u16 omap_mux_read(u16 reg)
|
||||
{
|
||||
if (cpu_is_omap24xx())
|
||||
return __raw_readb(mux_base + reg);
|
||||
|
@ -59,7 +59,7 @@ static inline u16 omap_mux_read(u16 reg)
|
|||
return __raw_readw(mux_base + reg);
|
||||
}
|
||||
|
||||
static inline void omap_mux_write(u16 val, u16 reg)
|
||||
void omap_mux_write(u16 val, u16 reg)
|
||||
{
|
||||
if (cpu_is_omap24xx())
|
||||
__raw_writeb(val, mux_base + reg);
|
||||
|
@ -67,6 +67,14 @@ static inline void omap_mux_write(u16 val, u16 reg)
|
|||
__raw_writew(val, mux_base + reg);
|
||||
}
|
||||
|
||||
void omap_mux_write_array(struct omap_board_mux *board_mux)
|
||||
{
|
||||
while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) {
|
||||
omap_mux_write(board_mux->value, board_mux->reg_offset);
|
||||
board_mux++;
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_OMAP_MUX)
|
||||
|
||||
static struct omap_mux_cfg arch_mux_cfg;
|
||||
|
@ -478,7 +486,7 @@ int __init omap_mux_init_signal(char *muxname, int val)
|
|||
static inline void omap_mux_decode(struct seq_file *s, u16 val)
|
||||
{
|
||||
char *flags[OMAP_MUX_MAX_NR_FLAGS];
|
||||
char mode[14];
|
||||
char mode[sizeof("OMAP_MUX_MODE") + 1];
|
||||
int i = -1;
|
||||
|
||||
sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7);
|
||||
|
@ -545,6 +553,7 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused)
|
|||
if (!m0_name)
|
||||
continue;
|
||||
|
||||
/* REVISIT: Needs to be updated if mode0 names get longer */
|
||||
for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) {
|
||||
if (m0_name[i] == '\0') {
|
||||
m0_def[i] = m0_name[i];
|
||||
|
@ -833,14 +842,6 @@ static void __init omap_mux_set_cmdline_signals(void)
|
|||
kfree(options);
|
||||
}
|
||||
|
||||
static void __init omap_mux_set_board_signals(struct omap_board_mux *board_mux)
|
||||
{
|
||||
while (board_mux->reg_offset != OMAP_MUX_TERMINATOR) {
|
||||
omap_mux_write(board_mux->value, board_mux->reg_offset);
|
||||
board_mux++;
|
||||
}
|
||||
}
|
||||
|
||||
static int __init omap_mux_copy_names(struct omap_mux *src,
|
||||
struct omap_mux *dst)
|
||||
{
|
||||
|
@ -960,7 +961,12 @@ static void __init omap_mux_init_list(struct omap_mux *superset)
|
|||
while (superset->reg_offset != OMAP_MUX_TERMINATOR) {
|
||||
struct omap_mux *entry;
|
||||
|
||||
#ifndef CONFIG_OMAP_MUX
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
if (!superset->muxnames || !superset->muxnames[0]) {
|
||||
superset++;
|
||||
continue;
|
||||
}
|
||||
#else
|
||||
/* Skip pins that are not muxed as GPIO by bootloader */
|
||||
if (!OMAP_MODE_GPIO(omap_mux_read(superset->reg_offset))) {
|
||||
superset++;
|
||||
|
@ -994,14 +1000,19 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
|
|||
}
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
omap_mux_package_fixup(package_subset, superset);
|
||||
omap_mux_package_init_balls(package_balls, superset);
|
||||
omap_mux_set_cmdline_signals();
|
||||
omap_mux_set_board_signals(board_mux);
|
||||
if (package_subset)
|
||||
omap_mux_package_fixup(package_subset, superset);
|
||||
if (package_balls)
|
||||
omap_mux_package_init_balls(package_balls, superset);
|
||||
#endif
|
||||
|
||||
omap_mux_init_list(superset);
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
omap_mux_set_cmdline_signals();
|
||||
omap_mux_write_array(board_mux);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -146,6 +146,30 @@ u16 omap_mux_get_gpio(int gpio);
|
|||
*/
|
||||
void omap_mux_set_gpio(u16 val, int gpio);
|
||||
|
||||
/**
|
||||
* omap_mux_read() - read mux register
|
||||
* @mux_offset: Offset of the mux register
|
||||
*
|
||||
*/
|
||||
u16 omap_mux_read(u16 mux_offset);
|
||||
|
||||
/**
|
||||
* omap_mux_write() - write mux register
|
||||
* @val: New mux register value
|
||||
* @mux_offset: Offset of the mux register
|
||||
*
|
||||
* This should be only needed for dynamic remuxing of non-gpio signals.
|
||||
*/
|
||||
void omap_mux_write(u16 val, u16 mux_offset);
|
||||
|
||||
/**
|
||||
* omap_mux_write_array() - write an array of mux registers
|
||||
* @board_mux: Array of mux registers terminated by MAP_MUX_TERMINATOR
|
||||
*
|
||||
* This should be only needed for dynamic remuxing of non-gpio signals.
|
||||
*/
|
||||
void omap_mux_write_array(struct omap_board_mux *board_mux);
|
||||
|
||||
/**
|
||||
* omap3_mux_init() - initialize mux system with board specific set
|
||||
* @board_mux: Board specific mux table
|
||||
|
|
|
@ -649,6 +649,53 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
|
|||
_OMAP3_MUXENTRY(UART3_TX_IRTX, 166,
|
||||
"uart3_tx_irtx", NULL, NULL, NULL,
|
||||
"gpio_166", NULL, NULL, "safe_mode"),
|
||||
|
||||
/* Only on 3630, see omap36xx_cbp_subset for the signals */
|
||||
_OMAP3_MUXENTRY(GPMC_A11, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MBUSFLAG, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MREAD, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MWRITE, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_SBUSFLAG, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_SREAD, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_SWRITE, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(GPMC_A11, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD28, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD29, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD32, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD33, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD34, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD35, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
_OMAP3_MUXENTRY(SAD2D_MCAD36, 0,
|
||||
NULL, NULL, NULL, NULL,
|
||||
NULL, NULL, NULL, NULL),
|
||||
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
||||
};
|
||||
|
||||
|
|
|
@ -94,7 +94,8 @@ static int _update_sysc_cache(struct omap_hwmod *oh)
|
|||
|
||||
oh->_sysc_cache = omap_hwmod_readl(oh, oh->sysconfig->sysc_offs);
|
||||
|
||||
oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
|
||||
if (!(oh->sysconfig->sysc_flags & SYSC_NO_CACHE))
|
||||
oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -9,45 +9,47 @@
|
|||
* The OMAP2 processor can be run at several discrete 'PRCM configurations'.
|
||||
* These configurations are characterized by voltage and speed for clocks.
|
||||
* The device is only validated for certain combinations. One way to express
|
||||
* these combinations is via the 'ratio's' which the clocks operate with
|
||||
* these combinations is via the 'ratios' which the clocks operate with
|
||||
* respect to each other. These ratio sets are for a given voltage/DPLL
|
||||
* setting. All configurations can be described by a DPLL setting and a ratio
|
||||
* There are 3 ratio sets for the 2430 and X ratio sets for 2420.
|
||||
*
|
||||
* 2430 differs from 2420 in that there are no more phase synchronizers used.
|
||||
* They both have a slightly different clock domain setup. 2420(iva1,dsp) vs
|
||||
* 2430 (iva2.1, NOdsp, mdm)
|
||||
* setting. All configurations can be described by a DPLL setting and a ratio.
|
||||
*
|
||||
* XXX Missing voltage data.
|
||||
* XXX Missing 19.2MHz sys_clk rate sets (needed for N800/N810)
|
||||
*
|
||||
* THe format described in this file is deprecated. Once a reasonable
|
||||
* OPP API exists, the data in this file should be converted to use it.
|
||||
*
|
||||
* This is technically part of the OMAP2xxx clock code.
|
||||
*
|
||||
* Considerable work is still needed to fully support dynamic frequency
|
||||
* changes on OMAP2xxx-series chips. Readers interested in such a
|
||||
* project are encouraged to review the Maemo Diablo RX-34 and RX-44
|
||||
* kernel source at:
|
||||
* http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/
|
||||
*/
|
||||
|
||||
#include "opp2xxx.h"
|
||||
#include "sdrc.h"
|
||||
#include "clock.h"
|
||||
|
||||
/*-------------------------------------------------------------------------
|
||||
* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
|
||||
/*
|
||||
* Key dividers which make up a PRCM set. Ratios for a PRCM are mandated.
|
||||
* xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,
|
||||
* CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL,
|
||||
* CM_CLKSEL2_PLL, CM_CLKSEL_MDM
|
||||
*
|
||||
* Filling in table based on H4 boards and 2430-SDPs variants available.
|
||||
* There are quite a few more rates combinations which could be defined.
|
||||
* Filling in table based on H4 boards available. There are quite a
|
||||
* few more rate combinations which could be defined.
|
||||
*
|
||||
* When multiple values are defined the start up will try and choose the
|
||||
* fastest one. If a 'fast' value is defined, then automatically, the /2
|
||||
* one should be included as it can be used. Generally having more that
|
||||
* one fast set does not make sense, as static timings need to be changed
|
||||
* to change the set. The exception is the bypass setting which is
|
||||
* availble for low power bypass.
|
||||
* When multiple values are defined the start up will try and choose
|
||||
* the fastest one. If a 'fast' value is defined, then automatically,
|
||||
* the /2 one should be included as it can be used. Generally having
|
||||
* more than one fast set does not make sense, as static timings need
|
||||
* to be changed to change the set. The exception is the bypass
|
||||
* setting which is available for low power bypass.
|
||||
*
|
||||
* Note: This table needs to be sorted, fastest to slowest.
|
||||
*-------------------------------------------------------------------------*/
|
||||
**/
|
||||
const struct prcm_config omap2420_rate_table[] = {
|
||||
/* PRCM I - FAST */
|
||||
{S12M, S660M, S330M, RI_CM_CLKSEL_MPU_VAL, /* 330MHz ARM */
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* opp2420_data.c - old-style "OPP" table for OMAP2420
|
||||
* opp2430_data.c - old-style "OPP" table for OMAP2430
|
||||
*
|
||||
* Copyright (C) 2005-2009 Texas Instruments, Inc.
|
||||
* Copyright (C) 2004-2009 Nokia Corporation
|
||||
|
@ -9,16 +9,16 @@
|
|||
* The OMAP2 processor can be run at several discrete 'PRCM configurations'.
|
||||
* These configurations are characterized by voltage and speed for clocks.
|
||||
* The device is only validated for certain combinations. One way to express
|
||||
* these combinations is via the 'ratio's' which the clocks operate with
|
||||
* these combinations is via the 'ratios' which the clocks operate with
|
||||
* respect to each other. These ratio sets are for a given voltage/DPLL
|
||||
* setting. All configurations can be described by a DPLL setting and a ratio
|
||||
* There are 3 ratio sets for the 2430 and X ratio sets for 2420.
|
||||
* setting. All configurations can be described by a DPLL setting and a ratio.
|
||||
*
|
||||
* 2430 differs from 2420 in that there are no more phase synchronizers used.
|
||||
* They both have a slightly different clock domain setup. 2420(iva1,dsp) vs
|
||||
* 2430 (iva2.1, NOdsp, mdm)
|
||||
*
|
||||
* XXX Missing voltage data.
|
||||
* XXX Missing 19.2MHz sys_clk rate sets.
|
||||
*
|
||||
* THe format described in this file is deprecated. Once a reasonable
|
||||
* OPP API exists, the data in this file should be converted to use it.
|
||||
|
@ -30,24 +30,24 @@
|
|||
#include "sdrc.h"
|
||||
#include "clock.h"
|
||||
|
||||
/*-------------------------------------------------------------------------
|
||||
* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
|
||||
/*
|
||||
* Key dividers which make up a PRCM set. Ratios for a PRCM are mandated.
|
||||
* xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,
|
||||
* CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL,
|
||||
* CM_CLKSEL2_PLL, CM_CLKSEL_MDM
|
||||
*
|
||||
* Filling in table based on H4 boards and 2430-SDPs variants available.
|
||||
* There are quite a few more rates combinations which could be defined.
|
||||
* Filling in table based on 2430-SDPs variants available. There are
|
||||
* quite a few more rate combinations which could be defined.
|
||||
*
|
||||
* When multiple values are defined the start up will try and choose the
|
||||
* fastest one. If a 'fast' value is defined, then automatically, the /2
|
||||
* one should be included as it can be used. Generally having more that
|
||||
* one fast set does not make sense, as static timings need to be changed
|
||||
* to change the set. The exception is the bypass setting which is
|
||||
* availble for low power bypass.
|
||||
* When multiple values are defined the start up will try and choose
|
||||
* the fastest one. If a 'fast' value is defined, then automatically,
|
||||
* the /2 one should be included as it can be used. Generally having
|
||||
* more than one fast set does not make sense, as static timings need
|
||||
* to be changed to change the set. The exception is the bypass
|
||||
* setting which is available for low power bypass.
|
||||
*
|
||||
* Note: This table needs to be sorted, fastest to slowest.
|
||||
*-------------------------------------------------------------------------*/
|
||||
*/
|
||||
const struct prcm_config omap2430_rate_table[] = {
|
||||
/* PRCM #4 - ratio2 (ES2.1) - FAST */
|
||||
{S13M, S798M, S399M, R2_CM_CLKSEL_MPU_VAL, /* 399MHz ARM */
|
||||
|
|
|
@ -54,8 +54,6 @@ int omap2_pm_debug;
|
|||
regs[reg_count++].val = \
|
||||
__raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off)))
|
||||
|
||||
static int __init pm_dbg_init(void);
|
||||
|
||||
void omap2_pm_dump(int mode, int resume, unsigned int us)
|
||||
{
|
||||
struct reg {
|
||||
|
@ -167,6 +165,8 @@ struct dentry *pm_dbg_dir;
|
|||
|
||||
static int pm_dbg_init_done;
|
||||
|
||||
static int __init pm_dbg_init(void);
|
||||
|
||||
enum {
|
||||
DEBUG_FILE_COUNTERS = 0,
|
||||
DEBUG_FILE_TIMERS,
|
||||
|
@ -488,9 +488,11 @@ int pm_dbg_regset_init(int reg_set)
|
|||
|
||||
static int pwrdm_suspend_get(void *data, u64 *val)
|
||||
{
|
||||
*val = omap3_pm_get_suspend_state((struct powerdomain *)data);
|
||||
int ret;
|
||||
ret = omap3_pm_get_suspend_state((struct powerdomain *)data);
|
||||
*val = ret;
|
||||
|
||||
if (*val >= 0)
|
||||
if (ret >= 0)
|
||||
return 0;
|
||||
return *val;
|
||||
}
|
||||
|
@ -604,6 +606,4 @@ static int __init pm_dbg_init(void)
|
|||
}
|
||||
arch_initcall(pm_dbg_init);
|
||||
|
||||
#else
|
||||
void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {}
|
||||
#endif
|
||||
|
|
|
@ -32,12 +32,16 @@ extern struct omap_dm_timer *gptimer_wakeup;
|
|||
#ifdef CONFIG_PM_DEBUG
|
||||
extern void omap2_pm_dump(int mode, int resume, unsigned int us);
|
||||
extern int omap2_pm_debug;
|
||||
#else
|
||||
#define omap2_pm_dump(mode, resume, us) do {} while (0);
|
||||
#define omap2_pm_debug 0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
|
||||
extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
|
||||
extern int pm_dbg_regset_save(int reg_set);
|
||||
extern int pm_dbg_regset_init(int reg_set);
|
||||
#else
|
||||
#define omap2_pm_dump(mode, resume, us) do {} while (0);
|
||||
#define omap2_pm_debug 0
|
||||
#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
|
||||
#define pm_dbg_regset_save(reg_set) do {} while (0);
|
||||
#define pm_dbg_regset_init(reg_set) do {} while (0);
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <plat/sram.h>
|
||||
#include <plat/clockdomain.h>
|
||||
|
@ -124,9 +125,17 @@ static void omap3_core_save_context(void)
|
|||
control_padconf_off |= START_PADCONF_SAVE;
|
||||
omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF);
|
||||
/* wait for the save to complete */
|
||||
while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
|
||||
& PADCONF_SAVE_DONE)
|
||||
;
|
||||
while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
|
||||
& PADCONF_SAVE_DONE))
|
||||
udelay(1);
|
||||
|
||||
/*
|
||||
* Force write last pad into memory, as this can fail in some
|
||||
* cases according to erratas 1.157, 1.185
|
||||
*/
|
||||
omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14),
|
||||
OMAP343X_CONTROL_MEM_WKUP + 0x2a0);
|
||||
|
||||
/* Save the Interrupt controller context */
|
||||
omap_intc_save_context();
|
||||
/* Save the GPMC context */
|
||||
|
@ -392,6 +401,7 @@ void omap_sram_idle(void)
|
|||
prm_set_mod_reg_bits(OMAP3430_EN_IO, WKUP_MOD, PM_WKEN);
|
||||
omap3_enable_io_chain();
|
||||
}
|
||||
omap3_intc_prepare_idle();
|
||||
|
||||
/*
|
||||
* On EMU/HS devices ROM code restores a SRDC value
|
||||
|
@ -438,6 +448,7 @@ void omap_sram_idle(void)
|
|||
OMAP3430_GR_MOD,
|
||||
OMAP3_PRM_VOLTCTRL_OFFSET);
|
||||
}
|
||||
omap3_intc_resume_idle();
|
||||
|
||||
/* PER */
|
||||
if (per_next_state < PWRDM_POWER_ON) {
|
||||
|
@ -578,6 +589,8 @@ static int omap3_pm_suspend(void)
|
|||
}
|
||||
|
||||
omap_uart_prepare_suspend();
|
||||
omap3_intc_suspend();
|
||||
|
||||
omap_sram_idle();
|
||||
|
||||
restore:
|
||||
|
@ -835,6 +848,8 @@ static void __init prcm_setup_regs(void)
|
|||
CM_AUTOIDLE);
|
||||
}
|
||||
|
||||
omap_ctrl_writel(OMAP3430_AUTOIDLE, OMAP2_CONTROL_SYSCONFIG);
|
||||
|
||||
/*
|
||||
* Set all plls to autoidle. This is needed until autoidle is
|
||||
* enabled by clockfw
|
||||
|
@ -875,15 +890,23 @@ static void __init prcm_setup_regs(void)
|
|||
prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN,
|
||||
OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
|
||||
|
||||
/* Enable PM_WKEN to support DSS LPR */
|
||||
prm_write_mod_reg(OMAP3430_PM_WKEN_DSS_EN_DSS,
|
||||
OMAP3430_DSS_MOD, PM_WKEN);
|
||||
|
||||
/* Enable wakeups in PER */
|
||||
prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 |
|
||||
OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 |
|
||||
OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3,
|
||||
OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3 |
|
||||
OMAP3430_EN_MCBSP2 | OMAP3430_EN_MCBSP3 |
|
||||
OMAP3430_EN_MCBSP4,
|
||||
OMAP3430_PER_MOD, PM_WKEN);
|
||||
/* and allow them to wake up MPU */
|
||||
prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 |
|
||||
OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 |
|
||||
OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3,
|
||||
OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3 |
|
||||
OMAP3430_EN_MCBSP2 | OMAP3430_EN_MCBSP3 |
|
||||
OMAP3430_EN_MCBSP4,
|
||||
OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL);
|
||||
|
||||
/* Don't attach IVA interrupts */
|
||||
|
@ -904,24 +927,6 @@ static void __init prcm_setup_regs(void)
|
|||
/* Clear any pending PRCM interrupts */
|
||||
prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
|
||||
|
||||
/* Don't attach IVA interrupts */
|
||||
prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL);
|
||||
prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1);
|
||||
prm_write_mod_reg(0, CORE_MOD, OMAP3430ES2_PM_IVAGRPSEL3);
|
||||
prm_write_mod_reg(0, OMAP3430_PER_MOD, OMAP3430_PM_IVAGRPSEL);
|
||||
|
||||
/* Clear any pending 'reset' flags */
|
||||
prm_write_mod_reg(0xffffffff, MPU_MOD, RM_RSTST);
|
||||
prm_write_mod_reg(0xffffffff, CORE_MOD, RM_RSTST);
|
||||
prm_write_mod_reg(0xffffffff, OMAP3430_PER_MOD, RM_RSTST);
|
||||
prm_write_mod_reg(0xffffffff, OMAP3430_EMU_MOD, RM_RSTST);
|
||||
prm_write_mod_reg(0xffffffff, OMAP3430_NEON_MOD, RM_RSTST);
|
||||
prm_write_mod_reg(0xffffffff, OMAP3430_DSS_MOD, RM_RSTST);
|
||||
prm_write_mod_reg(0xffffffff, OMAP3430ES2_USBHOST_MOD, RM_RSTST);
|
||||
|
||||
/* Clear any pending PRCM interrupts */
|
||||
prm_write_mod_reg(0, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
|
||||
|
||||
omap3_iva_idle();
|
||||
omap3_d2d_idle();
|
||||
}
|
||||
|
|
|
@ -44,7 +44,6 @@ struct omap3_prcm_regs {
|
|||
u32 iva2_cm_clksel2;
|
||||
u32 cm_sysconfig;
|
||||
u32 sgx_cm_clksel;
|
||||
u32 wkup_cm_clksel;
|
||||
u32 dss_cm_clksel;
|
||||
u32 cam_cm_clksel;
|
||||
u32 per_cm_clksel;
|
||||
|
@ -53,7 +52,6 @@ struct omap3_prcm_regs {
|
|||
u32 pll_cm_autoidle2;
|
||||
u32 pll_cm_clksel4;
|
||||
u32 pll_cm_clksel5;
|
||||
u32 pll_cm_clken;
|
||||
u32 pll_cm_clken2;
|
||||
u32 cm_polctrl;
|
||||
u32 iva2_cm_fclken;
|
||||
|
@ -77,7 +75,6 @@ struct omap3_prcm_regs {
|
|||
u32 usbhost_cm_iclken;
|
||||
u32 iva2_cm_autiidle2;
|
||||
u32 mpu_cm_autoidle2;
|
||||
u32 pll_cm_autoidle;
|
||||
u32 iva2_cm_clkstctrl;
|
||||
u32 mpu_cm_clkstctrl;
|
||||
u32 core_cm_clkstctrl;
|
||||
|
@ -274,7 +271,6 @@ void omap3_prcm_save_context(void)
|
|||
prcm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG);
|
||||
prcm_context.sgx_cm_clksel =
|
||||
cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL);
|
||||
prcm_context.wkup_cm_clksel = cm_read_mod_reg(WKUP_MOD, CM_CLKSEL);
|
||||
prcm_context.dss_cm_clksel =
|
||||
cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL);
|
||||
prcm_context.cam_cm_clksel =
|
||||
|
@ -291,8 +287,6 @@ void omap3_prcm_save_context(void)
|
|||
cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4);
|
||||
prcm_context.pll_cm_clksel5 =
|
||||
cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
|
||||
prcm_context.pll_cm_clken =
|
||||
cm_read_mod_reg(PLL_MOD, CM_CLKEN);
|
||||
prcm_context.pll_cm_clken2 =
|
||||
cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2);
|
||||
prcm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL);
|
||||
|
@ -338,8 +332,6 @@ void omap3_prcm_save_context(void)
|
|||
cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2);
|
||||
prcm_context.mpu_cm_autoidle2 =
|
||||
cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2);
|
||||
prcm_context.pll_cm_autoidle =
|
||||
cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
|
||||
prcm_context.iva2_cm_clkstctrl =
|
||||
cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSTCTRL);
|
||||
prcm_context.mpu_cm_clkstctrl =
|
||||
|
@ -431,7 +423,6 @@ void omap3_prcm_restore_context(void)
|
|||
__raw_writel(prcm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG);
|
||||
cm_write_mod_reg(prcm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD,
|
||||
CM_CLKSEL);
|
||||
cm_write_mod_reg(prcm_context.wkup_cm_clksel, WKUP_MOD, CM_CLKSEL);
|
||||
cm_write_mod_reg(prcm_context.dss_cm_clksel, OMAP3430_DSS_MOD,
|
||||
CM_CLKSEL);
|
||||
cm_write_mod_reg(prcm_context.cam_cm_clksel, OMAP3430_CAM_MOD,
|
||||
|
@ -448,7 +439,6 @@ void omap3_prcm_restore_context(void)
|
|||
OMAP3430ES2_CM_CLKSEL4);
|
||||
cm_write_mod_reg(prcm_context.pll_cm_clksel5, PLL_MOD,
|
||||
OMAP3430ES2_CM_CLKSEL5);
|
||||
cm_write_mod_reg(prcm_context.pll_cm_clken, PLL_MOD, CM_CLKEN);
|
||||
cm_write_mod_reg(prcm_context.pll_cm_clken2, PLL_MOD,
|
||||
OMAP3430ES2_CM_CLKEN2);
|
||||
__raw_writel(prcm_context.cm_polctrl, OMAP3430_CM_POLCTRL);
|
||||
|
@ -487,7 +477,6 @@ void omap3_prcm_restore_context(void)
|
|||
cm_write_mod_reg(prcm_context.iva2_cm_autiidle2, OMAP3430_IVA2_MOD,
|
||||
CM_AUTOIDLE2);
|
||||
cm_write_mod_reg(prcm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2);
|
||||
cm_write_mod_reg(prcm_context.pll_cm_autoidle, PLL_MOD, CM_AUTOIDLE);
|
||||
cm_write_mod_reg(prcm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD,
|
||||
CM_CLKSTCTRL);
|
||||
cm_write_mod_reg(prcm_context.mpu_cm_clkstctrl, MPU_MOD, CM_CLKSTCTRL);
|
||||
|
|
|
@ -24,6 +24,8 @@
|
|||
OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
|
||||
#define OMAP44XX_PRM_REGADDR(module, reg) \
|
||||
OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (module) + (reg))
|
||||
#define OMAP44XX_CHIRONSS_REGADDR(module, reg) \
|
||||
OMAP2_L4_IO_ADDRESS(OMAP4430_CHIRONSS_BASE + (module) + (reg))
|
||||
|
||||
#include "prm44xx.h"
|
||||
|
||||
|
|
|
@ -386,26 +386,26 @@
|
|||
|
||||
|
||||
/* CHIRON_PRCM.CHIRONSS_OCP_SOCKET_PRCM register offsets */
|
||||
#define OMAP4430_REVISION_PRCM OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_OCP_SOCKET_PRCM_MOD, 0x0000)
|
||||
#define OMAP4430_REVISION_PRCM OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_OCP_SOCKET_PRCM_MOD, 0x0000)
|
||||
|
||||
/* CHIRON_PRCM.CHIRONSS_DEVICE_PRM register offsets */
|
||||
#define OMAP4430_CHIRON_PRCM_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_DEVICE_PRM_MOD, 0x0000)
|
||||
#define OMAP4430_CHIRON_PRCM_PRM_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_DEVICE_PRM_MOD, 0x0000)
|
||||
|
||||
/* CHIRON_PRCM.CHIRONSS_CPU0 register offsets */
|
||||
#define OMAP4430_PM_PDA_CPU0_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0000)
|
||||
#define OMAP4430_PM_PDA_CPU0_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0004)
|
||||
#define OMAP4430_RM_PDA_CPU0_CPU0_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0008)
|
||||
#define OMAP4430_RM_PDA_CPU0_CPU0_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x000c)
|
||||
#define OMAP4430_RM_PDA_CPU0_CPU0_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0010)
|
||||
#define OMAP4430_CM_PDA_CPU0_CPU0_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0014)
|
||||
#define OMAP4430_CM_PDA_CPU0_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0018)
|
||||
#define OMAP4430_PM_PDA_CPU0_PWRSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0000)
|
||||
#define OMAP4430_PM_PDA_CPU0_PWRSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0004)
|
||||
#define OMAP4430_RM_PDA_CPU0_CPU0_CONTEXT OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0008)
|
||||
#define OMAP4430_RM_PDA_CPU0_CPU0_RSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x000c)
|
||||
#define OMAP4430_RM_PDA_CPU0_CPU0_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0010)
|
||||
#define OMAP4430_CM_PDA_CPU0_CPU0_CLKCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0014)
|
||||
#define OMAP4430_CM_PDA_CPU0_CLKSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU0_MOD, 0x0018)
|
||||
|
||||
/* CHIRON_PRCM.CHIRONSS_CPU1 register offsets */
|
||||
#define OMAP4430_PM_PDA_CPU1_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0000)
|
||||
#define OMAP4430_PM_PDA_CPU1_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0004)
|
||||
#define OMAP4430_RM_PDA_CPU1_CPU1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0008)
|
||||
#define OMAP4430_RM_PDA_CPU1_CPU1_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x000c)
|
||||
#define OMAP4430_RM_PDA_CPU1_CPU1_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0010)
|
||||
#define OMAP4430_CM_PDA_CPU1_CPU1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0014)
|
||||
#define OMAP4430_CM_PDA_CPU1_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0018)
|
||||
#define OMAP4430_PM_PDA_CPU1_PWRSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0000)
|
||||
#define OMAP4430_PM_PDA_CPU1_PWRSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0004)
|
||||
#define OMAP4430_RM_PDA_CPU1_CPU1_CONTEXT OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0008)
|
||||
#define OMAP4430_RM_PDA_CPU1_CPU1_RSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x000c)
|
||||
#define OMAP4430_RM_PDA_CPU1_CPU1_RSTST OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0010)
|
||||
#define OMAP4430_CM_PDA_CPU1_CPU1_CLKCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0014)
|
||||
#define OMAP4430_CM_PDA_CPU1_CLKSTCTRL OMAP44XX_CHIRONSS_REGADDR(OMAP4430_CHIRONSS_CHIRONSS_CPU1_MOD, 0x0018)
|
||||
#endif
|
||||
|
|
|
@ -36,7 +36,13 @@
|
|||
#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52
|
||||
#define UART_OMAP_WER 0x17 /* Wake-up enable register */
|
||||
|
||||
#define DEFAULT_TIMEOUT (5 * HZ)
|
||||
/*
|
||||
* NOTE: By default the serial timeout is disabled as it causes lost characters
|
||||
* over the serial ports. This means that the UART clocks will stay on until
|
||||
* disabled via sysfs. This also causes that any deeper omap sleep states are
|
||||
* blocked.
|
||||
*/
|
||||
#define DEFAULT_TIMEOUT 0
|
||||
|
||||
struct omap_uart_state {
|
||||
int num;
|
||||
|
@ -125,6 +131,13 @@ static struct plat_serial8250_port serial_platform_data3[] = {
|
|||
}
|
||||
};
|
||||
#endif
|
||||
static inline unsigned int __serial_read_reg(struct uart_port *up,
|
||||
int offset)
|
||||
{
|
||||
offset <<= up->regshift;
|
||||
return (unsigned int)__raw_readb(up->membase + offset);
|
||||
}
|
||||
|
||||
static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
|
||||
int offset)
|
||||
{
|
||||
|
@ -415,7 +428,8 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
|
|||
uart->timeout = DEFAULT_TIMEOUT;
|
||||
setup_timer(&uart->timer, omap_uart_idle_timer,
|
||||
(unsigned long) uart);
|
||||
mod_timer(&uart->timer, jiffies + uart->timeout);
|
||||
if (uart->timeout)
|
||||
mod_timer(&uart->timer, jiffies + uart->timeout);
|
||||
omap_uart_smart_idle_enable(uart, 0);
|
||||
|
||||
if (cpu_is_omap34xx()) {
|
||||
|
@ -583,11 +597,12 @@ static unsigned int serial_in_override(struct uart_port *up, int offset)
|
|||
{
|
||||
if (UART_RX == offset) {
|
||||
unsigned int lsr;
|
||||
lsr = serial_read_reg(omap_uart[up->line].p, UART_LSR);
|
||||
lsr = __serial_read_reg(up, UART_LSR);
|
||||
if (!(lsr & UART_LSR_DR))
|
||||
return -EPERM;
|
||||
}
|
||||
return serial_read_reg(omap_uart[up->line].p, offset);
|
||||
|
||||
return __serial_read_reg(up, offset);
|
||||
}
|
||||
|
||||
void __init omap_serial_early_init(void)
|
||||
|
|
|
@ -245,7 +245,8 @@ restore:
|
|||
mov r1, #0 @ set task id for ROM code in r1
|
||||
mov r2, #4 @ set some flags in r2, r6
|
||||
mov r6, #0xff
|
||||
adr r3, write_aux_control_params @ r3 points to parameters
|
||||
ldr r4, scratchpad_base
|
||||
ldr r3, [r4, #0xBC] @ r3 points to parameters
|
||||
mcr p15, 0, r0, c7, c10, 4 @ data write barrier
|
||||
mcr p15, 0, r0, c7, c10, 5 @ data memory barrier
|
||||
.word 0xE1600071 @ call SMI monitor (smi #1)
|
||||
|
@ -253,14 +254,14 @@ restore:
|
|||
b logic_l1_restore
|
||||
l2_inv_api_params:
|
||||
.word 0x1, 0x00
|
||||
write_aux_control_params:
|
||||
.word 0x1, 0x72
|
||||
l2_inv_gp:
|
||||
/* Execute smi to invalidate L2 cache */
|
||||
mov r12, #0x1 @ set up to invalide L2
|
||||
smi: .word 0xE1600070 @ Call SMI monitor (smieq)
|
||||
/* Write to Aux control register to set some bits */
|
||||
mov r0, #0x72
|
||||
ldr r4, scratchpad_base
|
||||
ldr r3, [r4,#0xBC]
|
||||
ldr r0, [r3,#4]
|
||||
mov r12, #0x3
|
||||
.word 0xE1600070 @ Call SMI monitor (smieq)
|
||||
logic_l1_restore:
|
||||
|
@ -271,6 +272,7 @@ logic_l1_restore:
|
|||
|
||||
ldr r4, scratchpad_base
|
||||
ldr r3, [r4,#0xBC]
|
||||
adds r3, r3, #8
|
||||
ldmia r3!, {r4-r6}
|
||||
mov sp, r4
|
||||
msr spsr_cxsf, r5
|
||||
|
@ -387,6 +389,9 @@ usettbr0:
|
|||
save_context_wfi:
|
||||
/*b save_context_wfi*/ @ enable to debug save code
|
||||
mov r8, r0 /* Store SDRAM address in r8 */
|
||||
mrc p15, 0, r5, c1, c0, 1 @ Read Auxiliary Control Register
|
||||
mov r4, #0x1 @ Number of parameters for restore call
|
||||
stmia r8!, {r4-r5}
|
||||
/* Check what that target sleep state is:stored in r1*/
|
||||
/* 1 - Only L1 and logic lost */
|
||||
/* 2 - Only L2 lost */
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/irq.h>
|
||||
|
@ -32,6 +33,7 @@
|
|||
|
||||
#define DNS323_GPIO_LED_RIGHT_AMBER 1
|
||||
#define DNS323_GPIO_LED_LEFT_AMBER 2
|
||||
#define DNS323_GPIO_SYSTEM_UP 3
|
||||
#define DNS323_GPIO_LED_POWER 5
|
||||
#define DNS323_GPIO_OVERTEMP 6
|
||||
#define DNS323_GPIO_RTC 7
|
||||
|
@ -239,7 +241,7 @@ static struct gpio_led dns323_leds[] = {
|
|||
{
|
||||
.name = "power:blue",
|
||||
.gpio = DNS323_GPIO_LED_POWER,
|
||||
.active_low = 1,
|
||||
.default_state = LEDS_GPIO_DEFSTATE_ON,
|
||||
}, {
|
||||
.name = "right:amber",
|
||||
.gpio = DNS323_GPIO_LED_RIGHT_AMBER,
|
||||
|
@ -334,7 +336,7 @@ static struct orion5x_mpp_mode dns323_mv88f5182_mpp_modes[] __initdata = {
|
|||
{ 0, MPP_UNUSED },
|
||||
{ 1, MPP_GPIO }, /* right amber LED (sata ch0) */
|
||||
{ 2, MPP_GPIO }, /* left amber LED (sata ch1) */
|
||||
{ 3, MPP_UNUSED },
|
||||
{ 3, MPP_GPIO }, /* system up flag */
|
||||
{ 4, MPP_GPIO }, /* power button LED */
|
||||
{ 5, MPP_GPIO }, /* power button LED */
|
||||
{ 6, MPP_GPIO }, /* GMT G751-2f overtemp */
|
||||
|
@ -372,13 +374,23 @@ static struct i2c_board_info __initdata dns323_i2c_devices[] = {
|
|||
},
|
||||
};
|
||||
|
||||
/* DNS-323 specific power off method */
|
||||
static void dns323_power_off(void)
|
||||
/* DNS-323 rev. A specific power off method */
|
||||
static void dns323a_power_off(void)
|
||||
{
|
||||
pr_info("%s: triggering power-off...\n", __func__);
|
||||
gpio_set_value(DNS323_GPIO_POWER_OFF, 1);
|
||||
}
|
||||
|
||||
/* DNS-323 rev B specific power off method */
|
||||
static void dns323b_power_off(void)
|
||||
{
|
||||
pr_info("%s: triggering power-off...\n", __func__);
|
||||
/* Pin has to be changed to 1 and back to 0 to do actual power off. */
|
||||
gpio_set_value(DNS323_GPIO_POWER_OFF, 1);
|
||||
mdelay(100);
|
||||
gpio_set_value(DNS323_GPIO_POWER_OFF, 0);
|
||||
}
|
||||
|
||||
static void __init dns323_init(void)
|
||||
{
|
||||
/* Setup basic Orion functions. Need to be called early. */
|
||||
|
@ -424,11 +436,20 @@ static void __init dns323_init(void)
|
|||
if (dns323_dev_id() == MV88F5182_DEV_ID)
|
||||
orion5x_sata_init(&dns323_sata_data);
|
||||
|
||||
/* register dns323 specific power-off method */
|
||||
/* The 5182 has flag to indicate the system is up. Without this flag
|
||||
* set, power LED will flash and cannot be controlled via leds-gpio.
|
||||
*/
|
||||
if (dns323_dev_id() == MV88F5182_DEV_ID)
|
||||
gpio_set_value(DNS323_GPIO_SYSTEM_UP, 1);
|
||||
|
||||
/* Register dns323 specific power-off method */
|
||||
if (gpio_request(DNS323_GPIO_POWER_OFF, "POWEROFF") != 0 ||
|
||||
gpio_direction_output(DNS323_GPIO_POWER_OFF, 0) != 0)
|
||||
pr_err("DNS323: failed to setup power-off GPIO\n");
|
||||
pm_power_off = dns323_power_off;
|
||||
if (dns323_dev_id() == MV88F5182_DEV_ID)
|
||||
pm_power_off = dns323b_power_off;
|
||||
else
|
||||
pm_power_off = dns323a_power_off;
|
||||
}
|
||||
|
||||
/* Warning: D-Link uses a wrong mach-type (=526) in their bootloader */
|
||||
|
|
|
@ -15,6 +15,9 @@
|
|||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/mv643xx_eth.h>
|
||||
#include <linux/ethtool.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/input.h>
|
||||
#include <net/dsa.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/gpio.h>
|
||||
|
@ -24,6 +27,80 @@
|
|||
#include "common.h"
|
||||
#include "mpp.h"
|
||||
|
||||
/*
|
||||
* LEDs attached to GPIO
|
||||
*/
|
||||
static struct gpio_led wrt350n_v2_led_pins[] = {
|
||||
{
|
||||
.name = "wrt350nv2:green:power",
|
||||
.gpio = 0,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "wrt350nv2:green:security",
|
||||
.gpio = 1,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "wrt350nv2:orange:power",
|
||||
.gpio = 5,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "wrt350nv2:green:usb",
|
||||
.gpio = 6,
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.name = "wrt350nv2:green:wireless",
|
||||
.gpio = 7,
|
||||
.active_low = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data wrt350n_v2_led_data = {
|
||||
.leds = wrt350n_v2_led_pins,
|
||||
.num_leds = ARRAY_SIZE(wrt350n_v2_led_pins),
|
||||
};
|
||||
|
||||
static struct platform_device wrt350n_v2_leds = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &wrt350n_v2_led_data,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Buttons attached to GPIO
|
||||
*/
|
||||
static struct gpio_keys_button wrt350n_v2_buttons[] = {
|
||||
{
|
||||
.code = KEY_RESTART,
|
||||
.gpio = 3,
|
||||
.desc = "Reset Button",
|
||||
.active_low = 1,
|
||||
}, {
|
||||
.code = KEY_WLAN,
|
||||
.gpio = 2,
|
||||
.desc = "WPS Button",
|
||||
.active_low = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_keys_platform_data wrt350n_v2_button_data = {
|
||||
.buttons = wrt350n_v2_buttons,
|
||||
.nbuttons = ARRAY_SIZE(wrt350n_v2_buttons),
|
||||
};
|
||||
|
||||
static struct platform_device wrt350n_v2_button_device = {
|
||||
.name = "gpio-keys",
|
||||
.id = -1,
|
||||
.num_resources = 0,
|
||||
.dev = {
|
||||
.platform_data = &wrt350n_v2_button_data,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* General setup
|
||||
*/
|
||||
static struct orion5x_mpp_mode wrt350n_v2_mpp_modes[] __initdata = {
|
||||
{ 0, MPP_GPIO }, /* Power LED green (0=on) */
|
||||
{ 1, MPP_GPIO }, /* Security LED (0=on) */
|
||||
|
@ -140,6 +217,8 @@ static void __init wrt350n_v2_init(void)
|
|||
orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE,
|
||||
WRT350N_V2_NOR_BOOT_SIZE);
|
||||
platform_device_register(&wrt350n_v2_nor_flash);
|
||||
platform_device_register(&wrt350n_v2_leds);
|
||||
platform_device_register(&wrt350n_v2_button_device);
|
||||
}
|
||||
|
||||
static int __init wrt350n_v2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
|
|
|
@ -457,6 +457,7 @@ static struct pxaficp_platform_data corgi_ficp_platform_data = {
|
|||
* USB Device Controller
|
||||
*/
|
||||
static struct pxa2xx_udc_mach_info udc_info __initdata = {
|
||||
.gpio_vbus = -1,
|
||||
/* no connect GPIO; corgi can't tell connection status */
|
||||
.gpio_pullup = CORGI_GPIO_USB_PULLUP,
|
||||
};
|
||||
|
|
|
@ -250,20 +250,17 @@
|
|||
|
||||
#define cpu_is_pxa930() \
|
||||
({ \
|
||||
unsigned int id = read_cpuid(CPUID_ID); \
|
||||
__cpu_is_pxa930(id); \
|
||||
__cpu_is_pxa930(read_cpuid_id()); \
|
||||
})
|
||||
|
||||
#define cpu_is_pxa935() \
|
||||
({ \
|
||||
unsigned int id = read_cpuid(CPUID_ID); \
|
||||
__cpu_is_pxa935(id); \
|
||||
__cpu_is_pxa935(read_cpuid_id()); \
|
||||
})
|
||||
|
||||
#define cpu_is_pxa950() \
|
||||
({ \
|
||||
unsigned int id = read_cpuid(CPUID_ID); \
|
||||
__cpu_is_pxa950(id); \
|
||||
__cpu_is_pxa950(read_cpuid_id()); \
|
||||
})
|
||||
|
||||
|
||||
|
|
|
@ -169,7 +169,6 @@
|
|||
#define GPIO86_nSDCS2 MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH)
|
||||
#define GPIO87_nSDCS3 MFP_CFG_OUT(GPIO87, AF0, DRIVE_HIGH)
|
||||
#define GPIO88_RDnWR MFP_CFG_OUT(GPIO88, AF0, DRIVE_HIGH)
|
||||
#define GPIO89_nACRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
|
||||
|
||||
/* USB */
|
||||
#define GPIO9_USB_RCV MFP_CFG_IN(GPIO9, AF1)
|
||||
|
@ -186,6 +185,9 @@
|
|||
#define GPIO30_ASSP_TXD MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW)
|
||||
#define GPIO31_ASSP_SFRM_IN MFP_CFG_IN(GPIO31, AF1)
|
||||
#define GPIO31_ASSP_SFRM_OUT MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW)
|
||||
#endif
|
||||
|
||||
/* AC97 */
|
||||
#define GPIO89_AC97_nRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
|
||||
#endif /* CONFIG_CPU_PXA26x */
|
||||
|
||||
#endif /* __ASM_ARCH_MFP_PXA25X_H */
|
||||
|
|
|
@ -164,8 +164,11 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
|
|||
saved_icmr[i] = _ICMR(irq);
|
||||
_ICMR(irq) = 0;
|
||||
}
|
||||
for (i = 0; i < pxa_internal_irq_nr; i++)
|
||||
saved_ipr[i] = IPR(i);
|
||||
|
||||
if (cpu_is_pxa27x() || cpu_is_pxa3xx()) {
|
||||
for (i = 0; i < pxa_internal_irq_nr; i++)
|
||||
saved_ipr[i] = IPR(i);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -174,12 +177,15 @@ static int pxa_irq_resume(struct sys_device *dev)
|
|||
{
|
||||
int i, irq = PXA_IRQ(0);
|
||||
|
||||
if (cpu_is_pxa27x() || cpu_is_pxa3xx()) {
|
||||
for (i = 0; i < pxa_internal_irq_nr; i++)
|
||||
IPR(i) = saved_ipr[i];
|
||||
}
|
||||
|
||||
for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) {
|
||||
_ICMR(irq) = saved_icmr[i];
|
||||
_ICLR(irq) = 0;
|
||||
}
|
||||
for (i = 0; i < pxa_internal_irq_nr; i++)
|
||||
IPR(i) = saved_ipr[i];
|
||||
|
||||
ICCR = 1;
|
||||
return 0;
|
||||
|
|
|
@ -381,7 +381,7 @@ err:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int magician_backlight_notify(int brightness)
|
||||
static int magician_backlight_notify(struct device *dev, int brightness)
|
||||
{
|
||||
gpio_set_value(EGPIO_MAGICIAN_BL_POWER, brightness);
|
||||
if (brightness >= 200) {
|
||||
|
|
|
@ -270,7 +270,7 @@ err:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int palmld_backlight_notify(int brightness)
|
||||
static int palmld_backlight_notify(struct device *dev, int brightness)
|
||||
{
|
||||
gpio_set_value(GPIO_NR_PALMLD_BL_POWER, brightness);
|
||||
gpio_set_value(GPIO_NR_PALMLD_LCD_POWER, brightness);
|
||||
|
|
|
@ -209,7 +209,7 @@ err:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int palmt5_backlight_notify(int brightness)
|
||||
static int palmt5_backlight_notify(struct device *dev, int brightness)
|
||||
{
|
||||
gpio_set_value(GPIO_NR_PALMT5_BL_POWER, brightness);
|
||||
gpio_set_value(GPIO_NR_PALMT5_LCD_POWER, brightness);
|
||||
|
|
|
@ -185,7 +185,7 @@ err:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int palmtc_backlight_notify(int brightness)
|
||||
static int palmtc_backlight_notify(struct device *dev, int brightness)
|
||||
{
|
||||
/* backlight is on when GPIO16 AF0 is high */
|
||||
gpio_set_value(GPIO_NR_PALMTC_BL_POWER, brightness);
|
||||
|
|
|
@ -181,7 +181,7 @@ err:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int palmte2_backlight_notify(int brightness)
|
||||
static int palmte2_backlight_notify(struct device *dev, int brightness)
|
||||
{
|
||||
gpio_set_value(GPIO_NR_PALMTE2_BL_POWER, brightness);
|
||||
gpio_set_value(GPIO_NR_PALMTE2_LCD_POWER, brightness);
|
||||
|
|
|
@ -375,7 +375,7 @@ err:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int treo_backlight_notify(int brightness)
|
||||
static int treo_backlight_notify(struct device *dev, int brightness)
|
||||
{
|
||||
gpio_set_value(GPIO_NR_TREO_BL_POWER, brightness);
|
||||
return TREO_MAX_INTENSITY - brightness;
|
||||
|
|
|
@ -269,7 +269,7 @@ err:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int palmtx_backlight_notify(int brightness)
|
||||
static int palmtx_backlight_notify(struct device *dev, int brightness)
|
||||
{
|
||||
gpio_set_value(GPIO_NR_PALMTX_BL_POWER, brightness);
|
||||
gpio_set_value(GPIO_NR_PALMTX_LCD_POWER, brightness);
|
||||
|
|
|
@ -196,7 +196,7 @@ err:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int palmz72_backlight_notify(int brightness)
|
||||
static int palmz72_backlight_notify(struct device *dev, int brightness)
|
||||
{
|
||||
gpio_set_value(GPIO_NR_PALMZ72_BL_POWER, brightness);
|
||||
gpio_set_value(GPIO_NR_PALMZ72_LCD_POWER, brightness);
|
||||
|
|
|
@ -389,13 +389,13 @@ static struct gpio_keys_button spitz_gpio_keys[] = {
|
|||
.type = EV_SW,
|
||||
.code = 0,
|
||||
.gpio = SPITZ_GPIO_SWA,
|
||||
.desc = "Display Down",
|
||||
.desc = "Display Down",
|
||||
},
|
||||
{
|
||||
.type = EV_SW,
|
||||
.code = 1,
|
||||
.gpio = SPITZ_GPIO_SWB,
|
||||
.desc = "Lid Closed",
|
||||
.desc = "Lid Closed",
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
@ -379,7 +379,7 @@ err_request_bckl:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int viper_backlight_notify(int brightness)
|
||||
static int viper_backlight_notify(struct device *dev, int brightness)
|
||||
{
|
||||
gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
|
||||
gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
|
||||
|
|
|
@ -74,8 +74,8 @@
|
|||
#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */
|
||||
|
||||
/*
|
||||
* Control register SYS_RESETCTL is set to 1 to force a soft reset
|
||||
* Control register SYS_RESETCTL Bit 8 is set to 1 to force a soft reset
|
||||
*/
|
||||
#define REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL 0x0100
|
||||
#define REALVIEW_PB1176_SYS_SOFT_RESET 0x0100
|
||||
|
||||
#endif /* __ASM_ARCH_BOARD_PB1176_H */
|
||||
|
|
|
@ -140,7 +140,7 @@
|
|||
* SYS_CLD, SYS_BOOTCS
|
||||
*/
|
||||
#define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
|
||||
#define REALVIEW_SYS_LOCKVAL_MASK 0xA05F /* Enable write access */
|
||||
#define REALVIEW_SYS_LOCK_VAL 0xA05F /* Enable write access */
|
||||
|
||||
/*
|
||||
* REALVIEW_SYS_FLASH
|
||||
|
|
|
@ -381,6 +381,20 @@ static struct sys_timer realview_eb_timer = {
|
|||
.init = realview_eb_timer_init,
|
||||
};
|
||||
|
||||
static void realview_eb_reset(char mode)
|
||||
{
|
||||
void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
|
||||
void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
|
||||
|
||||
/*
|
||||
* To reset, we hit the on-board reset register
|
||||
* in the system FPGA
|
||||
*/
|
||||
__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
|
||||
if (core_tile_eb11mp())
|
||||
__raw_writel(0x0008, reset_ctrl);
|
||||
}
|
||||
|
||||
static void __init realview_eb_init(void)
|
||||
{
|
||||
int i;
|
||||
|
@ -408,6 +422,7 @@ static void __init realview_eb_init(void)
|
|||
#ifdef CONFIG_LEDS
|
||||
leds_event = realview_leds_event;
|
||||
#endif
|
||||
realview_reset = realview_eb_reset;
|
||||
}
|
||||
|
||||
MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
|
||||
|
|
|
@ -292,12 +292,10 @@ static struct sys_timer realview_pb1176_timer = {
|
|||
|
||||
static void realview_pb1176_reset(char mode)
|
||||
{
|
||||
void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
|
||||
REALVIEW_SYS_RESETCTL_OFFSET;
|
||||
void __iomem *rst_hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
|
||||
REALVIEW_SYS_LOCK_OFFSET;
|
||||
__raw_writel(REALVIEW_SYS_LOCKVAL_MASK, rst_hdr_ctrl);
|
||||
__raw_writel(REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL, hdr_ctrl);
|
||||
void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
|
||||
void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
|
||||
__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
|
||||
__raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
|
||||
}
|
||||
|
||||
static void realview_pb1176_fixup(struct machine_desc *mdesc,
|
||||
|
|
|
@ -301,17 +301,16 @@ static struct sys_timer realview_pb11mp_timer = {
|
|||
|
||||
static void realview_pb11mp_reset(char mode)
|
||||
{
|
||||
void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) +
|
||||
REALVIEW_SYS_RESETCTL_OFFSET;
|
||||
unsigned int val;
|
||||
void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
|
||||
void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
|
||||
|
||||
/*
|
||||
* To reset, we hit the on-board reset register
|
||||
* in the system FPGA
|
||||
*/
|
||||
val = __raw_readl(hdr_ctrl);
|
||||
val |= REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR;
|
||||
__raw_writel(val, hdr_ctrl);
|
||||
__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
|
||||
__raw_writel(0x0000, reset_ctrl);
|
||||
__raw_writel(0x0004, reset_ctrl);
|
||||
}
|
||||
|
||||
static void __init realview_pb11mp_init(void)
|
||||
|
|
|
@ -272,6 +272,20 @@ static struct sys_timer realview_pba8_timer = {
|
|||
.init = realview_pba8_timer_init,
|
||||
};
|
||||
|
||||
static void realview_pba8_reset(char mode)
|
||||
{
|
||||
void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
|
||||
void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
|
||||
|
||||
/*
|
||||
* To reset, we hit the on-board reset register
|
||||
* in the system FPGA
|
||||
*/
|
||||
__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
|
||||
__raw_writel(0x0000, reset_ctrl);
|
||||
__raw_writel(0x0004, reset_ctrl);
|
||||
}
|
||||
|
||||
static void __init realview_pba8_init(void)
|
||||
{
|
||||
int i;
|
||||
|
@ -291,6 +305,7 @@ static void __init realview_pba8_init(void)
|
|||
#ifdef CONFIG_LEDS
|
||||
leds_event = realview_leds_event;
|
||||
#endif
|
||||
realview_reset = realview_pba8_reset;
|
||||
}
|
||||
|
||||
MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
|
||||
|
|
|
@ -324,6 +324,20 @@ static void realview_pbx_fixup(struct machine_desc *mdesc, struct tag *tags,
|
|||
#endif
|
||||
}
|
||||
|
||||
static void realview_pbx_reset(char mode)
|
||||
{
|
||||
void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
|
||||
void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
|
||||
|
||||
/*
|
||||
* To reset, we hit the on-board reset register
|
||||
* in the system FPGA
|
||||
*/
|
||||
__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
|
||||
__raw_writel(0x00F0, reset_ctrl);
|
||||
__raw_writel(0x00F4, reset_ctrl);
|
||||
}
|
||||
|
||||
static void __init realview_pbx_init(void)
|
||||
{
|
||||
int i;
|
||||
|
@ -358,6 +372,7 @@ static void __init realview_pbx_init(void)
|
|||
#ifdef CONFIG_LEDS
|
||||
leds_event = realview_leds_event;
|
||||
#endif
|
||||
realview_reset = realview_pbx_reset;
|
||||
}
|
||||
|
||||
MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue