perf/x86: Fix :pp without LBR
This fixes a side effect of Kan's earlier patch to probe the LBRs at boot time. Normally when the LBRs are disabled cycles:pp is disabled too. So for example cycles:pp doesn't work. However this is not needed with PEBSv2 and later (Haswell) because it does not need LBRs to correct the IP-off-by-one. So add an extra check for PEBSv2 that also allows :pp Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Peter Zijlstra <peterz@infradead.org> Cc: kan.liang@intel.com Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Link: http://lkml.kernel.org/r/1407456534-15747-1-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -387,7 +387,7 @@ int x86_pmu_hw_config(struct perf_event *event)
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precise++;
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/* Support for IP fixup */
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if (x86_pmu.lbr_nr)
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if (x86_pmu.lbr_nr || x86_pmu.intel_cap.pebs_format >= 2)
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precise++;
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}
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