regulator: mt6397: Add buck change mode regulator interface for mt6397
BUCKs of mt6397 have auto mode and pwm mode. User can use regulator interfaces to control modes Signed-off-by: Henry Chen <henryc.chen@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>steinar/wifi_calib_4_9_kernel
Henry Chen
Mark Brown
parent
fb69114b3e
commit
0569251327
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@ -23,6 +23,9 @@
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#include <linux/regulator/mt6397-regulator.h>
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#include <linux/regulator/of_regulator.h>
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#define MT6397_BUCK_MODE_AUTO 0
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#define MT6397_BUCK_MODE_FORCE_PWM 1
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/*
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* MT6397 regulators' information
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*
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@ -38,10 +41,14 @@ struct mt6397_regulator_info {
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u32 vselon_reg;
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u32 vselctrl_reg;
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u32 vselctrl_mask;
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u32 modeset_reg;
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u32 modeset_mask;
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u32 modeset_shift;
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};
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#define MT6397_BUCK(match, vreg, min, max, step, volt_ranges, enreg, \
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vosel, vosel_mask, voselon, vosel_ctrl) \
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vosel, vosel_mask, voselon, vosel_ctrl, _modeset_reg, \
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_modeset_shift) \
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[MT6397_ID_##vreg] = { \
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.desc = { \
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.name = #vreg, \
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@ -62,6 +69,9 @@ struct mt6397_regulator_info {
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.vselon_reg = voselon, \
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.vselctrl_reg = vosel_ctrl, \
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.vselctrl_mask = BIT(1), \
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.modeset_reg = _modeset_reg, \
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.modeset_mask = BIT(_modeset_shift), \
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.modeset_shift = _modeset_shift \
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}
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#define MT6397_LDO(match, vreg, ldo_volt_table, enreg, enbit, vosel, \
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@ -145,6 +155,63 @@ static const u32 ldo_volt_table7[] = {
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1300000, 1500000, 1800000, 2000000, 2500000, 2800000, 3000000, 3300000,
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};
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static int mt6397_regulator_set_mode(struct regulator_dev *rdev,
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unsigned int mode)
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{
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struct mt6397_regulator_info *info = rdev_get_drvdata(rdev);
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int ret, val;
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switch (mode) {
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case REGULATOR_MODE_FAST:
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val = MT6397_BUCK_MODE_FORCE_PWM;
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break;
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case REGULATOR_MODE_NORMAL:
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val = MT6397_BUCK_MODE_AUTO;
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break;
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default:
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ret = -EINVAL;
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goto err_mode;
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}
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dev_dbg(&rdev->dev, "mt6397 buck set_mode %#x, %#x, %#x, %#x\n",
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info->modeset_reg, info->modeset_mask,
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info->modeset_shift, val);
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val <<= info->modeset_shift;
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ret = regmap_update_bits(rdev->regmap, info->modeset_reg,
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info->modeset_mask, val);
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err_mode:
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if (ret != 0) {
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dev_err(&rdev->dev,
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"Failed to set mt6397 buck mode: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static unsigned int mt6397_regulator_get_mode(struct regulator_dev *rdev)
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{
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struct mt6397_regulator_info *info = rdev_get_drvdata(rdev);
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int ret, regval;
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ret = regmap_read(rdev->regmap, info->modeset_reg, ®val);
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if (ret != 0) {
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dev_err(&rdev->dev,
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"Failed to get mt6397 buck mode: %d\n", ret);
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return ret;
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}
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switch ((regval & info->modeset_mask) >> info->modeset_shift) {
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case MT6397_BUCK_MODE_AUTO:
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return REGULATOR_MODE_NORMAL;
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case MT6397_BUCK_MODE_FORCE_PWM:
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return REGULATOR_MODE_FAST;
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default:
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return -EINVAL;
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}
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}
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static int mt6397_get_status(struct regulator_dev *rdev)
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{
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int ret;
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@ -170,6 +237,8 @@ static const struct regulator_ops mt6397_volt_range_ops = {
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.disable = regulator_disable_regmap,
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.is_enabled = regulator_is_enabled_regmap,
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.get_status = mt6397_get_status,
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.set_mode = mt6397_regulator_set_mode,
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.get_mode = mt6397_regulator_get_mode,
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};
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static const struct regulator_ops mt6397_volt_table_ops = {
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@ -196,28 +265,30 @@ static const struct regulator_ops mt6397_volt_fixed_ops = {
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static struct mt6397_regulator_info mt6397_regulators[] = {
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MT6397_BUCK("buck_vpca15", VPCA15, 700000, 1493750, 6250,
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buck_volt_range1, MT6397_VCA15_CON7, MT6397_VCA15_CON9, 0x7f,
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MT6397_VCA15_CON10, MT6397_VCA15_CON5),
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MT6397_VCA15_CON10, MT6397_VCA15_CON5, MT6397_VCA15_CON2, 11),
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MT6397_BUCK("buck_vpca7", VPCA7, 700000, 1493750, 6250,
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buck_volt_range1, MT6397_VPCA7_CON7, MT6397_VPCA7_CON9, 0x7f,
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MT6397_VPCA7_CON10, MT6397_VPCA7_CON5),
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MT6397_VPCA7_CON10, MT6397_VPCA7_CON5, MT6397_VPCA7_CON2, 8),
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MT6397_BUCK("buck_vsramca15", VSRAMCA15, 700000, 1493750, 6250,
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buck_volt_range1, MT6397_VSRMCA15_CON7, MT6397_VSRMCA15_CON9,
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0x7f, MT6397_VSRMCA15_CON10, MT6397_VSRMCA15_CON5),
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0x7f, MT6397_VSRMCA15_CON10, MT6397_VSRMCA15_CON5,
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MT6397_VSRMCA15_CON2, 8),
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MT6397_BUCK("buck_vsramca7", VSRAMCA7, 700000, 1493750, 6250,
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buck_volt_range1, MT6397_VSRMCA7_CON7, MT6397_VSRMCA7_CON9,
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0x7f, MT6397_VSRMCA7_CON10, MT6397_VSRMCA7_CON5),
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0x7f, MT6397_VSRMCA7_CON10, MT6397_VSRMCA7_CON5,
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MT6397_VSRMCA7_CON2, 8),
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MT6397_BUCK("buck_vcore", VCORE, 700000, 1493750, 6250,
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buck_volt_range1, MT6397_VCORE_CON7, MT6397_VCORE_CON9, 0x7f,
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MT6397_VCORE_CON10, MT6397_VCORE_CON5),
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MT6397_VCORE_CON10, MT6397_VCORE_CON5, MT6397_VCORE_CON2, 8),
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MT6397_BUCK("buck_vgpu", VGPU, 700000, 1493750, 6250, buck_volt_range1,
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MT6397_VGPU_CON7, MT6397_VGPU_CON9, 0x7f,
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MT6397_VGPU_CON10, MT6397_VGPU_CON5),
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MT6397_VGPU_CON10, MT6397_VGPU_CON5, MT6397_VGPU_CON2, 8),
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MT6397_BUCK("buck_vdrm", VDRM, 800000, 1593750, 6250, buck_volt_range2,
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MT6397_VDRM_CON7, MT6397_VDRM_CON9, 0x7f,
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MT6397_VDRM_CON10, MT6397_VDRM_CON5),
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MT6397_VDRM_CON10, MT6397_VDRM_CON5, MT6397_VDRM_CON2, 8),
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MT6397_BUCK("buck_vio18", VIO18, 1500000, 2120000, 20000,
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buck_volt_range3, MT6397_VIO18_CON7, MT6397_VIO18_CON9, 0x1f,
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MT6397_VIO18_CON10, MT6397_VIO18_CON5),
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MT6397_VIO18_CON10, MT6397_VIO18_CON5, MT6397_VIO18_CON2, 8),
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MT6397_REG_FIXED("ldo_vtcxo", VTCXO, MT6397_ANALDO_CON0, 10, 2800000),
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MT6397_REG_FIXED("ldo_va28", VA28, MT6397_ANALDO_CON1, 14, 2800000),
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MT6397_LDO("ldo_vcama", VCAMA, ldo_volt_table1,
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