drm/i915: Do not read GAMMA_MODE register
Implement Daniel Stone's recommendation to not read registers to infer the hardware's state. v2: Read GAMMA_MODE register value at init (Matt Roper's comment) v3: Read GAMMA_MODE register in intel_modeset_readout_hw_state along with other registers (Matt Roper's comment). v4: Mask GAMMA_MODE register with interesting bits when reading Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1458125837-2576-3-git-send-email-lionel.g.landwerlin@intel.com
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@ -121,6 +121,8 @@ static void haswell_load_luts(struct drm_crtc *crtc)
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struct drm_device *dev = crtc->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_crtc_state *intel_crtc_state =
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to_intel_crtc_state(crtc->state);
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bool reenable_ips = false;
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/*
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@ -128,11 +130,12 @@ static void haswell_load_luts(struct drm_crtc *crtc)
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* GAMMA_MODE is configured for split gamma and IPS_CTL has IPS enabled.
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*/
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if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&
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((I915_READ(GAMMA_MODE(intel_crtc->pipe)) & GAMMA_MODE_MODE_MASK) ==
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GAMMA_MODE_MODE_SPLIT)) {
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(intel_crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)) {
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hsw_disable_ips(intel_crtc);
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reenable_ips = true;
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}
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intel_crtc_state->gamma_mode = GAMMA_MODE_MODE_8BIT;
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I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
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i9xx_load_luts(crtc);
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@ -9961,6 +9961,9 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
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intel_get_pipe_src_size(crtc, pipe_config);
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pipe_config->gamma_mode =
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I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK;
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if (INTEL_INFO(dev)->gen >= 9) {
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skl_init_scalers(dev, crtc, pipe_config);
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}
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@ -578,6 +578,9 @@ struct intel_crtc_state {
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*/
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bool need_postvbl_update;
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} wm;
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/* Gamma mode programmed on the pipe */
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uint32_t gamma_mode;
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};
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struct vlv_wm_state {
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