Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] Support multiple CPUs going through OS_MCA [IA64] silence GCC ia64 unused variable warnings [IA64] prevent MCA when performing MMIO mmap to PCI config space [IA64] add sn_register_pmi_handler oemcall [IA64] Stop bit for brl instruction [IA64] SN: Correct ROM resource length for BIOS copy [IA64] Don't set psr.ic and psr.i simultaneously
This commit is contained in:
commit
0806ca2ab3
|
@ -19,6 +19,7 @@
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#include <sys/mman.h>
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#include <sys/stat.h>
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#include <unistd.h>
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#include <linux/pci.h>
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int sum;
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|
@ -34,13 +35,19 @@ int map_mem(char *path, off_t offset, size_t length, int touch)
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return -1;
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}
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if (fnmatch("/proc/bus/pci/*", path, 0) == 0) {
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rc = ioctl(fd, PCIIOC_MMAP_IS_MEM);
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if (rc == -1)
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perror("PCIIOC_MMAP_IS_MEM ioctl");
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}
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addr = mmap(NULL, length, PROT_READ|PROT_WRITE, MAP_SHARED, fd, offset);
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if (addr == MAP_FAILED)
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return 1;
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if (touch) {
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c = (int *) addr;
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while (c < (int *) (offset + length))
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while (c < (int *) (addr + length))
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sum += *c++;
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}
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@ -54,7 +61,7 @@ int map_mem(char *path, off_t offset, size_t length, int touch)
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return 0;
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}
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int scan_sysfs(char *path, char *file, off_t offset, size_t length, int touch)
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int scan_tree(char *path, char *file, off_t offset, size_t length, int touch)
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{
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struct dirent **namelist;
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char *name, *path2;
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@ -93,7 +100,7 @@ int scan_sysfs(char *path, char *file, off_t offset, size_t length, int touch)
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} else {
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r = lstat(path2, &buf);
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if (r == 0 && S_ISDIR(buf.st_mode)) {
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rc = scan_sysfs(path2, file, offset, length, touch);
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rc = scan_tree(path2, file, offset, length, touch);
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if (rc < 0)
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return rc;
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}
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@ -238,10 +245,15 @@ int main()
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else
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fprintf(stderr, "FAIL: /dev/mem 0x0-0x100000 not accessible\n");
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scan_sysfs("/sys/class/pci_bus", "legacy_mem", 0, 0xA0000, 1);
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scan_sysfs("/sys/class/pci_bus", "legacy_mem", 0xA0000, 0x20000, 0);
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scan_sysfs("/sys/class/pci_bus", "legacy_mem", 0xC0000, 0x40000, 1);
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scan_sysfs("/sys/class/pci_bus", "legacy_mem", 0, 1024*1024, 0);
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scan_tree("/sys/class/pci_bus", "legacy_mem", 0, 0xA0000, 1);
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scan_tree("/sys/class/pci_bus", "legacy_mem", 0xA0000, 0x20000, 0);
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scan_tree("/sys/class/pci_bus", "legacy_mem", 0xC0000, 0x40000, 1);
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scan_tree("/sys/class/pci_bus", "legacy_mem", 0, 1024*1024, 0);
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scan_rom("/sys/devices", "rom");
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scan_tree("/proc/bus/pci", "??.?", 0, 0xA0000, 1);
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scan_tree("/proc/bus/pci", "??.?", 0xA0000, 0x20000, 0);
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scan_tree("/proc/bus/pci", "??.?", 0xC0000, 0x40000, 1);
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scan_tree("/proc/bus/pci", "??.?", 0, 1024*1024, 0);
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}
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|
|
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@ -112,6 +112,18 @@ POTENTIAL ATTRIBUTE ALIASING CASES
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The /dev/mem mmap constraints apply.
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mmap of /proc/bus/pci/.../??.?
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This is an MMIO mmap of PCI functions, which additionally may or
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may not be requested as using the WC attribute.
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|
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If WC is requested, and the region in kern_memmap is either WC
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or UC, and the EFI memory map designates the region as WC, then
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the WC mapping is allowed.
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|
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Otherwise, the user mapping must use the same attribute as the
|
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kernel mapping.
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|
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read/write of /dev/mem
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|
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This uses copy_from_user(), which implicitly uses a kernel
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|
|
|
@ -30,6 +30,7 @@
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.previous
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#define BRL_COND_FSYS_BUBBLE_DOWN(pr) \
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[1:](pr)brl.cond.sptk 0; \
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;; \
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.xdata4 ".data.patch.brl_fsys_bubble_down", 1b-.
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|
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GLOBAL_ENTRY(__kernel_syscall_via_break)
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|
|
|
@ -57,6 +57,9 @@
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*
|
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* 2006-09-15 Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
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* Add printing support for MCA/INIT.
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*
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* 2007-04-27 Russ Anderson <rja@sgi.com>
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* Support multiple cpus going through OS_MCA in the same event.
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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|
@ -96,7 +99,6 @@
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#endif
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|
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/* Used by mca_asm.S */
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u32 ia64_mca_serialize;
|
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DEFINE_PER_CPU(u64, ia64_mca_data); /* == __per_cpu_mca[smp_processor_id()] */
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DEFINE_PER_CPU(u64, ia64_mca_per_cpu_pte); /* PTE to map per-CPU area */
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DEFINE_PER_CPU(u64, ia64_mca_pal_pte); /* PTE to map PAL code */
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|
@ -963,11 +965,12 @@ ia64_mca_modify_original_stack(struct pt_regs *regs,
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goto no_mod;
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}
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if (r13 != sos->prev_IA64_KR_CURRENT) {
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msg = "inconsistent previous current and r13";
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goto no_mod;
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}
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|
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if (!mca_recover_range(ms->pmsa_iip)) {
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if (r13 != sos->prev_IA64_KR_CURRENT) {
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msg = "inconsistent previous current and r13";
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goto no_mod;
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}
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if ((r12 - r13) >= KERNEL_STACK_SIZE) {
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msg = "inconsistent r12 and r13";
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goto no_mod;
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|
@ -1187,6 +1190,13 @@ all_in:
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* further MCA logging is enabled by clearing logs.
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* Monarch also has the duty of sending wakeup-IPIs to pull the
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* slave processors out of rendezvous spinloop.
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*
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* If multiple processors call into OS_MCA, the first will become
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* the monarch. Subsequent cpus will be recorded in the mca_cpu
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* bitmask. After the first monarch has processed its MCA, it
|
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* will wake up the next cpu in the mca_cpu bitmask and then go
|
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* into the rendezvous loop. When all processors have serviced
|
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* their MCA, the last monarch frees up the rest of the processors.
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*/
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void
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ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
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|
@ -1196,16 +1206,32 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
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struct task_struct *previous_current;
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struct ia64_mca_notify_die nd =
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{ .sos = sos, .monarch_cpu = &monarch_cpu };
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static atomic_t mca_count;
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static cpumask_t mca_cpu;
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if (atomic_add_return(1, &mca_count) == 1) {
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monarch_cpu = cpu;
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sos->monarch = 1;
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} else {
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cpu_set(cpu, mca_cpu);
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sos->monarch = 0;
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}
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mprintk(KERN_INFO "Entered OS MCA handler. PSP=%lx cpu=%d "
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"monarch=%ld\n", sos->proc_state_param, cpu, sos->monarch);
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previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "MCA");
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monarch_cpu = cpu;
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if (notify_die(DIE_MCA_MONARCH_ENTER, "MCA", regs, (long)&nd, 0, 0)
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== NOTIFY_STOP)
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ia64_mca_spin(__FUNCTION__);
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ia64_wait_for_slaves(cpu, "MCA");
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if (sos->monarch) {
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ia64_wait_for_slaves(cpu, "MCA");
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} else {
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ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA;
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while (cpu_isset(cpu, mca_cpu))
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cpu_relax(); /* spin until monarch wakes us */
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ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
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}
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/* Wakeup all the processors which are spinning in the rendezvous loop.
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* They will leave SAL, then spin in the OS with interrupts disabled
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@ -1244,6 +1270,26 @@ ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
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== NOTIFY_STOP)
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ia64_mca_spin(__FUNCTION__);
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if (atomic_dec_return(&mca_count) > 0) {
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int i;
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/* wake up the next monarch cpu,
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* and put this cpu in the rendez loop.
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*/
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ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA;
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for_each_online_cpu(i) {
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if (cpu_isset(i, mca_cpu)) {
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monarch_cpu = i;
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cpu_clear(i, mca_cpu); /* wake next cpu */
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while (monarch_cpu != -1)
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cpu_relax(); /* spin until last cpu leaves */
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ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
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set_curr_task(cpu, previous_current);
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return;
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}
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}
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}
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set_curr_task(cpu, previous_current);
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monarch_cpu = -1;
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}
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|
|
|
@ -133,14 +133,6 @@ ia64_do_tlb_purge:
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//StartMain////////////////////////////////////////////////////////////////////
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ia64_os_mca_dispatch:
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// Serialize all MCA processing
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mov r3=1;;
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LOAD_PHYSICAL(p0,r2,ia64_mca_serialize);;
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ia64_os_mca_spin:
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xchg4 r4=[r2],r3;;
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cmp.ne p6,p0=r4,r0
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(p6) br ia64_os_mca_spin
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mov r3=IA64_MCA_CPU_MCA_STACK_OFFSET // use the MCA stack
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LOAD_PHYSICAL(p0,r2,1f) // return address
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mov r19=1 // All MCA events are treated as monarch (for now)
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|
@ -291,10 +283,6 @@ END(ia64_os_mca_virtual_begin)
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|
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mov b0=r12 // SAL_CHECK return address
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// release lock
|
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LOAD_PHYSICAL(p0,r3,ia64_mca_serialize);;
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st4.rel [r3]=r0
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|
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br b0
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|
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//EndMain//////////////////////////////////////////////////////////////////////
|
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|
|
|
@ -40,7 +40,11 @@ GLOBAL_ENTRY(mca_handler_bhhook)
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mov b6=loc1
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;;
|
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mov loc1=rp
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ssm psr.i | psr.ic
|
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ssm psr.ic
|
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;;
|
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srlz.i
|
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;;
|
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ssm psr.i
|
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br.call.sptk.many rp=b6 // does not return ...
|
||||
;;
|
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mov ar.pfs=loc0
|
||||
|
|
|
@ -513,7 +513,8 @@ copy_thread (int nr, unsigned long clone_flags,
|
|||
static void
|
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do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
|
||||
{
|
||||
unsigned long mask, sp, nat_bits = 0, ip, ar_rnat, urbs_end, cfm;
|
||||
unsigned long mask, sp, nat_bits = 0, ar_rnat, urbs_end, cfm;
|
||||
unsigned long uninitialized_var(ip); /* GCC be quiet */
|
||||
elf_greg_t *dst = arg;
|
||||
struct pt_regs *pt;
|
||||
char nat;
|
||||
|
|
|
@ -175,7 +175,7 @@ EXPORT_SYMBOL(flush_tlb_range);
|
|||
void __devinit
|
||||
ia64_tlb_init (void)
|
||||
{
|
||||
ia64_ptce_info_t ptce_info;
|
||||
ia64_ptce_info_t uninitialized_var(ptce_info); /* GCC be quiet */
|
||||
unsigned long tr_pgbits;
|
||||
long status;
|
||||
|
||||
|
|
|
@ -591,6 +591,9 @@ int
|
|||
pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
|
||||
enum pci_mmap_state mmap_state, int write_combine)
|
||||
{
|
||||
unsigned long size = vma->vm_end - vma->vm_start;
|
||||
pgprot_t prot;
|
||||
|
||||
/*
|
||||
* I/O space cannot be accessed via normal processor loads and
|
||||
* stores on this platform.
|
||||
|
@ -604,15 +607,24 @@ pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
|
|||
*/
|
||||
return -EINVAL;
|
||||
|
||||
if (!valid_mmap_phys_addr_range(vma->vm_pgoff, size))
|
||||
return -EINVAL;
|
||||
|
||||
prot = phys_mem_access_prot(NULL, vma->vm_pgoff, size,
|
||||
vma->vm_page_prot);
|
||||
|
||||
/*
|
||||
* Leave vm_pgoff as-is, the PCI space address is the physical
|
||||
* address on this platform.
|
||||
* If the user requested WC, the kernel uses UC or WC for this region,
|
||||
* and the chipset supports WC, we can use WC. Otherwise, we have to
|
||||
* use the same attribute the kernel uses.
|
||||
*/
|
||||
if (write_combine && efi_range_is_wc(vma->vm_start,
|
||||
vma->vm_end - vma->vm_start))
|
||||
if (write_combine &&
|
||||
((pgprot_val(prot) & _PAGE_MA_MASK) == _PAGE_MA_UC ||
|
||||
(pgprot_val(prot) & _PAGE_MA_MASK) == _PAGE_MA_WC) &&
|
||||
efi_range_is_wc(vma->vm_start, vma->vm_end - vma->vm_start))
|
||||
vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
|
||||
else
|
||||
vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
|
||||
vma->vm_page_prot = prot;
|
||||
|
||||
if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
|
||||
vma->vm_end - vma->vm_start, vma->vm_page_prot))
|
||||
|
|
|
@ -418,7 +418,7 @@ sn_acpi_slot_fixup(struct pci_dev *dev)
|
|||
void __iomem *addr;
|
||||
struct pcidev_info *pcidev_info = NULL;
|
||||
struct sn_irq_info *sn_irq_info = NULL;
|
||||
size_t size;
|
||||
size_t image_size, size;
|
||||
|
||||
if (sn_acpi_get_pcidev_info(dev, &pcidev_info, &sn_irq_info)) {
|
||||
panic("%s: Failure obtaining pcidev_info for %s\n",
|
||||
|
@ -428,17 +428,16 @@ sn_acpi_slot_fixup(struct pci_dev *dev)
|
|||
if (pcidev_info->pdi_pio_mapped_addr[PCI_ROM_RESOURCE]) {
|
||||
/*
|
||||
* A valid ROM image exists and has been shadowed by the
|
||||
* PROM. Setup the pci_dev ROM resource to point to
|
||||
* the shadowed copy.
|
||||
* PROM. Setup the pci_dev ROM resource with the address
|
||||
* of the shadowed copy, and the actual length of the ROM image.
|
||||
*/
|
||||
size = dev->resource[PCI_ROM_RESOURCE].end -
|
||||
dev->resource[PCI_ROM_RESOURCE].start;
|
||||
addr =
|
||||
ioremap(pcidev_info->pdi_pio_mapped_addr[PCI_ROM_RESOURCE],
|
||||
size);
|
||||
size = pci_resource_len(dev, PCI_ROM_RESOURCE);
|
||||
addr = ioremap(pcidev_info->pdi_pio_mapped_addr[PCI_ROM_RESOURCE],
|
||||
size);
|
||||
image_size = pci_get_rom_size(addr, size);
|
||||
dev->resource[PCI_ROM_RESOURCE].start = (unsigned long) addr;
|
||||
dev->resource[PCI_ROM_RESOURCE].end =
|
||||
(unsigned long) addr + size;
|
||||
(unsigned long) addr + image_size - 1;
|
||||
dev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_BIOS_COPY;
|
||||
}
|
||||
sn_pci_fixup_slot(dev, pcidev_info, sn_irq_info);
|
||||
|
|
|
@ -259,9 +259,23 @@ sn_io_slot_fixup(struct pci_dev *dev)
|
|||
insert_resource(&ioport_resource, &dev->resource[idx]);
|
||||
else
|
||||
insert_resource(&iomem_resource, &dev->resource[idx]);
|
||||
/* If ROM, mark as shadowed in PROM */
|
||||
if (idx == PCI_ROM_RESOURCE)
|
||||
dev->resource[idx].flags |= IORESOURCE_ROM_BIOS_COPY;
|
||||
/*
|
||||
* If ROM, set the actual ROM image size, and mark as
|
||||
* shadowed in PROM.
|
||||
*/
|
||||
if (idx == PCI_ROM_RESOURCE) {
|
||||
size_t image_size;
|
||||
void __iomem *rom;
|
||||
|
||||
rom = ioremap(pci_resource_start(dev, PCI_ROM_RESOURCE),
|
||||
size + 1);
|
||||
image_size = pci_get_rom_size(rom, size + 1);
|
||||
dev->resource[PCI_ROM_RESOURCE].end =
|
||||
dev->resource[PCI_ROM_RESOURCE].start +
|
||||
image_size - 1;
|
||||
dev->resource[PCI_ROM_RESOURCE].flags |=
|
||||
IORESOURCE_ROM_BIOS_COPY;
|
||||
}
|
||||
}
|
||||
/* Create a pci_window in the pci_controller struct for
|
||||
* each device resource.
|
||||
|
|
|
@ -369,7 +369,7 @@ static void tio_corelet_reset(nasid_t nasid, int corelet)
|
|||
|
||||
static int is_fpga_tio(int nasid, int *bt)
|
||||
{
|
||||
u16 ioboard_type;
|
||||
u16 uninitialized_var(ioboard_type); /* GCC be quiet */
|
||||
s64 rc;
|
||||
|
||||
rc = ia64_sn_sysctl_ioboard_get(nasid, &ioboard_type);
|
||||
|
|
|
@ -80,7 +80,7 @@ static int sal_pcibr_error_interrupt(struct pcibus_info *soft)
|
|||
u16 sn_ioboard_to_pci_bus(struct pci_bus *pci_bus)
|
||||
{
|
||||
s64 rc;
|
||||
u16 ioboard;
|
||||
u16 uninitialized_var(ioboard); /* GCC be quiet */
|
||||
nasid_t nasid = NASID_GET(SN_PCIBUS_BUSSOFT(pci_bus)->bs_base);
|
||||
|
||||
rc = ia64_sn_sysctl_ioboard_get(nasid, &ioboard);
|
||||
|
|
|
@ -53,6 +53,49 @@ static void pci_disable_rom(struct pci_dev *pdev)
|
|||
pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
|
||||
}
|
||||
|
||||
/**
|
||||
* pci_get_rom_size - obtain the actual size of the ROM image
|
||||
* @rom: kernel virtual pointer to image of ROM
|
||||
* @size: size of PCI window
|
||||
* return: size of actual ROM image
|
||||
*
|
||||
* Determine the actual length of the ROM image.
|
||||
* The PCI window size could be much larger than the
|
||||
* actual image size.
|
||||
*/
|
||||
size_t pci_get_rom_size(void __iomem *rom, size_t size)
|
||||
{
|
||||
void __iomem *image;
|
||||
int last_image;
|
||||
|
||||
image = rom;
|
||||
do {
|
||||
void __iomem *pds;
|
||||
/* Standard PCI ROMs start out with these bytes 55 AA */
|
||||
if (readb(image) != 0x55)
|
||||
break;
|
||||
if (readb(image + 1) != 0xAA)
|
||||
break;
|
||||
/* get the PCI data structure and check its signature */
|
||||
pds = image + readw(image + 24);
|
||||
if (readb(pds) != 'P')
|
||||
break;
|
||||
if (readb(pds + 1) != 'C')
|
||||
break;
|
||||
if (readb(pds + 2) != 'I')
|
||||
break;
|
||||
if (readb(pds + 3) != 'R')
|
||||
break;
|
||||
last_image = readb(pds + 21) & 0x80;
|
||||
/* this length is reliable */
|
||||
image += readw(pds + 16) * 512;
|
||||
} while (!last_image);
|
||||
|
||||
/* never return a size larger than the PCI resource window */
|
||||
/* there are known ROMs that get the size wrong */
|
||||
return min((size_t)(image - rom), size);
|
||||
}
|
||||
|
||||
/**
|
||||
* pci_map_rom - map a PCI ROM to kernel space
|
||||
* @pdev: pointer to pci device struct
|
||||
|
@ -68,8 +111,6 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
|
|||
struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
|
||||
loff_t start;
|
||||
void __iomem *rom;
|
||||
void __iomem *image;
|
||||
int last_image;
|
||||
|
||||
/*
|
||||
* IORESOURCE_ROM_SHADOW set on x86, x86_64 and IA64 supports legacy
|
||||
|
@ -117,33 +158,7 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
|
|||
* size is much larger than the actual size of the ROM.
|
||||
* True size is important if the ROM is going to be copied.
|
||||
*/
|
||||
image = rom;
|
||||
do {
|
||||
void __iomem *pds;
|
||||
/* Standard PCI ROMs start out with these bytes 55 AA */
|
||||
if (readb(image) != 0x55)
|
||||
break;
|
||||
if (readb(image + 1) != 0xAA)
|
||||
break;
|
||||
/* get the PCI data structure and check its signature */
|
||||
pds = image + readw(image + 24);
|
||||
if (readb(pds) != 'P')
|
||||
break;
|
||||
if (readb(pds + 1) != 'C')
|
||||
break;
|
||||
if (readb(pds + 2) != 'I')
|
||||
break;
|
||||
if (readb(pds + 3) != 'R')
|
||||
break;
|
||||
last_image = readb(pds + 21) & 0x80;
|
||||
/* this length is reliable */
|
||||
image += readw(pds + 16) * 512;
|
||||
} while (!last_image);
|
||||
|
||||
/* never return a size larger than the PCI resource window */
|
||||
/* there are known ROMs that get the size wrong */
|
||||
*size = min((size_t)(image - rom), *size);
|
||||
|
||||
*size = pci_get_rom_size(rom, *size);
|
||||
return rom;
|
||||
}
|
||||
|
||||
|
|
|
@ -48,6 +48,7 @@ enum {
|
|||
IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
|
||||
IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1,
|
||||
IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2,
|
||||
IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA = 0x3,
|
||||
};
|
||||
|
||||
/* Information maintained by the MC infrastructure */
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
#define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010
|
||||
#define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011
|
||||
#define SN_SAL_PRINT_ERROR 0x02000012
|
||||
#define SN_SAL_REGISTER_PMI_HANDLER 0x02000014
|
||||
#define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
|
||||
#define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
|
||||
#define SN_SAL_GET_SAPIC_INFO 0x0200001d
|
||||
|
@ -679,6 +680,25 @@ sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr,
|
|||
return ret_stuff.status;
|
||||
}
|
||||
|
||||
/*
|
||||
* Register or unregister a function to handle a PMI received by a CPU.
|
||||
* Before calling the registered handler, SAL sets r1 to the value that
|
||||
* was passed in as the global_pointer.
|
||||
*
|
||||
* If the handler pointer is NULL, then the currently registered handler
|
||||
* will be unregistered.
|
||||
*
|
||||
* Returns 0 on success, or a negative value if an error occurred.
|
||||
*/
|
||||
static inline int
|
||||
sn_register_pmi_handler(u64 handler, u64 global_pointer)
|
||||
{
|
||||
struct ia64_sal_retval ret_stuff;
|
||||
ia64_sal_oemcall(&ret_stuff, SN_SAL_REGISTER_PMI_HANDLER, handler,
|
||||
global_pointer, 0, 0, 0, 0, 0);
|
||||
return ret_stuff.status;
|
||||
}
|
||||
|
||||
/*
|
||||
* Change or query the coherence domain for this partition. Each cpu-based
|
||||
* nasid is represented by a bit in an array of 64-bit words:
|
||||
|
|
|
@ -566,6 +566,7 @@ void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
|
|||
void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
|
||||
void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
|
||||
void pci_remove_rom(struct pci_dev *pdev);
|
||||
size_t pci_get_rom_size(void __iomem *rom, size_t size);
|
||||
|
||||
/* Power management related routines */
|
||||
int pci_save_state(struct pci_dev *dev);
|
||||
|
|
Loading…
Reference in a new issue