[ARM] Kirkwood: Instantiate mv_xor driver
Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
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@ -22,6 +22,7 @@
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#include <mach/kirkwood.h>
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#include <mach/kirkwood.h>
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#include <plat/cache-feroceon-l2.h>
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#include <plat/cache-feroceon-l2.h>
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#include <plat/ehci-orion.h>
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#include <plat/ehci-orion.h>
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#include <plat/mv_xor.h>
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#include <plat/orion_nand.h>
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#include <plat/orion_nand.h>
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#include <plat/time.h>
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#include <plat/time.h>
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#include "common.h"
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#include "common.h"
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@ -283,6 +284,212 @@ void __init kirkwood_uart1_init(void)
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}
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}
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/*****************************************************************************
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* XOR
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****************************************************************************/
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static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
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.dram = &kirkwood_mbus_dram_info,
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};
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static u64 kirkwood_xor_dmamask = DMA_32BIT_MASK;
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/*****************************************************************************
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* XOR0
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****************************************************************************/
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static struct resource kirkwood_xor0_shared_resources[] = {
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{
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.name = "xor 0 low",
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.start = XOR0_PHYS_BASE,
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.end = XOR0_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.name = "xor 0 high",
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.start = XOR0_HIGH_PHYS_BASE,
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.end = XOR0_HIGH_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device kirkwood_xor0_shared = {
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.name = MV_XOR_SHARED_NAME,
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.id = 0,
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.dev = {
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.platform_data = &kirkwood_xor_shared_data,
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},
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.num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
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.resource = kirkwood_xor0_shared_resources,
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};
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static struct resource kirkwood_xor00_resources[] = {
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[0] = {
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.start = IRQ_KIRKWOOD_XOR_00,
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.end = IRQ_KIRKWOOD_XOR_00,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct mv_xor_platform_data kirkwood_xor00_data = {
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.shared = &kirkwood_xor0_shared,
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.hw_id = 0,
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.pool_size = PAGE_SIZE,
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};
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static struct platform_device kirkwood_xor00_channel = {
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.name = MV_XOR_NAME,
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.id = 0,
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.num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
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.resource = kirkwood_xor00_resources,
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.dev = {
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.dma_mask = &kirkwood_xor_dmamask,
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.coherent_dma_mask = DMA_64BIT_MASK,
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.platform_data = (void *)&kirkwood_xor00_data,
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},
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};
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static struct resource kirkwood_xor01_resources[] = {
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[0] = {
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.start = IRQ_KIRKWOOD_XOR_01,
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.end = IRQ_KIRKWOOD_XOR_01,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct mv_xor_platform_data kirkwood_xor01_data = {
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.shared = &kirkwood_xor0_shared,
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.hw_id = 1,
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.pool_size = PAGE_SIZE,
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};
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static struct platform_device kirkwood_xor01_channel = {
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.name = MV_XOR_NAME,
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.id = 1,
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.num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
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.resource = kirkwood_xor01_resources,
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.dev = {
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.dma_mask = &kirkwood_xor_dmamask,
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.coherent_dma_mask = DMA_64BIT_MASK,
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.platform_data = (void *)&kirkwood_xor01_data,
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},
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};
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void __init kirkwood_xor0_init(void)
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{
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platform_device_register(&kirkwood_xor0_shared);
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/*
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* two engines can't do memset simultaneously, this limitation
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* satisfied by removing memset support from one of the engines.
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*/
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dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
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dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
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platform_device_register(&kirkwood_xor00_channel);
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dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
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dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
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dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
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platform_device_register(&kirkwood_xor01_channel);
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}
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/*****************************************************************************
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* XOR1
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****************************************************************************/
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static struct resource kirkwood_xor1_shared_resources[] = {
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{
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.name = "xor 1 low",
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.start = XOR1_PHYS_BASE,
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.end = XOR1_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.name = "xor 1 high",
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.start = XOR1_HIGH_PHYS_BASE,
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.end = XOR1_HIGH_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device kirkwood_xor1_shared = {
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.name = MV_XOR_SHARED_NAME,
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.id = 1,
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.dev = {
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.platform_data = &kirkwood_xor_shared_data,
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},
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.num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
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.resource = kirkwood_xor1_shared_resources,
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};
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static struct resource kirkwood_xor10_resources[] = {
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[0] = {
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.start = IRQ_KIRKWOOD_XOR_10,
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.end = IRQ_KIRKWOOD_XOR_10,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct mv_xor_platform_data kirkwood_xor10_data = {
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.shared = &kirkwood_xor1_shared,
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.hw_id = 0,
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.pool_size = PAGE_SIZE,
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};
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static struct platform_device kirkwood_xor10_channel = {
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.name = MV_XOR_NAME,
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.id = 2,
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.num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
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.resource = kirkwood_xor10_resources,
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.dev = {
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.dma_mask = &kirkwood_xor_dmamask,
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.coherent_dma_mask = DMA_64BIT_MASK,
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.platform_data = (void *)&kirkwood_xor10_data,
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},
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};
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static struct resource kirkwood_xor11_resources[] = {
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[0] = {
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.start = IRQ_KIRKWOOD_XOR_11,
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.end = IRQ_KIRKWOOD_XOR_11,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct mv_xor_platform_data kirkwood_xor11_data = {
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.shared = &kirkwood_xor1_shared,
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.hw_id = 1,
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.pool_size = PAGE_SIZE,
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};
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static struct platform_device kirkwood_xor11_channel = {
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.name = MV_XOR_NAME,
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.id = 3,
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.num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
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.resource = kirkwood_xor11_resources,
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.dev = {
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.dma_mask = &kirkwood_xor_dmamask,
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.coherent_dma_mask = DMA_64BIT_MASK,
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.platform_data = (void *)&kirkwood_xor11_data,
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},
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};
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void __init kirkwood_xor1_init(void)
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{
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platform_device_register(&kirkwood_xor1_shared);
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/*
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* two engines can't do memset simultaneously, this limitation
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* satisfied by removing memset support from one of the engines.
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*/
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dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
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dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
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platform_device_register(&kirkwood_xor10_channel);
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dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
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dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
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dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
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platform_device_register(&kirkwood_xor11_channel);
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}
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/*****************************************************************************
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/*****************************************************************************
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* Time handling
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* Time handling
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****************************************************************************/
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****************************************************************************/
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@ -35,6 +35,8 @@ void kirkwood_rtc_init(void);
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void kirkwood_sata_init(struct mv_sata_platform_data *sata_data);
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void kirkwood_sata_init(struct mv_sata_platform_data *sata_data);
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void kirkwood_uart0_init(void);
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void kirkwood_uart0_init(void);
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void kirkwood_uart1_init(void);
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void kirkwood_uart1_init(void);
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void kirkwood_xor0_init(void);
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void kirkwood_xor1_init(void);
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extern struct sys_timer kirkwood_timer;
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extern struct sys_timer kirkwood_timer;
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@ -88,6 +88,15 @@
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#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
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#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000)
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#define XOR0_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60800)
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#define XOR0_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60800)
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#define XOR1_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60900)
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#define XOR1_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60900)
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#define XOR0_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60A00)
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#define XOR0_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60A00)
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#define XOR1_HIGH_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x60B00)
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#define XOR1_HIGH_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x60B00)
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#define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x70000)
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#define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x70000)
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#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000)
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#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000)
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@ -46,6 +46,8 @@ static void __init rd88f6192_init(void)
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kirkwood_rtc_init();
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kirkwood_rtc_init();
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kirkwood_sata_init(&rd88f6192_sata_data);
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kirkwood_sata_init(&rd88f6192_sata_data);
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kirkwood_uart0_init();
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kirkwood_uart0_init();
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kirkwood_xor0_init();
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kirkwood_xor1_init();
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}
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}
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static int __init rd88f6192_pci_init(void)
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static int __init rd88f6192_pci_init(void)
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