[ARM] OMAP3 pwrdm: add hardware save-and-restore (SAR) support
OMAP3430ES2+ introduces a new feature: optional powerdomain context hardware save-and-restore (SAR). Currently, this feature only applies to USBHOST and USBTLL module context when the USBHOST or CORE powerdomains enter a low-power sleep state[1]. This feature avoids re-enumeration of USB devices when the powerdomains return from idle, which is potentially time-consuming. This patch adds support for enabling and disabling hardware save-and-restore to the powerdomain code. Three new functions are added, pwrdm_enable_hdwr_sar(), pwrdm_disable_hdwr_sar(), and pwrdm_can_hdwr_sar(). A new struct powerdomain "flags" field is added, with a PWRDM_HAS_HDWR_SAR flag to indicate powerdomains with SAR support. Thanks to Jouni Högander <jouni.hogander@nokia.com> for reviewing an earlier version of these patches, and Richard Woodruff <r-woodruff2@ti.com> for clarifying the purpose of these bits. 1. For the USBHOST controller module, context loss occurs when the USBHOST powerdomain enters off-idle. For USBTLL, context loss occurs either if CORE enters off-idle, or if the CORE logic is configured to turn off when CORE enters retention-idle (OSWR). 34xx ES2 TRM 4.8.6.1.1, 4.8.6.1.2 Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -1002,6 +1002,74 @@ int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
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return 0;
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}
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/**
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* pwrdm_enable_hdwr_sar - enable automatic hardware SAR for a pwrdm
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* @pwrdm: struct powerdomain *
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*
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* Enable automatic context save-and-restore upon power state change
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* for some devices in a powerdomain. Warning: this only affects a
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* subset of devices in a powerdomain; check the TRM closely. Returns
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* -EINVAL if the powerdomain pointer is null or if the powerdomain
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* does not support automatic save-and-restore, or returns 0 upon
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* success.
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*/
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int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm)
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{
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if (!pwrdm)
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return -EINVAL;
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if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR))
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return -EINVAL;
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pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n",
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pwrdm->name);
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prm_rmw_mod_reg_bits(0, 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
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pwrdm->prcm_offs, PM_PWSTCTRL);
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return 0;
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}
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/**
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* pwrdm_disable_hdwr_sar - disable automatic hardware SAR for a pwrdm
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* @pwrdm: struct powerdomain *
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*
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* Disable automatic context save-and-restore upon power state change
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* for some devices in a powerdomain. Warning: this only affects a
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* subset of devices in a powerdomain; check the TRM closely. Returns
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* -EINVAL if the powerdomain pointer is null or if the powerdomain
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* does not support automatic save-and-restore, or returns 0 upon
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* success.
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*/
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int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
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{
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if (!pwrdm)
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return -EINVAL;
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if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR))
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return -EINVAL;
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pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n",
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pwrdm->name);
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prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 0,
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pwrdm->prcm_offs, PM_PWSTCTRL);
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return 0;
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}
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/**
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* pwrdm_has_hdwr_sar - test whether powerdomain supports hardware SAR
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* @pwrdm: struct powerdomain *
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*
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* Returns 1 if powerdomain 'pwrdm' supports hardware save-and-restore
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* for some devices, or 0 if it does not.
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*/
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bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm)
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{
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return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0;
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}
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/**
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* pwrdm_wait_transition - wait for powerdomain power transition to finish
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* @pwrdm: struct powerdomain * to wait for
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@ -38,6 +38,10 @@
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#define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON))
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/* Powerdomain flags */
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#define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */
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/*
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* Number of memory banks that are power-controllable. On OMAP3430, the
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* maximum is 4.
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@ -96,6 +100,9 @@ struct powerdomain {
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/* Possible logic power states when pwrdm in RETENTION */
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const u8 pwrsts_logic_ret;
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/* Powerdomain flags */
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const u8 flags;
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/* Number of software-controllable memory banks in this powerdomain */
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const u8 banks;
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@ -150,6 +157,10 @@ int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
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int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
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int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
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int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
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int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
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bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
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int pwrdm_wait_transition(struct powerdomain *pwrdm);
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#endif
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