clk: samsung: exynos5433: prepare for adding CPU clocks
Open-code samsung_cmu_register_one() calls for CMU_APOLLO and CMU_ATLAS setup code as a preparation for adding CPU clocks support for Exynos5433. There should be no functional change resulting from this patch. Cc: Kukjin Kim <kgene@kernel.org> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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@ -11,6 +11,7 @@
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#include <linux/clk-provider.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <dt-bindings/clock/exynos5433.h>
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@ -3594,23 +3595,35 @@ static const struct samsung_gate_clock apollo_gate_clks[] __initconst = {
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CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
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};
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static const struct samsung_cmu_info apollo_cmu_info __initconst = {
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.pll_clks = apollo_pll_clks,
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.nr_pll_clks = ARRAY_SIZE(apollo_pll_clks),
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.mux_clks = apollo_mux_clks,
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.nr_mux_clks = ARRAY_SIZE(apollo_mux_clks),
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.div_clks = apollo_div_clks,
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.nr_div_clks = ARRAY_SIZE(apollo_div_clks),
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.gate_clks = apollo_gate_clks,
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.nr_gate_clks = ARRAY_SIZE(apollo_gate_clks),
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.nr_clk_ids = APOLLO_NR_CLK,
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.clk_regs = apollo_clk_regs,
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.nr_clk_regs = ARRAY_SIZE(apollo_clk_regs),
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};
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static void __init exynos5433_cmu_apollo_init(struct device_node *np)
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{
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samsung_cmu_register_one(np, &apollo_cmu_info);
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void __iomem *reg_base;
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struct samsung_clk_provider *ctx;
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reg_base = of_iomap(np, 0);
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if (!reg_base) {
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panic("%s: failed to map registers\n", __func__);
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return;
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}
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ctx = samsung_clk_init(np, reg_base, APOLLO_NR_CLK);
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if (!ctx) {
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panic("%s: unable to allocate ctx\n", __func__);
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return;
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}
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samsung_clk_register_pll(ctx, apollo_pll_clks,
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ARRAY_SIZE(apollo_pll_clks), reg_base);
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samsung_clk_register_mux(ctx, apollo_mux_clks,
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ARRAY_SIZE(apollo_mux_clks));
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samsung_clk_register_div(ctx, apollo_div_clks,
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ARRAY_SIZE(apollo_div_clks));
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samsung_clk_register_gate(ctx, apollo_gate_clks,
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ARRAY_SIZE(apollo_gate_clks));
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samsung_clk_sleep_init(reg_base, apollo_clk_regs,
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ARRAY_SIZE(apollo_clk_regs));
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samsung_clk_of_add_provider(np, ctx);
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}
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CLK_OF_DECLARE(exynos5433_cmu_apollo, "samsung,exynos5433-cmu-apollo",
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exynos5433_cmu_apollo_init);
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@ -3806,23 +3819,35 @@ static const struct samsung_gate_clock atlas_gate_clks[] __initconst = {
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CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0),
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};
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static const struct samsung_cmu_info atlas_cmu_info __initconst = {
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.pll_clks = atlas_pll_clks,
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.nr_pll_clks = ARRAY_SIZE(atlas_pll_clks),
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.mux_clks = atlas_mux_clks,
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.nr_mux_clks = ARRAY_SIZE(atlas_mux_clks),
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.div_clks = atlas_div_clks,
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.nr_div_clks = ARRAY_SIZE(atlas_div_clks),
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.gate_clks = atlas_gate_clks,
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.nr_gate_clks = ARRAY_SIZE(atlas_gate_clks),
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.nr_clk_ids = ATLAS_NR_CLK,
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.clk_regs = atlas_clk_regs,
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.nr_clk_regs = ARRAY_SIZE(atlas_clk_regs),
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};
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static void __init exynos5433_cmu_atlas_init(struct device_node *np)
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{
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samsung_cmu_register_one(np, &atlas_cmu_info);
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void __iomem *reg_base;
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struct samsung_clk_provider *ctx;
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reg_base = of_iomap(np, 0);
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if (!reg_base) {
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panic("%s: failed to map registers\n", __func__);
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return;
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}
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ctx = samsung_clk_init(np, reg_base, ATLAS_NR_CLK);
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if (!ctx) {
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panic("%s: unable to allocate ctx\n", __func__);
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return;
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}
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samsung_clk_register_pll(ctx, atlas_pll_clks,
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ARRAY_SIZE(atlas_pll_clks), reg_base);
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samsung_clk_register_mux(ctx, atlas_mux_clks,
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ARRAY_SIZE(atlas_mux_clks));
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samsung_clk_register_div(ctx, atlas_div_clks,
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ARRAY_SIZE(atlas_div_clks));
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samsung_clk_register_gate(ctx, atlas_gate_clks,
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ARRAY_SIZE(atlas_gate_clks));
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samsung_clk_sleep_init(reg_base, atlas_clk_regs,
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ARRAY_SIZE(atlas_clk_regs));
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samsung_clk_of_add_provider(np, ctx);
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}
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CLK_OF_DECLARE(exynos5433_cmu_atlas, "samsung,exynos5433-cmu-atlas",
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exynos5433_cmu_atlas_init);
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@ -346,9 +346,9 @@ static struct syscore_ops samsung_clk_syscore_ops = {
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.resume = samsung_clk_resume,
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};
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static void samsung_clk_sleep_init(void __iomem *reg_base,
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const unsigned long *rdump,
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unsigned long nr_rdump)
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void samsung_clk_sleep_init(void __iomem *reg_base,
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const unsigned long *rdump,
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unsigned long nr_rdump)
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{
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struct samsung_clock_reg_cache *reg_cache;
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@ -370,9 +370,9 @@ static void samsung_clk_sleep_init(void __iomem *reg_base,
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}
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#else
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static void samsung_clk_sleep_init(void __iomem *reg_base,
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const unsigned long *rdump,
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unsigned long nr_rdump) {}
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void samsung_clk_sleep_init(void __iomem *reg_base,
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const unsigned long *rdump,
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unsigned long nr_rdump) {}
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#endif
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/*
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@ -399,6 +399,10 @@ extern struct samsung_clk_provider __init *samsung_cmu_register_one(
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extern unsigned long _get_rate(const char *clk_name);
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extern void samsung_clk_sleep_init(void __iomem *reg_base,
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const unsigned long *rdump,
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unsigned long nr_rdump);
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extern void samsung_clk_save(void __iomem *base,
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struct samsung_clk_reg_dump *rd,
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unsigned int num_regs);
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