[WATCHDOG 18/57] iTCO: unlocked_ioctl, coding style and cleanup
Review and switch to unlocked_ioctl Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>wifi-calibration
Alan Cox
Wim Van Sebroeck
parent
30abcec145
commit
0e6fa3fb38
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@ -0,0 +1,15 @@
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/* iTCO Vendor Specific Support hooks */
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#ifdef CONFIG_ITCO_VENDOR_SUPPORT
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extern void iTCO_vendor_pre_start(unsigned long, unsigned int);
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extern void iTCO_vendor_pre_stop(unsigned long);
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extern void iTCO_vendor_pre_keepalive(unsigned long, unsigned int);
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extern void iTCO_vendor_pre_set_heartbeat(unsigned int);
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extern int iTCO_vendor_check_noreboot_on(void);
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#else
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#define iTCO_vendor_pre_start(acpibase, heartbeat) {}
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#define iTCO_vendor_pre_stop(acpibase) {}
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#define iTCO_vendor_pre_keepalive(acpibase, heartbeat) {}
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#define iTCO_vendor_pre_set_heartbeat(heartbeat) {}
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#define iTCO_vendor_check_noreboot_on() 1
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/* 1=check noreboot; 0=don't check */
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#endif
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@ -32,7 +32,9 @@
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#include <linux/init.h> /* For __init/__exit/... */
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#include <linux/ioport.h> /* For io-port access */
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#include <asm/io.h> /* For inb/outb/... */
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#include <linux/io.h> /* For inb/outb/... */
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#include "iTCO_vendor.h"
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/* iTCO defines */
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#define SMI_EN acpibase + 0x30 /* SMI Control and Enable Register */
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@ -40,10 +42,12 @@
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#define TCO1_STS TCOBASE + 0x04 /* TCO1 Status Register */
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/* List of vendor support modes */
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#define SUPERMICRO_OLD_BOARD 1 /* SuperMicro Pentium 3 Era 370SSE+-OEM1/P3TSSE */
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#define SUPERMICRO_NEW_BOARD 2 /* SuperMicro Pentium 4 / Xeon 4 / EMT64T Era Systems */
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/* SuperMicro Pentium 3 Era 370SSE+-OEM1/P3TSSE */
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#define SUPERMICRO_OLD_BOARD 1
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/* SuperMicro Pentium 4 / Xeon 4 / EMT64T Era Systems */
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#define SUPERMICRO_NEW_BOARD 2
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static int vendorsupport = 0;
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static int vendorsupport;
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module_param(vendorsupport, int, 0);
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MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default=0 (none), 1=SuperMicro Pent3, 2=SuperMicro Pent4+");
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@ -143,34 +147,35 @@ static void supermicro_old_pre_keepalive(unsigned long acpibase)
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*/
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/* I/O Port's */
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#define SM_REGINDEX 0x2e /* SuperMicro ICH4+ Register Index */
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#define SM_DATAIO 0x2f /* SuperMicro ICH4+ Register Data I/O */
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#define SM_REGINDEX 0x2e /* SuperMicro ICH4+ Register Index */
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#define SM_DATAIO 0x2f /* SuperMicro ICH4+ Register Data I/O */
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/* Control Register's */
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#define SM_CTLPAGESW 0x07 /* SuperMicro ICH4+ Control Page Switch */
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#define SM_CTLPAGE 0x08 /* SuperMicro ICH4+ Control Page Num */
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#define SM_CTLPAGESW 0x07 /* SuperMicro ICH4+ Control Page Switch */
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#define SM_CTLPAGE 0x08 /* SuperMicro ICH4+ Control Page Num */
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#define SM_WATCHENABLE 0x30 /* Watchdog enable: Bit 0: 0=off, 1=on */
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#define SM_WATCHENABLE 0x30 /* Watchdog enable: Bit 0: 0=off, 1=on */
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#define SM_WATCHPAGE 0x87 /* Watchdog unlock control page */
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#define SM_WATCHPAGE 0x87 /* Watchdog unlock control page */
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#define SM_ENDWATCH 0xAA /* Watchdog lock control page */
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#define SM_ENDWATCH 0xAA /* Watchdog lock control page */
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#define SM_COUNTMODE 0xf5 /* Watchdog count mode select */
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/* (Bit 3: 0 = seconds, 1 = minutes */
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#define SM_COUNTMODE 0xf5 /* Watchdog count mode select */
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/* (Bit 3: 0 = seconds, 1 = minutes */
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#define SM_WATCHTIMER 0xf6 /* 8-bits, Watchdog timer counter (RW) */
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#define SM_WATCHTIMER 0xf6 /* 8-bits, Watchdog timer counter (RW) */
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#define SM_RESETCONTROL 0xf7 /* Watchdog reset control */
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/* Bit 6: timer is reset by kbd interrupt */
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/* Bit 7: timer is reset by mouse interrupt */
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#define SM_RESETCONTROL 0xf7 /* Watchdog reset control */
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/* Bit 6: timer is reset by kbd interrupt */
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/* Bit 7: timer is reset by mouse interrupt */
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static void supermicro_new_unlock_watchdog(void)
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{
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outb(SM_WATCHPAGE, SM_REGINDEX); /* Write 0x87 to port 0x2e twice */
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/* Write 0x87 to port 0x2e twice */
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outb(SM_WATCHPAGE, SM_REGINDEX);
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outb(SM_CTLPAGESW, SM_REGINDEX); /* Switch to watchdog control page */
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outb(SM_WATCHPAGE, SM_REGINDEX);
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/* Switch to watchdog control page */
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outb(SM_CTLPAGESW, SM_REGINDEX);
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outb(SM_CTLPAGE, SM_DATAIO);
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}
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@ -192,7 +197,7 @@ static void supermicro_new_pre_start(unsigned int heartbeat)
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outb(val, SM_DATAIO);
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/* Write heartbeat interval to WDOG */
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outb (SM_WATCHTIMER, SM_REGINDEX);
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outb(SM_WATCHTIMER, SM_REGINDEX);
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outb((heartbeat & 255), SM_DATAIO);
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/* Make sure keyboard/mouse interrupts don't interfere */
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@ -277,7 +282,7 @@ EXPORT_SYMBOL(iTCO_vendor_pre_set_heartbeat);
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int iTCO_vendor_check_noreboot_on(void)
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{
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switch(vendorsupport) {
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switch (vendorsupport) {
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case SUPERMICRO_OLD_BOARD:
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return 0;
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default:
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@ -288,13 +293,13 @@ EXPORT_SYMBOL(iTCO_vendor_check_noreboot_on);
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static int __init iTCO_vendor_init_module(void)
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{
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printk (KERN_INFO PFX "vendor-support=%d\n", vendorsupport);
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printk(KERN_INFO PFX "vendor-support=%d\n", vendorsupport);
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return 0;
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}
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static void __exit iTCO_vendor_exit_module(void)
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{
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printk (KERN_INFO PFX "Module Unloaded\n");
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printk(KERN_INFO PFX "Module Unloaded\n");
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}
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module_init(iTCO_vendor_init_module);
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@ -66,7 +66,8 @@
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#include <linux/types.h> /* For standard types (like size_t) */
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#include <linux/errno.h> /* For the -ENODEV/... values */
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#include <linux/kernel.h> /* For printk/panic/... */
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#include <linux/miscdevice.h> /* For MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR) */
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#include <linux/miscdevice.h> /* For MODULE_ALIAS_MISCDEV
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(WATCHDOG_MINOR) */
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#include <linux/watchdog.h> /* For the watchdog specific items */
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#include <linux/init.h> /* For __init/__exit/... */
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#include <linux/fs.h> /* For file operations */
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@ -74,9 +75,10 @@
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#include <linux/pci.h> /* For pci functions */
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#include <linux/ioport.h> /* For io-port access */
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#include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */
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#include <linux/uaccess.h> /* For copy_to_user/put_user/... */
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#include <linux/io.h> /* For inb/outb/... */
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#include <asm/uaccess.h> /* For copy_to_user/put_user/... */
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#include <asm/io.h> /* For inb/outb/... */
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#include "iTCO_vendor.h"
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/* TCO related info */
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enum iTCO_chipsets {
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@ -140,7 +142,7 @@ static struct {
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{"ICH9DH", 2},
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{"ICH9DO", 2},
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{"631xESB/632xESB", 2},
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{NULL,0}
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{NULL, 0}
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};
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#define ITCO_PCI_DEVICE(dev, data) \
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@ -159,32 +161,32 @@ static struct {
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* functions that probably will be registered by other drivers.
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*/
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static struct pci_device_id iTCO_wdt_pci_tbl[] = {
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801AA_0, TCO_ICH )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801AB_0, TCO_ICH0 )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801BA_0, TCO_ICH2 )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801BA_10, TCO_ICH2M )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801CA_0, TCO_ICH3 )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801CA_12, TCO_ICH3M )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801DB_0, TCO_ICH4 )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801DB_12, TCO_ICH4M )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801E_0, TCO_CICH )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801EB_0, TCO_ICH5 )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801AA_0, TCO_ICH)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801AB_0, TCO_ICH0)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801BA_0, TCO_ICH2)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801BA_10, TCO_ICH2M)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801CA_0, TCO_ICH3)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801CA_12, TCO_ICH3M)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801DB_0, TCO_ICH4)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801DB_12, TCO_ICH4M)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801E_0, TCO_CICH)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801EB_0, TCO_ICH5)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ESB_1, TCO_6300ESB)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_0, TCO_ICH6 )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_1, TCO_ICH6M )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_2, TCO_ICH6W )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_0, TCO_ICH7 )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_1, TCO_ICH7M )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_0, TCO_ICH6)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_1, TCO_ICH6M)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_2, TCO_ICH6W)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_0, TCO_ICH7)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_1, TCO_ICH7M)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_31, TCO_ICH7MDH)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_0, TCO_ICH8 )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_1, TCO_ICH8ME )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_2, TCO_ICH8DH )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_3, TCO_ICH8DO )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_4, TCO_ICH8M )},
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{ ITCO_PCI_DEVICE(0x2918, TCO_ICH9 )},
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{ ITCO_PCI_DEVICE(0x2916, TCO_ICH9R )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_2, TCO_ICH9DH )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_4, TCO_ICH9DO )},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_0, TCO_ICH8)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_1, TCO_ICH8ME)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_2, TCO_ICH8DH)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_3, TCO_ICH8DO)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_4, TCO_ICH8M)},
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{ ITCO_PCI_DEVICE(0x2918, TCO_ICH9)},
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{ ITCO_PCI_DEVICE(0x2916, TCO_ICH9R)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_2, TCO_ICH9DH)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_4, TCO_ICH9DO)},
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{ ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ESB2_0, TCO_631XESB)},
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{ ITCO_PCI_DEVICE(0x2671, TCO_631XESB)},
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{ ITCO_PCI_DEVICE(0x2672, TCO_631XESB)},
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@ -203,13 +205,15 @@ static struct pci_device_id iTCO_wdt_pci_tbl[] = {
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{ ITCO_PCI_DEVICE(0x267f, TCO_631XESB)},
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{ 0, }, /* End of list */
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};
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MODULE_DEVICE_TABLE (pci, iTCO_wdt_pci_tbl);
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MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl);
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/* Address definitions for the TCO */
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#define TCOBASE iTCO_wdt_private.ACPIBASE + 0x60 /* TCO base address */
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#define SMI_EN iTCO_wdt_private.ACPIBASE + 0x30 /* SMI Control and Enable Register */
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/* TCO base address */
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#define TCOBASE iTCO_wdt_private.ACPIBASE + 0x60
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/* SMI Control and Enable Register */
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#define SMI_EN iTCO_wdt_private.ACPIBASE + 0x30
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#define TCO_RLD TCOBASE + 0x00 /* TCO Timer Reload and Current Value */
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#define TCO_RLD TCOBASE + 0x00 /* TCO Timer Reload and Curr. Value */
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#define TCOv1_TMR TCOBASE + 0x01 /* TCOv1 Timer Initial Value */
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#define TCO_DAT_IN TCOBASE + 0x02 /* TCO Data In Register */
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#define TCO_DAT_OUT TCOBASE + 0x03 /* TCO Data Out Register */
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@ -222,15 +226,21 @@ MODULE_DEVICE_TABLE (pci, iTCO_wdt_pci_tbl);
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/* internal variables */
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static unsigned long is_active;
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static char expect_release;
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static struct { /* this is private data for the iTCO_wdt device */
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unsigned int iTCO_version; /* TCO version/generation */
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unsigned long ACPIBASE; /* The cards ACPIBASE address (TCOBASE = ACPIBASE+0x60) */
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unsigned long __iomem *gcs; /* NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2) */
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spinlock_t io_lock; /* the lock for io operations */
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struct pci_dev *pdev; /* the PCI-device */
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static struct { /* this is private data for the iTCO_wdt device */
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/* TCO version/generation */
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unsigned int iTCO_version;
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/* The cards ACPIBASE address (TCOBASE = ACPIBASE+0x60) */
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unsigned long ACPIBASE;
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/* NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2)*/
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unsigned long __iomem *gcs;
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/* the lock for io operations */
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spinlock_t io_lock;
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/* the PCI-device */
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struct pci_dev *pdev;
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} iTCO_wdt_private;
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static struct platform_device *iTCO_wdt_platform_device; /* the watchdog platform device */
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/* the watchdog platform device */
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static struct platform_device *iTCO_wdt_platform_device;
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/* module parameters */
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#define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */
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@ -240,22 +250,9 @@ MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39 (TCO
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static int nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, int, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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/* iTCO Vendor Specific Support hooks */
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#ifdef CONFIG_ITCO_VENDOR_SUPPORT
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extern void iTCO_vendor_pre_start(unsigned long, unsigned int);
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extern void iTCO_vendor_pre_stop(unsigned long);
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extern void iTCO_vendor_pre_keepalive(unsigned long, unsigned int);
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extern void iTCO_vendor_pre_set_heartbeat(unsigned int);
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extern int iTCO_vendor_check_noreboot_on(void);
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#else
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#define iTCO_vendor_pre_start(acpibase, heartbeat) {}
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#define iTCO_vendor_pre_stop(acpibase) {}
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#define iTCO_vendor_pre_keepalive(acpibase,heartbeat) {}
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#define iTCO_vendor_pre_set_heartbeat(heartbeat) {}
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#define iTCO_vendor_check_noreboot_on() 1 /* 1=check noreboot; 0=don't check */
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#endif
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MODULE_PARM_DESC(nowayout,
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"Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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/*
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* Some TCO specific functions
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@ -369,11 +366,10 @@ static int iTCO_wdt_keepalive(void)
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iTCO_vendor_pre_keepalive(iTCO_wdt_private.ACPIBASE, heartbeat);
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/* Reload the timer by writing to the TCO Timer Counter register */
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if (iTCO_wdt_private.iTCO_version == 2) {
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if (iTCO_wdt_private.iTCO_version == 2)
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outw(0x01, TCO_RLD);
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} else if (iTCO_wdt_private.iTCO_version == 1) {
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else if (iTCO_wdt_private.iTCO_version == 1)
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outb(0x01, TCO_RLD);
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}
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spin_unlock(&iTCO_wdt_private.io_lock);
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return 0;
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@ -425,7 +421,7 @@ static int iTCO_wdt_set_heartbeat(int t)
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return 0;
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}
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static int iTCO_wdt_get_timeleft (int *time_left)
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static int iTCO_wdt_get_timeleft(int *time_left)
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{
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unsigned int val16;
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unsigned char val8;
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@ -454,7 +450,7 @@ static int iTCO_wdt_get_timeleft (int *time_left)
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* /dev/watchdog handling
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*/
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static int iTCO_wdt_open (struct inode *inode, struct file *file)
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static int iTCO_wdt_open(struct inode *inode, struct file *file)
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{
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/* /dev/watchdog can only be opened once */
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if (test_and_set_bit(0, &is_active))
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@ -468,7 +464,7 @@ static int iTCO_wdt_open (struct inode *inode, struct file *file)
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return nonseekable_open(inode, file);
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}
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static int iTCO_wdt_release (struct inode *inode, struct file *file)
|
||||
static int iTCO_wdt_release(struct inode *inode, struct file *file)
|
||||
{
|
||||
/*
|
||||
* Shut off the timer.
|
||||
|
|
@ -476,7 +472,8 @@ static int iTCO_wdt_release (struct inode *inode, struct file *file)
|
|||
if (expect_release == 42) {
|
||||
iTCO_wdt_stop();
|
||||
} else {
|
||||
printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
|
||||
printk(KERN_CRIT PFX
|
||||
"Unexpected close, not stopping watchdog!\n");
|
||||
iTCO_wdt_keepalive();
|
||||
}
|
||||
clear_bit(0, &is_active);
|
||||
|
|
@ -484,19 +481,20 @@ static int iTCO_wdt_release (struct inode *inode, struct file *file)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static ssize_t iTCO_wdt_write (struct file *file, const char __user *data,
|
||||
size_t len, loff_t * ppos)
|
||||
static ssize_t iTCO_wdt_write(struct file *file, const char __user *data,
|
||||
size_t len, loff_t *ppos)
|
||||
{
|
||||
/* See if we got the magic character 'V' and reload the timer */
|
||||
if (len) {
|
||||
if (!nowayout) {
|
||||
size_t i;
|
||||
|
||||
/* note: just in case someone wrote the magic character
|
||||
* five months ago... */
|
||||
/* note: just in case someone wrote the magic
|
||||
character five months ago... */
|
||||
expect_release = 0;
|
||||
|
||||
/* scan to see whether or not we got the magic character */
|
||||
/* scan to see whether or not we got the
|
||||
magic character */
|
||||
for (i = 0; i != len; i++) {
|
||||
char c;
|
||||
if (get_user(c, data+i))
|
||||
|
|
@ -512,8 +510,8 @@ static ssize_t iTCO_wdt_write (struct file *file, const char __user *data,
|
|||
return len;
|
||||
}
|
||||
|
||||
static int iTCO_wdt_ioctl (struct inode *inode, struct file *file,
|
||||
unsigned int cmd, unsigned long arg)
|
||||
static long iTCO_wdt_ioctl(struct file *file, unsigned int cmd,
|
||||
unsigned long arg)
|
||||
{
|
||||
int new_options, retval = -EINVAL;
|
||||
int new_heartbeat;
|
||||
|
|
@ -528,64 +526,52 @@ static int iTCO_wdt_ioctl (struct inode *inode, struct file *file,
|
|||
};
|
||||
|
||||
switch (cmd) {
|
||||
case WDIOC_GETSUPPORT:
|
||||
return copy_to_user(argp, &ident,
|
||||
sizeof (ident)) ? -EFAULT : 0;
|
||||
case WDIOC_GETSUPPORT:
|
||||
return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
|
||||
case WDIOC_GETSTATUS:
|
||||
case WDIOC_GETBOOTSTATUS:
|
||||
return put_user(0, p);
|
||||
|
||||
case WDIOC_GETSTATUS:
|
||||
case WDIOC_GETBOOTSTATUS:
|
||||
return put_user(0, p);
|
||||
case WDIOC_KEEPALIVE:
|
||||
iTCO_wdt_keepalive();
|
||||
return 0;
|
||||
|
||||
case WDIOC_KEEPALIVE:
|
||||
case WDIOC_SETOPTIONS:
|
||||
{
|
||||
if (get_user(new_options, p))
|
||||
return -EFAULT;
|
||||
|
||||
if (new_options & WDIOS_DISABLECARD) {
|
||||
iTCO_wdt_stop();
|
||||
retval = 0;
|
||||
}
|
||||
if (new_options & WDIOS_ENABLECARD) {
|
||||
iTCO_wdt_keepalive();
|
||||
return 0;
|
||||
|
||||
case WDIOC_SETOPTIONS:
|
||||
{
|
||||
if (get_user(new_options, p))
|
||||
return -EFAULT;
|
||||
|
||||
if (new_options & WDIOS_DISABLECARD) {
|
||||
iTCO_wdt_stop();
|
||||
retval = 0;
|
||||
}
|
||||
|
||||
if (new_options & WDIOS_ENABLECARD) {
|
||||
iTCO_wdt_keepalive();
|
||||
iTCO_wdt_start();
|
||||
retval = 0;
|
||||
}
|
||||
|
||||
return retval;
|
||||
iTCO_wdt_start();
|
||||
retval = 0;
|
||||
}
|
||||
|
||||
case WDIOC_SETTIMEOUT:
|
||||
{
|
||||
if (get_user(new_heartbeat, p))
|
||||
return -EFAULT;
|
||||
|
||||
if (iTCO_wdt_set_heartbeat(new_heartbeat))
|
||||
return -EINVAL;
|
||||
|
||||
iTCO_wdt_keepalive();
|
||||
/* Fall */
|
||||
}
|
||||
|
||||
case WDIOC_GETTIMEOUT:
|
||||
return put_user(heartbeat, p);
|
||||
|
||||
case WDIOC_GETTIMELEFT:
|
||||
{
|
||||
int time_left;
|
||||
|
||||
if (iTCO_wdt_get_timeleft(&time_left))
|
||||
return -EINVAL;
|
||||
|
||||
return put_user(time_left, p);
|
||||
}
|
||||
|
||||
default:
|
||||
return -ENOTTY;
|
||||
return retval;
|
||||
}
|
||||
case WDIOC_SETTIMEOUT:
|
||||
{
|
||||
if (get_user(new_heartbeat, p))
|
||||
return -EFAULT;
|
||||
if (iTCO_wdt_set_heartbeat(new_heartbeat))
|
||||
return -EINVAL;
|
||||
iTCO_wdt_keepalive();
|
||||
/* Fall */
|
||||
}
|
||||
case WDIOC_GETTIMEOUT:
|
||||
return put_user(heartbeat, p);
|
||||
case WDIOC_GETTIMELEFT:
|
||||
{
|
||||
int time_left;
|
||||
if (iTCO_wdt_get_timeleft(&time_left))
|
||||
return -EINVAL;
|
||||
return put_user(time_left, p);
|
||||
}
|
||||
default:
|
||||
return -ENOTTY;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -594,12 +580,12 @@ static int iTCO_wdt_ioctl (struct inode *inode, struct file *file,
|
|||
*/
|
||||
|
||||
static const struct file_operations iTCO_wdt_fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.llseek = no_llseek,
|
||||
.write = iTCO_wdt_write,
|
||||
.ioctl = iTCO_wdt_ioctl,
|
||||
.open = iTCO_wdt_open,
|
||||
.release = iTCO_wdt_release,
|
||||
.owner = THIS_MODULE,
|
||||
.llseek = no_llseek,
|
||||
.write = iTCO_wdt_write,
|
||||
.unlocked_ioctl = iTCO_wdt_ioctl,
|
||||
.open = iTCO_wdt_open,
|
||||
.release = iTCO_wdt_release,
|
||||
};
|
||||
|
||||
static struct miscdevice iTCO_wdt_miscdev = {
|
||||
|
|
@ -612,7 +598,8 @@ static struct miscdevice iTCO_wdt_miscdev = {
|
|||
* Init & exit routines
|
||||
*/
|
||||
|
||||
static int __devinit iTCO_wdt_init(struct pci_dev *pdev, const struct pci_device_id *ent, struct platform_device *dev)
|
||||
static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
|
||||
const struct pci_device_id *ent, struct platform_device *dev)
|
||||
{
|
||||
int ret;
|
||||
u32 base_address;
|
||||
|
|
@ -632,17 +619,19 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, const struct pci_device
|
|||
pci_dev_put(pdev);
|
||||
return -ENODEV;
|
||||
}
|
||||
iTCO_wdt_private.iTCO_version = iTCO_chipset_info[ent->driver_data].iTCO_version;
|
||||
iTCO_wdt_private.iTCO_version =
|
||||
iTCO_chipset_info[ent->driver_data].iTCO_version;
|
||||
iTCO_wdt_private.ACPIBASE = base_address;
|
||||
iTCO_wdt_private.pdev = pdev;
|
||||
|
||||
/* Get the Memory-Mapped GCS register, we need it for the NO_REBOOT flag (TCO v2) */
|
||||
/* To get access to it you have to read RCBA from PCI Config space 0xf0
|
||||
and use it as base. GCS = RCBA + ICH6_GCS(0x3410). */
|
||||
/* Get the Memory-Mapped GCS register, we need it for the
|
||||
NO_REBOOT flag (TCO v2). To get access to it you have to
|
||||
read RCBA from PCI Config space 0xf0 and use it as base.
|
||||
GCS = RCBA + ICH6_GCS(0x3410). */
|
||||
if (iTCO_wdt_private.iTCO_version == 2) {
|
||||
pci_read_config_dword(pdev, 0xf0, &base_address);
|
||||
RCBA = base_address & 0xffffc000;
|
||||
iTCO_wdt_private.gcs = ioremap((RCBA + 0x3410),4);
|
||||
iTCO_wdt_private.gcs = ioremap((RCBA + 0x3410), 4);
|
||||
}
|
||||
|
||||
/* Check chipset's NO_REBOOT bit */
|
||||
|
|
@ -657,8 +646,8 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, const struct pci_device
|
|||
|
||||
/* Set the TCO_EN bit in SMI_EN register */
|
||||
if (!request_region(SMI_EN, 4, "iTCO_wdt")) {
|
||||
printk(KERN_ERR PFX "I/O address 0x%04lx already in use\n",
|
||||
SMI_EN );
|
||||
printk(KERN_ERR PFX
|
||||
"I/O address 0x%04lx already in use\n", SMI_EN);
|
||||
ret = -EIO;
|
||||
goto out;
|
||||
}
|
||||
|
|
@ -667,18 +656,20 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, const struct pci_device
|
|||
outl(val32, SMI_EN);
|
||||
release_region(SMI_EN, 4);
|
||||
|
||||
/* The TCO I/O registers reside in a 32-byte range pointed to by the TCOBASE value */
|
||||
if (!request_region (TCOBASE, 0x20, "iTCO_wdt")) {
|
||||
printk (KERN_ERR PFX "I/O address 0x%04lx already in use\n",
|
||||
/* The TCO I/O registers reside in a 32-byte range pointed to
|
||||
by the TCOBASE value */
|
||||
if (!request_region(TCOBASE, 0x20, "iTCO_wdt")) {
|
||||
printk(KERN_ERR PFX "I/O address 0x%04lx already in use\n",
|
||||
TCOBASE);
|
||||
ret = -EIO;
|
||||
goto out;
|
||||
}
|
||||
|
||||
printk(KERN_INFO PFX "Found a %s TCO device (Version=%d, TCOBASE=0x%04lx)\n",
|
||||
iTCO_chipset_info[ent->driver_data].name,
|
||||
iTCO_chipset_info[ent->driver_data].iTCO_version,
|
||||
TCOBASE);
|
||||
printk(KERN_INFO PFX
|
||||
"Found a %s TCO device (Version=%d, TCOBASE=0x%04lx)\n",
|
||||
iTCO_chipset_info[ent->driver_data].name,
|
||||
iTCO_chipset_info[ent->driver_data].iTCO_version,
|
||||
TCOBASE);
|
||||
|
||||
/* Clear out the (probably old) status */
|
||||
outb(0, TCO1_STS);
|
||||
|
|
@ -687,27 +678,29 @@ static int __devinit iTCO_wdt_init(struct pci_dev *pdev, const struct pci_device
|
|||
/* Make sure the watchdog is not running */
|
||||
iTCO_wdt_stop();
|
||||
|
||||
/* Check that the heartbeat value is within it's range ; if not reset to the default */
|
||||
/* Check that the heartbeat value is within it's range;
|
||||
if not reset to the default */
|
||||
if (iTCO_wdt_set_heartbeat(heartbeat)) {
|
||||
iTCO_wdt_set_heartbeat(WATCHDOG_HEARTBEAT);
|
||||
printk(KERN_INFO PFX "heartbeat value must be 2<heartbeat<39 (TCO v1) or 613 (TCO v2), using %d\n",
|
||||
heartbeat);
|
||||
printk(KERN_INFO PFX "heartbeat value must be 2 < heartbeat < 39 (TCO v1) or 613 (TCO v2), using %d\n",
|
||||
heartbeat);
|
||||
}
|
||||
|
||||
ret = misc_register(&iTCO_wdt_miscdev);
|
||||
if (ret != 0) {
|
||||
printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
|
||||
WATCHDOG_MINOR, ret);
|
||||
printk(KERN_ERR PFX
|
||||
"cannot register miscdev on minor=%d (err=%d)\n",
|
||||
WATCHDOG_MINOR, ret);
|
||||
goto unreg_region;
|
||||
}
|
||||
|
||||
printk (KERN_INFO PFX "initialized. heartbeat=%d sec (nowayout=%d)\n",
|
||||
heartbeat, nowayout);
|
||||
printk(KERN_INFO PFX "initialized. heartbeat=%d sec (nowayout=%d)\n",
|
||||
heartbeat, nowayout);
|
||||
|
||||
return 0;
|
||||
|
||||
unreg_region:
|
||||
release_region (TCOBASE, 0x20);
|
||||
release_region(TCOBASE, 0x20);
|
||||
out:
|
||||
if (iTCO_wdt_private.iTCO_version == 2)
|
||||
iounmap(iTCO_wdt_private.gcs);
|
||||
|
|
@ -796,7 +789,8 @@ static int __init iTCO_wdt_init_module(void)
|
|||
if (err)
|
||||
return err;
|
||||
|
||||
iTCO_wdt_platform_device = platform_device_register_simple(DRV_NAME, -1, NULL, 0);
|
||||
iTCO_wdt_platform_device = platform_device_register_simple(DRV_NAME,
|
||||
-1, NULL, 0);
|
||||
if (IS_ERR(iTCO_wdt_platform_device)) {
|
||||
err = PTR_ERR(iTCO_wdt_platform_device);
|
||||
goto unreg_platform_driver;
|
||||
|
|
|
|||
Loading…
Reference in New Issue