Documentation/bindings: Document the SafeXel cryptographic engine driver
The Inside Secure Safexcel cryptographic engine is found on some Marvell SoCs (7k/8k). Document the bindings used by its driver. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Inside Secure SafeXcel cryptographic engine
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Required properties:
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- compatible: Should be "inside-secure,safexcel-eip197".
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- reg: Base physical address of the engine and length of memory mapped region.
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- interrupts: Interrupt numbers for the rings and engine.
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- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem".
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Optional properties:
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- clocks: Reference to the crypto engine clock.
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- dma-mask: The address mask limitation. Defaults to 64.
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Example:
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crypto: crypto@800000 {
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compatible = "inside-secure,safexcel-eip197";
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reg = <0x800000 0x200000>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3",
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"eip";
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clocks = <&cpm_syscon0 1 26>;
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dma-mask = <0xff 0xffffffff>;
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status = "disabled";
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};
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