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MLK-19906: drm/imx/dcss: lower CTXLD trigger threshold 

After PM_QoS was removed by this commit:

f889273 - MLK-19460-2: drm: imx: dcss: remove PM_QoS

interrupt latency increased. Hence, any video playback using tiled
compressed formats will be affected because DTRC uses CTXLD to switch
its register banks. If CTXLD is not armed, at the right time, the DB
trigger moment will be missed. This leads to DTRC not switch to the other
register bank and scaler will be starved, leading to a channel freeze.

This patch will lower the CTXLD trigger time to 90% of frame trace
allowing some more time between arming the context loader and DB trigger
time, in case the latency is too big.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
pull/10/head
Laurentiu Palcu 2018-10-12 10:24:16 +03:00 committed by Jason Liu
parent 31733e7f7e
commit 0f974238db
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/imx/dcss/dcss-dtg.c
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@ -339,7 +339,7 @@ void dcss_dtg_sync_set(struct dcss_soc *dcss, struct videomode *vm)
dcss_dtg_write(dtg, 0, DCSS_DTG_LINE1_INT);
/* CTXLD trigger */
dcss_dtg_write(dtg, ((95 * dis_lrc_y) / 100) << 16, DCSS_DTG_LINE0_INT);
dcss_dtg_write(dtg, ((90 * dis_lrc_y) / 100) << 16, DCSS_DTG_LINE0_INT);
}
EXPORT_SYMBOL(dcss_dtg_sync_set);